1d76271d2SHyun Kwon // SPDX-License-Identifier: GPL-2.0 2d76271d2SHyun Kwon /* 3d76271d2SHyun Kwon * ZynqMP DisplayPort Subsystem Driver 4d76271d2SHyun Kwon * 5d76271d2SHyun Kwon * Copyright (C) 2017 - 2020 Xilinx, Inc. 6d76271d2SHyun Kwon * 7d76271d2SHyun Kwon * Authors: 8d76271d2SHyun Kwon * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9d76271d2SHyun Kwon * - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10d76271d2SHyun Kwon */ 11d76271d2SHyun Kwon 12d76271d2SHyun Kwon #include <linux/clk.h> 13d76271d2SHyun Kwon #include <linux/dma-mapping.h> 14d76271d2SHyun Kwon #include <linux/module.h> 15d76271d2SHyun Kwon #include <linux/of_reserved_mem.h> 16d76271d2SHyun Kwon #include <linux/platform_device.h> 17d76271d2SHyun Kwon #include <linux/pm_runtime.h> 18d76271d2SHyun Kwon 19d76271d2SHyun Kwon #include <drm/drm_atomic_helper.h> 20*e8e35733SLaurent Pinchart #include <drm/drm_bridge.h> 21d76271d2SHyun Kwon #include <drm/drm_device.h> 22d76271d2SHyun Kwon #include <drm/drm_drv.h> 23d76271d2SHyun Kwon #include <drm/drm_fb_helper.h> 24d76271d2SHyun Kwon #include <drm/drm_fourcc.h> 254a83c26aSDanilo Krummrich #include <drm/drm_gem_dma_helper.h> 26d76271d2SHyun Kwon #include <drm/drm_gem_framebuffer_helper.h> 27d76271d2SHyun Kwon #include <drm/drm_managed.h> 28d76271d2SHyun Kwon #include <drm/drm_mode_config.h> 29fad54534SJavier Martinez Canillas #include <drm/drm_module.h> 30d76271d2SHyun Kwon #include <drm/drm_probe_helper.h> 31*e8e35733SLaurent Pinchart #include <drm/drm_simple_kms_helper.h> 32d76271d2SHyun Kwon #include <drm/drm_vblank.h> 33d76271d2SHyun Kwon 34d76271d2SHyun Kwon #include "zynqmp_disp.h" 35d76271d2SHyun Kwon #include "zynqmp_dp.h" 36d76271d2SHyun Kwon #include "zynqmp_dpsub.h" 37d76271d2SHyun Kwon 38d76271d2SHyun Kwon /* ----------------------------------------------------------------------------- 39d76271d2SHyun Kwon * Dumb Buffer & Framebuffer Allocation 40d76271d2SHyun Kwon */ 41d76271d2SHyun Kwon 42d76271d2SHyun Kwon static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv, 43d76271d2SHyun Kwon struct drm_device *drm, 44d76271d2SHyun Kwon struct drm_mode_create_dumb *args) 45d76271d2SHyun Kwon { 46d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm); 47d76271d2SHyun Kwon unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8); 48d76271d2SHyun Kwon 49d76271d2SHyun Kwon /* Enforce the alignment constraints of the DMA engine. */ 50d76271d2SHyun Kwon args->pitch = ALIGN(pitch, dpsub->dma_align); 51d76271d2SHyun Kwon 524a83c26aSDanilo Krummrich return drm_gem_dma_dumb_create_internal(file_priv, drm, args); 53d76271d2SHyun Kwon } 54d76271d2SHyun Kwon 55d76271d2SHyun Kwon static struct drm_framebuffer * 56d76271d2SHyun Kwon zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv, 57d76271d2SHyun Kwon const struct drm_mode_fb_cmd2 *mode_cmd) 58d76271d2SHyun Kwon { 59d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm); 60d76271d2SHyun Kwon struct drm_mode_fb_cmd2 cmd = *mode_cmd; 61d76271d2SHyun Kwon unsigned int i; 62d76271d2SHyun Kwon 63d76271d2SHyun Kwon /* Enforce the alignment constraints of the DMA engine. */ 64d76271d2SHyun Kwon for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i) 65d76271d2SHyun Kwon cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align); 66d76271d2SHyun Kwon 67d76271d2SHyun Kwon return drm_gem_fb_create(drm, file_priv, &cmd); 68d76271d2SHyun Kwon } 69d76271d2SHyun Kwon 70d76271d2SHyun Kwon static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = { 71d76271d2SHyun Kwon .fb_create = zynqmp_dpsub_fb_create, 72d76271d2SHyun Kwon .atomic_check = drm_atomic_helper_check, 73d76271d2SHyun Kwon .atomic_commit = drm_atomic_helper_commit, 74d76271d2SHyun Kwon }; 75d76271d2SHyun Kwon 76d76271d2SHyun Kwon /* ----------------------------------------------------------------------------- 77d76271d2SHyun Kwon * DRM/KMS Driver 78d76271d2SHyun Kwon */ 79d76271d2SHyun Kwon 804a83c26aSDanilo Krummrich DEFINE_DRM_GEM_DMA_FOPS(zynqmp_dpsub_drm_fops); 81d76271d2SHyun Kwon 8270a59dd8SDaniel Vetter static const struct drm_driver zynqmp_dpsub_drm_driver = { 83d76271d2SHyun Kwon .driver_features = DRIVER_MODESET | DRIVER_GEM | 84d76271d2SHyun Kwon DRIVER_ATOMIC, 85d76271d2SHyun Kwon 864a83c26aSDanilo Krummrich DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(zynqmp_dpsub_dumb_create), 87d76271d2SHyun Kwon 88d76271d2SHyun Kwon .fops = &zynqmp_dpsub_drm_fops, 89d76271d2SHyun Kwon 90d76271d2SHyun Kwon .name = "zynqmp-dpsub", 91d76271d2SHyun Kwon .desc = "Xilinx DisplayPort Subsystem Driver", 92d76271d2SHyun Kwon .date = "20130509", 93d76271d2SHyun Kwon .major = 1, 94d76271d2SHyun Kwon .minor = 0, 95d76271d2SHyun Kwon }; 96d76271d2SHyun Kwon 97d76271d2SHyun Kwon static int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub) 98d76271d2SHyun Kwon { 99*e8e35733SLaurent Pinchart struct drm_encoder *encoder = &dpsub->encoder; 100d76271d2SHyun Kwon struct drm_device *drm = &dpsub->drm; 101d76271d2SHyun Kwon int ret; 102d76271d2SHyun Kwon 103d76271d2SHyun Kwon /* Initialize mode config, vblank and the KMS poll helper. */ 104d76271d2SHyun Kwon ret = drmm_mode_config_init(drm); 105d76271d2SHyun Kwon if (ret < 0) 106075342eaSDaniel Vetter return ret; 107d76271d2SHyun Kwon 108d76271d2SHyun Kwon drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs; 109d76271d2SHyun Kwon drm->mode_config.min_width = 0; 110d76271d2SHyun Kwon drm->mode_config.min_height = 0; 111d76271d2SHyun Kwon drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH; 112d76271d2SHyun Kwon drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT; 113d76271d2SHyun Kwon 114d76271d2SHyun Kwon ret = drm_vblank_init(drm, 1); 115d76271d2SHyun Kwon if (ret) 116075342eaSDaniel Vetter return ret; 117d76271d2SHyun Kwon 118d76271d2SHyun Kwon drm_kms_helper_poll_init(drm); 119d76271d2SHyun Kwon 120d76271d2SHyun Kwon /* 121d76271d2SHyun Kwon * Initialize the DISP and DP components. This will creates planes, 122*e8e35733SLaurent Pinchart * CRTC, and a bridge for the DP encoder. 123d76271d2SHyun Kwon */ 124d76271d2SHyun Kwon ret = zynqmp_disp_drm_init(dpsub); 125d76271d2SHyun Kwon if (ret) 126d76271d2SHyun Kwon goto err_poll_fini; 127d76271d2SHyun Kwon 128d76271d2SHyun Kwon ret = zynqmp_dp_drm_init(dpsub); 129d76271d2SHyun Kwon if (ret) 130d76271d2SHyun Kwon goto err_poll_fini; 131d76271d2SHyun Kwon 132*e8e35733SLaurent Pinchart /* Create the encoder and attach the bridge. */ 133*e8e35733SLaurent Pinchart encoder->possible_crtcs |= zynqmp_disp_get_crtc_mask(dpsub->disp); 134*e8e35733SLaurent Pinchart drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_NONE); 135*e8e35733SLaurent Pinchart 136*e8e35733SLaurent Pinchart ret = drm_bridge_attach(encoder, dpsub->bridge, NULL, 0); 137*e8e35733SLaurent Pinchart if (ret) { 138*e8e35733SLaurent Pinchart dev_err(dpsub->dev, "failed to attach bridge to encoder\n"); 139*e8e35733SLaurent Pinchart goto err_poll_fini; 140*e8e35733SLaurent Pinchart } 141*e8e35733SLaurent Pinchart 142d76271d2SHyun Kwon /* Reset all components and register the DRM device. */ 143d76271d2SHyun Kwon drm_mode_config_reset(drm); 144d76271d2SHyun Kwon 145d76271d2SHyun Kwon ret = drm_dev_register(drm, 0); 146d76271d2SHyun Kwon if (ret < 0) 147d76271d2SHyun Kwon goto err_poll_fini; 148d76271d2SHyun Kwon 149d76271d2SHyun Kwon /* Initialize fbdev generic emulation. */ 150d76271d2SHyun Kwon drm_fbdev_generic_setup(drm, 24); 151d76271d2SHyun Kwon 152d76271d2SHyun Kwon return 0; 153d76271d2SHyun Kwon 154d76271d2SHyun Kwon err_poll_fini: 155d76271d2SHyun Kwon drm_kms_helper_poll_fini(drm); 156d76271d2SHyun Kwon return ret; 157d76271d2SHyun Kwon } 158d76271d2SHyun Kwon 159d76271d2SHyun Kwon /* ----------------------------------------------------------------------------- 160d76271d2SHyun Kwon * Power Management 161d76271d2SHyun Kwon */ 162d76271d2SHyun Kwon 163d76271d2SHyun Kwon static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev) 164d76271d2SHyun Kwon { 165d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev); 166d76271d2SHyun Kwon 167d76271d2SHyun Kwon return drm_mode_config_helper_suspend(&dpsub->drm); 168d76271d2SHyun Kwon } 169d76271d2SHyun Kwon 170d76271d2SHyun Kwon static int __maybe_unused zynqmp_dpsub_resume(struct device *dev) 171d76271d2SHyun Kwon { 172d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev); 173d76271d2SHyun Kwon 174d76271d2SHyun Kwon return drm_mode_config_helper_resume(&dpsub->drm); 175d76271d2SHyun Kwon } 176d76271d2SHyun Kwon 177d76271d2SHyun Kwon static const struct dev_pm_ops zynqmp_dpsub_pm_ops = { 178d76271d2SHyun Kwon SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume) 179d76271d2SHyun Kwon }; 180d76271d2SHyun Kwon 181d76271d2SHyun Kwon /* ----------------------------------------------------------------------------- 182d76271d2SHyun Kwon * Probe & Remove 183d76271d2SHyun Kwon */ 184d76271d2SHyun Kwon 185d76271d2SHyun Kwon static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub) 186d76271d2SHyun Kwon { 187d76271d2SHyun Kwon int ret; 188d76271d2SHyun Kwon 189d76271d2SHyun Kwon dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk"); 190d76271d2SHyun Kwon if (IS_ERR(dpsub->apb_clk)) 191d76271d2SHyun Kwon return PTR_ERR(dpsub->apb_clk); 192d76271d2SHyun Kwon 193d76271d2SHyun Kwon ret = clk_prepare_enable(dpsub->apb_clk); 194d76271d2SHyun Kwon if (ret) { 195d76271d2SHyun Kwon dev_err(dpsub->dev, "failed to enable the APB clock\n"); 196d76271d2SHyun Kwon return ret; 197d76271d2SHyun Kwon } 198d76271d2SHyun Kwon 199d76271d2SHyun Kwon return 0; 200d76271d2SHyun Kwon } 201d76271d2SHyun Kwon 202d76271d2SHyun Kwon static int zynqmp_dpsub_probe(struct platform_device *pdev) 203d76271d2SHyun Kwon { 204d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub; 205d76271d2SHyun Kwon int ret; 206d76271d2SHyun Kwon 207d76271d2SHyun Kwon /* Allocate private data. */ 208075342eaSDaniel Vetter dpsub = devm_drm_dev_alloc(&pdev->dev, &zynqmp_dpsub_drm_driver, 209075342eaSDaniel Vetter struct zynqmp_dpsub, drm); 210075342eaSDaniel Vetter if (IS_ERR(dpsub)) 211075342eaSDaniel Vetter return PTR_ERR(dpsub); 212d76271d2SHyun Kwon 213d76271d2SHyun Kwon dpsub->dev = &pdev->dev; 214d76271d2SHyun Kwon platform_set_drvdata(pdev, dpsub); 215d76271d2SHyun Kwon 216d76271d2SHyun Kwon dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT)); 217d76271d2SHyun Kwon 218d76271d2SHyun Kwon /* Try the reserved memory. Proceed if there's none. */ 219d76271d2SHyun Kwon of_reserved_mem_device_init(&pdev->dev); 220d76271d2SHyun Kwon 221d76271d2SHyun Kwon ret = zynqmp_dpsub_init_clocks(dpsub); 222d76271d2SHyun Kwon if (ret < 0) 223d76271d2SHyun Kwon goto err_mem; 224d76271d2SHyun Kwon 225d76271d2SHyun Kwon pm_runtime_enable(&pdev->dev); 226d76271d2SHyun Kwon 227d76271d2SHyun Kwon /* 228d76271d2SHyun Kwon * DP should be probed first so that the zynqmp_disp can set the output 229d76271d2SHyun Kwon * format accordingly. 230d76271d2SHyun Kwon */ 231d76271d2SHyun Kwon ret = zynqmp_dp_probe(dpsub, &dpsub->drm); 232d76271d2SHyun Kwon if (ret) 233d76271d2SHyun Kwon goto err_pm; 234d76271d2SHyun Kwon 235d76271d2SHyun Kwon ret = zynqmp_disp_probe(dpsub, &dpsub->drm); 236d76271d2SHyun Kwon if (ret) 237d76271d2SHyun Kwon goto err_dp; 238d76271d2SHyun Kwon 239d76271d2SHyun Kwon ret = zynqmp_dpsub_drm_init(dpsub); 240d76271d2SHyun Kwon if (ret) 241d76271d2SHyun Kwon goto err_disp; 242d76271d2SHyun Kwon 243d76271d2SHyun Kwon dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed"); 244d76271d2SHyun Kwon 245d76271d2SHyun Kwon return 0; 246d76271d2SHyun Kwon 247d76271d2SHyun Kwon err_disp: 248d76271d2SHyun Kwon zynqmp_disp_remove(dpsub); 249d76271d2SHyun Kwon err_dp: 250d76271d2SHyun Kwon zynqmp_dp_remove(dpsub); 251d76271d2SHyun Kwon err_pm: 252d76271d2SHyun Kwon pm_runtime_disable(&pdev->dev); 253d76271d2SHyun Kwon clk_disable_unprepare(dpsub->apb_clk); 254d76271d2SHyun Kwon err_mem: 255d76271d2SHyun Kwon of_reserved_mem_device_release(&pdev->dev); 256d76271d2SHyun Kwon return ret; 257d76271d2SHyun Kwon } 258d76271d2SHyun Kwon 259d76271d2SHyun Kwon static int zynqmp_dpsub_remove(struct platform_device *pdev) 260d76271d2SHyun Kwon { 261d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev); 262d76271d2SHyun Kwon struct drm_device *drm = &dpsub->drm; 263d76271d2SHyun Kwon 264d76271d2SHyun Kwon drm_dev_unregister(drm); 265d76271d2SHyun Kwon drm_atomic_helper_shutdown(drm); 266d76271d2SHyun Kwon drm_kms_helper_poll_fini(drm); 267d76271d2SHyun Kwon 268d76271d2SHyun Kwon zynqmp_disp_remove(dpsub); 269d76271d2SHyun Kwon zynqmp_dp_remove(dpsub); 270d76271d2SHyun Kwon 271d76271d2SHyun Kwon pm_runtime_disable(&pdev->dev); 272d76271d2SHyun Kwon clk_disable_unprepare(dpsub->apb_clk); 273d76271d2SHyun Kwon of_reserved_mem_device_release(&pdev->dev); 274d76271d2SHyun Kwon 275d76271d2SHyun Kwon return 0; 276d76271d2SHyun Kwon } 277d76271d2SHyun Kwon 278d76271d2SHyun Kwon static void zynqmp_dpsub_shutdown(struct platform_device *pdev) 279d76271d2SHyun Kwon { 280d76271d2SHyun Kwon struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev); 281d76271d2SHyun Kwon 282d76271d2SHyun Kwon drm_atomic_helper_shutdown(&dpsub->drm); 283d76271d2SHyun Kwon } 284d76271d2SHyun Kwon 285d76271d2SHyun Kwon static const struct of_device_id zynqmp_dpsub_of_match[] = { 286d76271d2SHyun Kwon { .compatible = "xlnx,zynqmp-dpsub-1.7", }, 287d76271d2SHyun Kwon { /* end of table */ }, 288d76271d2SHyun Kwon }; 289d76271d2SHyun Kwon MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match); 290d76271d2SHyun Kwon 291d76271d2SHyun Kwon static struct platform_driver zynqmp_dpsub_driver = { 292d76271d2SHyun Kwon .probe = zynqmp_dpsub_probe, 293d76271d2SHyun Kwon .remove = zynqmp_dpsub_remove, 294d76271d2SHyun Kwon .shutdown = zynqmp_dpsub_shutdown, 295d76271d2SHyun Kwon .driver = { 296d76271d2SHyun Kwon .name = "zynqmp-dpsub", 297d76271d2SHyun Kwon .pm = &zynqmp_dpsub_pm_ops, 298d76271d2SHyun Kwon .of_match_table = zynqmp_dpsub_of_match, 299d76271d2SHyun Kwon }, 300d76271d2SHyun Kwon }; 301d76271d2SHyun Kwon 302fad54534SJavier Martinez Canillas drm_module_platform_driver(zynqmp_dpsub_driver); 303d76271d2SHyun Kwon 304d76271d2SHyun Kwon MODULE_AUTHOR("Xilinx, Inc."); 305d76271d2SHyun Kwon MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver"); 306d76271d2SHyun Kwon MODULE_LICENSE("GPL v2"); 307