1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /******************************************************************************
3  *
4  * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  ******************************************************************************/
27 
28 #include "vmwgfx_kms.h"
29 #include "device_include/svga3d_surfacedefs.h"
30 #include <drm/drm_plane_helper.h>
31 #include <drm/drm_atomic.h>
32 #include <drm/drm_atomic_helper.h>
33 #include <drm/drm_damage_helper.h>
34 
35 #define vmw_crtc_to_stdu(x) \
36 	container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37 #define vmw_encoder_to_stdu(x) \
38 	container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39 #define vmw_connector_to_stdu(x) \
40 	container_of(x, struct vmw_screen_target_display_unit, base.connector)
41 
42 
43 
44 enum stdu_content_type {
45 	SAME_AS_DISPLAY = 0,
46 	SEPARATE_SURFACE,
47 	SEPARATE_BO
48 };
49 
50 /**
51  * struct vmw_stdu_dirty - closure structure for the update functions
52  *
53  * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54  * @transfer: Transfer direction for DMA command.
55  * @left: Left side of bounding box.
56  * @right: Right side of bounding box.
57  * @top: Top side of bounding box.
58  * @bottom: Bottom side of bounding box.
59  * @fb_left: Left side of the framebuffer/content bounding box
60  * @fb_top: Top of the framebuffer/content bounding box
61  * @buf: buffer object when DMA-ing between buffer and screen targets.
62  * @sid: Surface ID when copying between surface and screen targets.
63  */
64 struct vmw_stdu_dirty {
65 	struct vmw_kms_dirty base;
66 	SVGA3dTransferType  transfer;
67 	s32 left, right, top, bottom;
68 	s32 fb_left, fb_top;
69 	u32 pitch;
70 	union {
71 		struct vmw_buffer_object *buf;
72 		u32 sid;
73 	};
74 };
75 
76 /*
77  * SVGA commands that are used by this code. Please see the device headers
78  * for explanation.
79  */
80 struct vmw_stdu_update {
81 	SVGA3dCmdHeader header;
82 	SVGA3dCmdUpdateGBScreenTarget body;
83 };
84 
85 struct vmw_stdu_dma {
86 	SVGA3dCmdHeader     header;
87 	SVGA3dCmdSurfaceDMA body;
88 };
89 
90 struct vmw_stdu_surface_copy {
91 	SVGA3dCmdHeader      header;
92 	SVGA3dCmdSurfaceCopy body;
93 };
94 
95 struct vmw_stdu_update_gb_image {
96 	SVGA3dCmdHeader header;
97 	SVGA3dCmdUpdateGBImage body;
98 };
99 
100 /**
101  * struct vmw_screen_target_display_unit
102  *
103  * @base: VMW specific DU structure
104  * @display_srf: surface to be displayed.  The dimension of this will always
105  *               match the display mode.  If the display mode matches
106  *               content_vfbs dimensions, then this is a pointer into the
107  *               corresponding field in content_vfbs.  If not, then this
108  *               is a separate buffer to which content_vfbs will blit to.
109  * @content_type:  content_fb type
110  * @defined:  true if the current display unit has been initialized
111  */
112 struct vmw_screen_target_display_unit {
113 	struct vmw_display_unit base;
114 	const struct vmw_surface *display_srf;
115 	enum stdu_content_type content_fb_type;
116 	s32 display_width, display_height;
117 
118 	bool defined;
119 
120 	/* For CPU Blit */
121 	unsigned int cpp;
122 };
123 
124 
125 
126 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
127 
128 
129 
130 /******************************************************************************
131  * Screen Target Display Unit CRTC Functions
132  *****************************************************************************/
133 
134 
135 /**
136  * vmw_stdu_crtc_destroy - cleans up the STDU
137  *
138  * @crtc: used to get a reference to the containing STDU
139  */
140 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
141 {
142 	vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
143 }
144 
145 /**
146  * vmw_stdu_define_st - Defines a Screen Target
147  *
148  * @dev_priv:  VMW DRM device
149  * @stdu: display unit to create a Screen Target for
150  * @mode: The mode to set.
151  * @crtc_x: X coordinate of screen target relative to framebuffer origin.
152  * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
153  *
154  * Creates a STDU that we can used later.  This function is called whenever the
155  * framebuffer size changes.
156  *
157  * RETURNs:
158  * 0 on success, error code on failure
159  */
160 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
161 			      struct vmw_screen_target_display_unit *stdu,
162 			      struct drm_display_mode *mode,
163 			      int crtc_x, int crtc_y)
164 {
165 	struct {
166 		SVGA3dCmdHeader header;
167 		SVGA3dCmdDefineGBScreenTarget body;
168 	} *cmd;
169 
170 	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
171 
172 	if (unlikely(cmd == NULL)) {
173 		DRM_ERROR("Out of FIFO space defining Screen Target\n");
174 		return -ENOMEM;
175 	}
176 
177 	cmd->header.id   = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
178 	cmd->header.size = sizeof(cmd->body);
179 
180 	cmd->body.stid   = stdu->base.unit;
181 	cmd->body.width  = mode->hdisplay;
182 	cmd->body.height = mode->vdisplay;
183 	cmd->body.flags  = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
184 	cmd->body.dpi    = 0;
185 	cmd->body.xRoot  = crtc_x;
186 	cmd->body.yRoot  = crtc_y;
187 
188 	stdu->base.set_gui_x = cmd->body.xRoot;
189 	stdu->base.set_gui_y = cmd->body.yRoot;
190 
191 	vmw_fifo_commit(dev_priv, sizeof(*cmd));
192 
193 	stdu->defined = true;
194 	stdu->display_width  = mode->hdisplay;
195 	stdu->display_height = mode->vdisplay;
196 
197 	return 0;
198 }
199 
200 
201 
202 /**
203  * vmw_stdu_bind_st - Binds a surface to a Screen Target
204  *
205  * @dev_priv: VMW DRM device
206  * @stdu: display unit affected
207  * @res: Buffer to bind to the screen target.  Set to NULL to blank screen.
208  *
209  * Binding a surface to a Screen Target the same as flipping
210  */
211 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
212 			    struct vmw_screen_target_display_unit *stdu,
213 			    const struct vmw_resource *res)
214 {
215 	SVGA3dSurfaceImageId image;
216 
217 	struct {
218 		SVGA3dCmdHeader header;
219 		SVGA3dCmdBindGBScreenTarget body;
220 	} *cmd;
221 
222 
223 	if (!stdu->defined) {
224 		DRM_ERROR("No screen target defined\n");
225 		return -EINVAL;
226 	}
227 
228 	/* Set up image using information in vfb */
229 	memset(&image, 0, sizeof(image));
230 	image.sid = res ? res->id : SVGA3D_INVALID_ID;
231 
232 	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
233 
234 	if (unlikely(cmd == NULL)) {
235 		DRM_ERROR("Out of FIFO space binding a screen target\n");
236 		return -ENOMEM;
237 	}
238 
239 	cmd->header.id   = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
240 	cmd->header.size = sizeof(cmd->body);
241 
242 	cmd->body.stid   = stdu->base.unit;
243 	cmd->body.image  = image;
244 
245 	vmw_fifo_commit(dev_priv, sizeof(*cmd));
246 
247 	return 0;
248 }
249 
250 /**
251  * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
252  * bounding box.
253  *
254  * @cmd: Pointer to command stream.
255  * @unit: Screen target unit.
256  * @left: Left side of bounding box.
257  * @right: Right side of bounding box.
258  * @top: Top side of bounding box.
259  * @bottom: Bottom side of bounding box.
260  */
261 static void vmw_stdu_populate_update(void *cmd, int unit,
262 				     s32 left, s32 right, s32 top, s32 bottom)
263 {
264 	struct vmw_stdu_update *update = cmd;
265 
266 	update->header.id   = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
267 	update->header.size = sizeof(update->body);
268 
269 	update->body.stid   = unit;
270 	update->body.rect.x = left;
271 	update->body.rect.y = top;
272 	update->body.rect.w = right - left;
273 	update->body.rect.h = bottom - top;
274 }
275 
276 /**
277  * vmw_stdu_update_st - Full update of a Screen Target
278  *
279  * @dev_priv: VMW DRM device
280  * @stdu: display unit affected
281  *
282  * This function needs to be called whenever the content of a screen
283  * target has changed completely. Typically as a result of a backing
284  * surface change.
285  *
286  * RETURNS:
287  * 0 on success, error code on failure
288  */
289 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
290 			      struct vmw_screen_target_display_unit *stdu)
291 {
292 	struct vmw_stdu_update *cmd;
293 
294 	if (!stdu->defined) {
295 		DRM_ERROR("No screen target defined");
296 		return -EINVAL;
297 	}
298 
299 	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
300 
301 	if (unlikely(cmd == NULL)) {
302 		DRM_ERROR("Out of FIFO space updating a Screen Target\n");
303 		return -ENOMEM;
304 	}
305 
306 	vmw_stdu_populate_update(cmd, stdu->base.unit,
307 				 0, stdu->display_width,
308 				 0, stdu->display_height);
309 
310 	vmw_fifo_commit(dev_priv, sizeof(*cmd));
311 
312 	return 0;
313 }
314 
315 
316 
317 /**
318  * vmw_stdu_destroy_st - Destroy a Screen Target
319  *
320  * @dev_priv:  VMW DRM device
321  * @stdu: display unit to destroy
322  */
323 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
324 			       struct vmw_screen_target_display_unit *stdu)
325 {
326 	int    ret;
327 
328 	struct {
329 		SVGA3dCmdHeader header;
330 		SVGA3dCmdDestroyGBScreenTarget body;
331 	} *cmd;
332 
333 
334 	/* Nothing to do if not successfully defined */
335 	if (unlikely(!stdu->defined))
336 		return 0;
337 
338 	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
339 
340 	if (unlikely(cmd == NULL)) {
341 		DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
342 		return -ENOMEM;
343 	}
344 
345 	cmd->header.id   = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
346 	cmd->header.size = sizeof(cmd->body);
347 
348 	cmd->body.stid   = stdu->base.unit;
349 
350 	vmw_fifo_commit(dev_priv, sizeof(*cmd));
351 
352 	/* Force sync */
353 	ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
354 	if (unlikely(ret != 0))
355 		DRM_ERROR("Failed to sync with HW");
356 
357 	stdu->defined = false;
358 	stdu->display_width  = 0;
359 	stdu->display_height = 0;
360 
361 	return ret;
362 }
363 
364 
365 /**
366  * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
367  *
368  * @crtc: CRTC associated with the screen target
369  *
370  * This function defines/destroys a screen target
371  *
372  */
373 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
374 {
375 	struct vmw_private *dev_priv;
376 	struct vmw_screen_target_display_unit *stdu;
377 	struct drm_connector_state *conn_state;
378 	struct vmw_connector_state *vmw_conn_state;
379 	int x, y, ret;
380 
381 	stdu = vmw_crtc_to_stdu(crtc);
382 	dev_priv = vmw_priv(crtc->dev);
383 	conn_state = stdu->base.connector.state;
384 	vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
385 
386 	if (stdu->defined) {
387 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
388 		if (ret)
389 			DRM_ERROR("Failed to blank CRTC\n");
390 
391 		(void) vmw_stdu_update_st(dev_priv, stdu);
392 
393 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
394 		if (ret)
395 			DRM_ERROR("Failed to destroy Screen Target\n");
396 
397 		stdu->content_fb_type = SAME_AS_DISPLAY;
398 	}
399 
400 	if (!crtc->state->enable)
401 		return;
402 
403 	x = vmw_conn_state->gui_x;
404 	y = vmw_conn_state->gui_y;
405 
406 	vmw_svga_enable(dev_priv);
407 	ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
408 
409 	if (ret)
410 		DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
411 			  crtc->x, crtc->y);
412 }
413 
414 
415 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
416 {
417 }
418 
419 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
420 					struct drm_crtc_state *old_state)
421 {
422 }
423 
424 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
425 					 struct drm_crtc_state *old_state)
426 {
427 	struct vmw_private *dev_priv;
428 	struct vmw_screen_target_display_unit *stdu;
429 	int ret;
430 
431 
432 	if (!crtc) {
433 		DRM_ERROR("CRTC is NULL\n");
434 		return;
435 	}
436 
437 	stdu     = vmw_crtc_to_stdu(crtc);
438 	dev_priv = vmw_priv(crtc->dev);
439 
440 	if (stdu->defined) {
441 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
442 		if (ret)
443 			DRM_ERROR("Failed to blank CRTC\n");
444 
445 		(void) vmw_stdu_update_st(dev_priv, stdu);
446 
447 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
448 		if (ret)
449 			DRM_ERROR("Failed to destroy Screen Target\n");
450 
451 		stdu->content_fb_type = SAME_AS_DISPLAY;
452 	}
453 }
454 
455 /**
456  * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
457  *
458  * @dirty: The closure structure.
459  *
460  * Encodes a surface DMA command cliprect and updates the bounding box
461  * for the DMA.
462  */
463 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
464 {
465 	struct vmw_stdu_dirty *ddirty =
466 		container_of(dirty, struct vmw_stdu_dirty, base);
467 	struct vmw_stdu_dma *cmd = dirty->cmd;
468 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
469 
470 	blit += dirty->num_hits;
471 	blit->srcx = dirty->fb_x;
472 	blit->srcy = dirty->fb_y;
473 	blit->x = dirty->unit_x1;
474 	blit->y = dirty->unit_y1;
475 	blit->d = 1;
476 	blit->w = dirty->unit_x2 - dirty->unit_x1;
477 	blit->h = dirty->unit_y2 - dirty->unit_y1;
478 	dirty->num_hits++;
479 
480 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
481 		return;
482 
483 	/* Destination bounding box */
484 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
485 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
486 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
487 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
488 }
489 
490 /**
491  * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
492  *
493  * @dirty: The closure structure.
494  *
495  * Fills in the missing fields in a DMA command, and optionally encodes
496  * a screen target update command, depending on transfer direction.
497  */
498 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
499 {
500 	struct vmw_stdu_dirty *ddirty =
501 		container_of(dirty, struct vmw_stdu_dirty, base);
502 	struct vmw_screen_target_display_unit *stdu =
503 		container_of(dirty->unit, typeof(*stdu), base);
504 	struct vmw_stdu_dma *cmd = dirty->cmd;
505 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
506 	SVGA3dCmdSurfaceDMASuffix *suffix =
507 		(SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
508 	size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
509 
510 	if (!dirty->num_hits) {
511 		vmw_fifo_commit(dirty->dev_priv, 0);
512 		return;
513 	}
514 
515 	cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
516 	cmd->header.size = sizeof(cmd->body) + blit_size;
517 	vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
518 	cmd->body.guest.pitch = ddirty->pitch;
519 	cmd->body.host.sid = stdu->display_srf->res.id;
520 	cmd->body.host.face = 0;
521 	cmd->body.host.mipmap = 0;
522 	cmd->body.transfer = ddirty->transfer;
523 	suffix->suffixSize = sizeof(*suffix);
524 	suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
525 
526 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
527 		blit_size += sizeof(struct vmw_stdu_update);
528 
529 		vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
530 					 ddirty->left, ddirty->right,
531 					 ddirty->top, ddirty->bottom);
532 	}
533 
534 	vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
535 
536 	ddirty->left = ddirty->top = S32_MAX;
537 	ddirty->right = ddirty->bottom = S32_MIN;
538 }
539 
540 
541 /**
542  * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
543  *
544  * @dirty: The closure structure.
545  *
546  * This function calculates the bounding box for all the incoming clips.
547  */
548 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
549 {
550 	struct vmw_stdu_dirty *ddirty =
551 		container_of(dirty, struct vmw_stdu_dirty, base);
552 
553 	dirty->num_hits = 1;
554 
555 	/* Calculate destination bounding box */
556 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
557 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
558 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
559 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
560 
561 	/*
562 	 * Calculate content bounding box.  We only need the top-left
563 	 * coordinate because width and height will be the same as the
564 	 * destination bounding box above
565 	 */
566 	ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
567 	ddirty->fb_top  = min_t(s32, ddirty->fb_top, dirty->fb_y);
568 }
569 
570 
571 /**
572  * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
573  *
574  * @dirty: The closure structure.
575  *
576  * For the special case when we cannot create a proxy surface in a
577  * 2D VM, we have to do a CPU blit ourselves.
578  */
579 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
580 {
581 	struct vmw_stdu_dirty *ddirty =
582 		container_of(dirty, struct vmw_stdu_dirty, base);
583 	struct vmw_screen_target_display_unit *stdu =
584 		container_of(dirty->unit, typeof(*stdu), base);
585 	s32 width, height;
586 	s32 src_pitch, dst_pitch;
587 	struct ttm_buffer_object *src_bo, *dst_bo;
588 	u32 src_offset, dst_offset;
589 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
590 
591 	if (!dirty->num_hits)
592 		return;
593 
594 	width = ddirty->right - ddirty->left;
595 	height = ddirty->bottom - ddirty->top;
596 
597 	if (width == 0 || height == 0)
598 		return;
599 
600 	/* Assume we are blitting from Guest (bo) to Host (display_srf) */
601 	dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
602 	dst_bo = &stdu->display_srf->res.backup->base;
603 	dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
604 
605 	src_pitch = ddirty->pitch;
606 	src_bo = &ddirty->buf->base;
607 	src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
608 
609 	/* Swap src and dst if the assumption was wrong. */
610 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
611 		swap(dst_pitch, src_pitch);
612 		swap(dst_bo, src_bo);
613 		swap(src_offset, dst_offset);
614 	}
615 
616 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
617 			       src_bo, src_offset, src_pitch,
618 			       width * stdu->cpp, height, &diff);
619 
620 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
621 	    drm_rect_visible(&diff.rect)) {
622 		struct vmw_private *dev_priv;
623 		struct vmw_stdu_update *cmd;
624 		struct drm_clip_rect region;
625 		int ret;
626 
627 		/* We are updating the actual surface, not a proxy */
628 		region.x1 = diff.rect.x1;
629 		region.x2 = diff.rect.x2;
630 		region.y1 = diff.rect.y1;
631 		region.y2 = diff.rect.y2;
632 		ret = vmw_kms_update_proxy(
633 			(struct vmw_resource *) &stdu->display_srf->res,
634 			(const struct drm_clip_rect *) &region, 1, 1);
635 		if (ret)
636 			goto out_cleanup;
637 
638 
639 		dev_priv = vmw_priv(stdu->base.crtc.dev);
640 		cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
641 
642 		if (!cmd) {
643 			DRM_ERROR("Cannot reserve FIFO space to update STDU");
644 			goto out_cleanup;
645 		}
646 
647 		vmw_stdu_populate_update(cmd, stdu->base.unit,
648 					 region.x1, region.x2,
649 					 region.y1, region.y2);
650 
651 		vmw_fifo_commit(dev_priv, sizeof(*cmd));
652 	}
653 
654 out_cleanup:
655 	ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
656 	ddirty->right = ddirty->bottom = S32_MIN;
657 }
658 
659 /**
660  * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
661  * framebuffer and the screen target system.
662  *
663  * @dev_priv: Pointer to the device private structure.
664  * @file_priv: Pointer to a struct drm-file identifying the caller. May be
665  * set to NULL, but then @user_fence_rep must also be set to NULL.
666  * @vfb: Pointer to the buffer-object backed framebuffer.
667  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
668  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
669  * be NULL.
670  * @num_clips: Number of clip rects in @clips or @vclips.
671  * @increment: Increment to use when looping over @clips or @vclips.
672  * @to_surface: Whether to DMA to the screen target system as opposed to
673  * from the screen target system.
674  * @interruptible: Whether to perform waits interruptible if possible.
675  * @crtc: If crtc is passed, perform stdu dma on that crtc only.
676  *
677  * If DMA-ing till the screen target system, the function will also notify
678  * the screen target system that a bounding box of the cliprects has been
679  * updated.
680  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
681  * interrupted.
682  */
683 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
684 		     struct drm_file *file_priv,
685 		     struct vmw_framebuffer *vfb,
686 		     struct drm_vmw_fence_rep __user *user_fence_rep,
687 		     struct drm_clip_rect *clips,
688 		     struct drm_vmw_rect *vclips,
689 		     uint32_t num_clips,
690 		     int increment,
691 		     bool to_surface,
692 		     bool interruptible,
693 		     struct drm_crtc *crtc)
694 {
695 	struct vmw_buffer_object *buf =
696 		container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
697 	struct vmw_stdu_dirty ddirty;
698 	int ret;
699 	bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
700 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
701 
702 	/*
703 	 * VMs without 3D support don't have the surface DMA command and
704 	 * we'll be using a CPU blit, and the framebuffer should be moved out
705 	 * of VRAM.
706 	 */
707 	ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
708 	if (ret)
709 		return ret;
710 
711 	ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
712 	if (ret)
713 		goto out_unref;
714 
715 	ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
716 		SVGA3D_READ_HOST_VRAM;
717 	ddirty.left = ddirty.top = S32_MAX;
718 	ddirty.right = ddirty.bottom = S32_MIN;
719 	ddirty.fb_left = ddirty.fb_top = S32_MAX;
720 	ddirty.pitch = vfb->base.pitches[0];
721 	ddirty.buf = buf;
722 	ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
723 	ddirty.base.clip = vmw_stdu_bo_clip;
724 	ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
725 		num_clips * sizeof(SVGA3dCopyBox) +
726 		sizeof(SVGA3dCmdSurfaceDMASuffix);
727 	if (to_surface)
728 		ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
729 
730 
731 	if (cpu_blit) {
732 		ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
733 		ddirty.base.clip = vmw_stdu_bo_cpu_clip;
734 		ddirty.base.fifo_reserve_size = 0;
735 	}
736 
737 	ddirty.base.crtc = crtc;
738 
739 	ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
740 				   0, 0, num_clips, increment, &ddirty.base);
741 
742 	vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
743 					 user_fence_rep);
744 	return ret;
745 
746 out_unref:
747 	vmw_validation_unref_lists(&val_ctx);
748 	return ret;
749 }
750 
751 /**
752  * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
753  *
754  * @dirty: The closure structure.
755  *
756  * Encodes a surface copy command cliprect and updates the bounding box
757  * for the copy.
758  */
759 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
760 {
761 	struct vmw_stdu_dirty *sdirty =
762 		container_of(dirty, struct vmw_stdu_dirty, base);
763 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
764 	struct vmw_screen_target_display_unit *stdu =
765 		container_of(dirty->unit, typeof(*stdu), base);
766 
767 	if (sdirty->sid != stdu->display_srf->res.id) {
768 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
769 
770 		blit += dirty->num_hits;
771 		blit->srcx = dirty->fb_x;
772 		blit->srcy = dirty->fb_y;
773 		blit->x = dirty->unit_x1;
774 		blit->y = dirty->unit_y1;
775 		blit->d = 1;
776 		blit->w = dirty->unit_x2 - dirty->unit_x1;
777 		blit->h = dirty->unit_y2 - dirty->unit_y1;
778 	}
779 
780 	dirty->num_hits++;
781 
782 	/* Destination bounding box */
783 	sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
784 	sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
785 	sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
786 	sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
787 }
788 
789 /**
790  * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
791  * copy command.
792  *
793  * @dirty: The closure structure.
794  *
795  * Fills in the missing fields in a surface copy command, and encodes a screen
796  * target update command.
797  */
798 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
799 {
800 	struct vmw_stdu_dirty *sdirty =
801 		container_of(dirty, struct vmw_stdu_dirty, base);
802 	struct vmw_screen_target_display_unit *stdu =
803 		container_of(dirty->unit, typeof(*stdu), base);
804 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
805 	struct vmw_stdu_update *update;
806 	size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
807 	size_t commit_size;
808 
809 	if (!dirty->num_hits) {
810 		vmw_fifo_commit(dirty->dev_priv, 0);
811 		return;
812 	}
813 
814 	if (sdirty->sid != stdu->display_srf->res.id) {
815 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
816 
817 		cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
818 		cmd->header.size = sizeof(cmd->body) + blit_size;
819 		cmd->body.src.sid = sdirty->sid;
820 		cmd->body.dest.sid = stdu->display_srf->res.id;
821 		update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
822 		commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
823 	} else {
824 		update = dirty->cmd;
825 		commit_size = sizeof(*update);
826 	}
827 
828 	vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
829 				 sdirty->right, sdirty->top, sdirty->bottom);
830 
831 	vmw_fifo_commit(dirty->dev_priv, commit_size);
832 
833 	sdirty->left = sdirty->top = S32_MAX;
834 	sdirty->right = sdirty->bottom = S32_MIN;
835 }
836 
837 /**
838  * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
839  *
840  * @dev_priv: Pointer to the device private structure.
841  * @framebuffer: Pointer to the surface-buffer backed framebuffer.
842  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
843  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
844  * be NULL.
845  * @srf: Pointer to surface to blit from. If NULL, the surface attached
846  * to @framebuffer will be used.
847  * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
848  * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
849  * @num_clips: Number of clip rects in @clips.
850  * @inc: Increment to use when looping over @clips.
851  * @out_fence: If non-NULL, will return a ref-counted pointer to a
852  * struct vmw_fence_obj. The returned fence pointer may be NULL in which
853  * case the device has already synchronized.
854  * @crtc: If crtc is passed, perform surface dirty on that crtc only.
855  *
856  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
857  * interrupted.
858  */
859 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
860 			       struct vmw_framebuffer *framebuffer,
861 			       struct drm_clip_rect *clips,
862 			       struct drm_vmw_rect *vclips,
863 			       struct vmw_resource *srf,
864 			       s32 dest_x,
865 			       s32 dest_y,
866 			       unsigned num_clips, int inc,
867 			       struct vmw_fence_obj **out_fence,
868 			       struct drm_crtc *crtc)
869 {
870 	struct vmw_framebuffer_surface *vfbs =
871 		container_of(framebuffer, typeof(*vfbs), base);
872 	struct vmw_stdu_dirty sdirty;
873 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
874 	int ret;
875 
876 	if (!srf)
877 		srf = &vfbs->surface->res;
878 
879 	ret = vmw_validation_add_resource(&val_ctx, srf, 0, NULL, NULL);
880 	if (ret)
881 		return ret;
882 
883 	ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
884 	if (ret)
885 		goto out_unref;
886 
887 	if (vfbs->is_bo_proxy) {
888 		ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
889 		if (ret)
890 			goto out_finish;
891 	}
892 
893 	sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
894 	sdirty.base.clip = vmw_kms_stdu_surface_clip;
895 	sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
896 		sizeof(SVGA3dCopyBox) * num_clips +
897 		sizeof(struct vmw_stdu_update);
898 	sdirty.base.crtc = crtc;
899 	sdirty.sid = srf->id;
900 	sdirty.left = sdirty.top = S32_MAX;
901 	sdirty.right = sdirty.bottom = S32_MIN;
902 
903 	ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
904 				   dest_x, dest_y, num_clips, inc,
905 				   &sdirty.base);
906 out_finish:
907 	vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
908 					 NULL);
909 
910 	return ret;
911 
912 out_unref:
913 	vmw_validation_unref_lists(&val_ctx);
914 	return ret;
915 }
916 
917 
918 /*
919  *  Screen Target CRTC dispatch table
920  */
921 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
922 	.gamma_set = vmw_du_crtc_gamma_set,
923 	.destroy = vmw_stdu_crtc_destroy,
924 	.reset = vmw_du_crtc_reset,
925 	.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
926 	.atomic_destroy_state = vmw_du_crtc_destroy_state,
927 	.set_config = drm_atomic_helper_set_config,
928 	.page_flip = drm_atomic_helper_page_flip,
929 };
930 
931 
932 
933 /******************************************************************************
934  * Screen Target Display Unit Encoder Functions
935  *****************************************************************************/
936 
937 /**
938  * vmw_stdu_encoder_destroy - cleans up the STDU
939  *
940  * @encoder: used the get the containing STDU
941  *
942  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
943  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
944  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
945  * get called.
946  */
947 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
948 {
949 	vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
950 }
951 
952 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
953 	.destroy = vmw_stdu_encoder_destroy,
954 };
955 
956 
957 
958 /******************************************************************************
959  * Screen Target Display Unit Connector Functions
960  *****************************************************************************/
961 
962 /**
963  * vmw_stdu_connector_destroy - cleans up the STDU
964  *
965  * @connector: used to get the containing STDU
966  *
967  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
968  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
969  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
970  * get called.
971  */
972 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
973 {
974 	vmw_stdu_destroy(vmw_connector_to_stdu(connector));
975 }
976 
977 
978 
979 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
980 	.dpms = vmw_du_connector_dpms,
981 	.detect = vmw_du_connector_detect,
982 	.fill_modes = vmw_du_connector_fill_modes,
983 	.destroy = vmw_stdu_connector_destroy,
984 	.reset = vmw_du_connector_reset,
985 	.atomic_duplicate_state = vmw_du_connector_duplicate_state,
986 	.atomic_destroy_state = vmw_du_connector_destroy_state,
987 };
988 
989 
990 static const struct
991 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
992 };
993 
994 
995 
996 /******************************************************************************
997  * Screen Target Display Plane Functions
998  *****************************************************************************/
999 
1000 
1001 
1002 /**
1003  * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1004  *
1005  * @plane:  display plane
1006  * @old_state: Contains the FB to clean up
1007  *
1008  * Unpins the display surface
1009  *
1010  * Returns 0 on success
1011  */
1012 static void
1013 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1014 				  struct drm_plane_state *old_state)
1015 {
1016 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1017 
1018 	if (vps->surf)
1019 		WARN_ON(!vps->pinned);
1020 
1021 	vmw_du_plane_cleanup_fb(plane, old_state);
1022 
1023 	vps->content_fb_type = SAME_AS_DISPLAY;
1024 	vps->cpp = 0;
1025 }
1026 
1027 
1028 
1029 /**
1030  * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1031  *
1032  * @plane:  display plane
1033  * @new_state: info on the new plane state, including the FB
1034  *
1035  * This function allocates a new display surface if the content is
1036  * backed by a buffer object.  The display surface is pinned here, and it'll
1037  * be unpinned in .cleanup_fb()
1038  *
1039  * Returns 0 on success
1040  */
1041 static int
1042 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1043 				  struct drm_plane_state *new_state)
1044 {
1045 	struct vmw_private *dev_priv = vmw_priv(plane->dev);
1046 	struct drm_framebuffer *new_fb = new_state->fb;
1047 	struct vmw_framebuffer *vfb;
1048 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1049 	enum stdu_content_type new_content_type;
1050 	struct vmw_framebuffer_surface *new_vfbs;
1051 	struct drm_crtc *crtc = new_state->crtc;
1052 	uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1053 	int ret;
1054 
1055 	/* No FB to prepare */
1056 	if (!new_fb) {
1057 		if (vps->surf) {
1058 			WARN_ON(vps->pinned != 0);
1059 			vmw_surface_unreference(&vps->surf);
1060 		}
1061 
1062 		return 0;
1063 	}
1064 
1065 	vfb = vmw_framebuffer_to_vfb(new_fb);
1066 	new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1067 
1068 	if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1069 	    new_vfbs->surface->base_size.height == vdisplay)
1070 		new_content_type = SAME_AS_DISPLAY;
1071 	else if (vfb->bo)
1072 		new_content_type = SEPARATE_BO;
1073 	else
1074 		new_content_type = SEPARATE_SURFACE;
1075 
1076 	if (new_content_type != SAME_AS_DISPLAY) {
1077 		struct vmw_surface content_srf;
1078 		struct drm_vmw_size display_base_size = {0};
1079 
1080 		display_base_size.width  = hdisplay;
1081 		display_base_size.height = vdisplay;
1082 		display_base_size.depth  = 1;
1083 
1084 		/*
1085 		 * If content buffer is a buffer object, then we have to
1086 		 * construct surface info
1087 		 */
1088 		if (new_content_type == SEPARATE_BO) {
1089 
1090 			switch (new_fb->format->cpp[0]*8) {
1091 			case 32:
1092 				content_srf.format = SVGA3D_X8R8G8B8;
1093 				break;
1094 
1095 			case 16:
1096 				content_srf.format = SVGA3D_R5G6B5;
1097 				break;
1098 
1099 			case 8:
1100 				content_srf.format = SVGA3D_P8;
1101 				break;
1102 
1103 			default:
1104 				DRM_ERROR("Invalid format\n");
1105 				return -EINVAL;
1106 			}
1107 
1108 			content_srf.flags             = 0;
1109 			content_srf.mip_levels[0]     = 1;
1110 			content_srf.multisample_count = 0;
1111 			content_srf.multisample_pattern =
1112 				SVGA3D_MS_PATTERN_NONE;
1113 			content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
1114 		} else {
1115 			content_srf = *new_vfbs->surface;
1116 		}
1117 
1118 		if (vps->surf) {
1119 			struct drm_vmw_size cur_base_size = vps->surf->base_size;
1120 
1121 			if (cur_base_size.width != display_base_size.width ||
1122 			    cur_base_size.height != display_base_size.height ||
1123 			    vps->surf->format != content_srf.format) {
1124 				WARN_ON(vps->pinned != 0);
1125 				vmw_surface_unreference(&vps->surf);
1126 			}
1127 
1128 		}
1129 
1130 		if (!vps->surf) {
1131 			ret = vmw_surface_gb_priv_define
1132 				(crtc->dev,
1133 				 /* Kernel visible only */
1134 				 0,
1135 				 content_srf.flags,
1136 				 content_srf.format,
1137 				 true,  /* a scanout buffer */
1138 				 content_srf.mip_levels[0],
1139 				 content_srf.multisample_count,
1140 				 0,
1141 				 display_base_size,
1142 				 content_srf.multisample_pattern,
1143 				 content_srf.quality_level,
1144 				 &vps->surf);
1145 			if (ret != 0) {
1146 				DRM_ERROR("Couldn't allocate STDU surface.\n");
1147 				return ret;
1148 			}
1149 		}
1150 	} else {
1151 		/*
1152 		 * prepare_fb and clean_fb should only take care of pinning
1153 		 * and unpinning.  References are tracked by state objects.
1154 		 * The only time we add a reference in prepare_fb is if the
1155 		 * state object doesn't have a reference to begin with
1156 		 */
1157 		if (vps->surf) {
1158 			WARN_ON(vps->pinned != 0);
1159 			vmw_surface_unreference(&vps->surf);
1160 		}
1161 
1162 		vps->surf = vmw_surface_reference(new_vfbs->surface);
1163 	}
1164 
1165 	if (vps->surf) {
1166 
1167 		/* Pin new surface before flipping */
1168 		ret = vmw_resource_pin(&vps->surf->res, false);
1169 		if (ret)
1170 			goto out_srf_unref;
1171 
1172 		vps->pinned++;
1173 	}
1174 
1175 	vps->content_fb_type = new_content_type;
1176 
1177 	/*
1178 	 * This should only happen if the buffer object is too large to create a
1179 	 * proxy surface for.
1180 	 * If we are a 2D VM with a buffer object then we have to use CPU blit
1181 	 * so cache these mappings
1182 	 */
1183 	if (vps->content_fb_type == SEPARATE_BO &&
1184 	    !(dev_priv->capabilities & SVGA_CAP_3D))
1185 		vps->cpp = new_fb->pitches[0] / new_fb->width;
1186 
1187 	return 0;
1188 
1189 out_srf_unref:
1190 	vmw_surface_unreference(&vps->surf);
1191 	return ret;
1192 }
1193 
1194 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1195 				      uint32_t num_hits)
1196 {
1197 	return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1198 		sizeof(SVGA3dCmdSurfaceDMASuffix) +
1199 		sizeof(struct vmw_stdu_update);
1200 }
1201 
1202 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1203 					  uint32_t num_hits)
1204 {
1205 	return sizeof(struct vmw_stdu_update_gb_image) +
1206 		sizeof(struct vmw_stdu_update);
1207 }
1208 
1209 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane  *update,
1210 					 void *cmd, uint32_t num_hits)
1211 {
1212 	struct vmw_screen_target_display_unit *stdu;
1213 	struct vmw_framebuffer_bo *vfbbo;
1214 	struct vmw_stdu_dma *cmd_dma = cmd;
1215 
1216 	stdu = container_of(update->du, typeof(*stdu), base);
1217 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1218 
1219 	cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1220 	cmd_dma->header.size = sizeof(cmd_dma->body) +
1221 		sizeof(struct SVGA3dCopyBox) * num_hits +
1222 		sizeof(SVGA3dCmdSurfaceDMASuffix);
1223 	vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1224 	cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1225 	cmd_dma->body.host.sid = stdu->display_srf->res.id;
1226 	cmd_dma->body.host.face = 0;
1227 	cmd_dma->body.host.mipmap = 0;
1228 	cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1229 
1230 	return sizeof(*cmd_dma);
1231 }
1232 
1233 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane  *update,
1234 					  void *cmd, struct drm_rect *clip,
1235 					  uint32_t fb_x, uint32_t fb_y)
1236 {
1237 	struct SVGA3dCopyBox *box = cmd;
1238 
1239 	box->srcx = fb_x;
1240 	box->srcy = fb_y;
1241 	box->srcz = 0;
1242 	box->x = clip->x1;
1243 	box->y = clip->y1;
1244 	box->z = 0;
1245 	box->w = drm_rect_width(clip);
1246 	box->h = drm_rect_height(clip);
1247 	box->d = 1;
1248 
1249 	return sizeof(*box);
1250 }
1251 
1252 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane  *update,
1253 					    void *cmd, struct drm_rect *bb)
1254 {
1255 	struct vmw_screen_target_display_unit *stdu;
1256 	struct vmw_framebuffer_bo *vfbbo;
1257 	SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1258 
1259 	stdu = container_of(update->du, typeof(*stdu), base);
1260 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1261 
1262 	suffix->suffixSize = sizeof(*suffix);
1263 	suffix->maximumOffset = vfbbo->buffer->base.num_pages * PAGE_SIZE;
1264 
1265 	vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1266 				 bb->y1, bb->y2);
1267 
1268 	return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1269 }
1270 
1271 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane  *update,
1272 					 void *cmd, uint32_t num_hits)
1273 {
1274 	struct vmw_du_update_plane_buffer *bo_update =
1275 		container_of(update, typeof(*bo_update), base);
1276 
1277 	bo_update->fb_left = INT_MAX;
1278 	bo_update->fb_top = INT_MAX;
1279 
1280 	return 0;
1281 }
1282 
1283 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane  *update,
1284 				     void *cmd, struct drm_rect *clip,
1285 				     uint32_t fb_x, uint32_t fb_y)
1286 {
1287 	struct vmw_du_update_plane_buffer *bo_update =
1288 		container_of(update, typeof(*bo_update), base);
1289 
1290 	bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1291 	bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1292 
1293 	return 0;
1294 }
1295 
1296 static uint32_t
1297 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane  *update, void *cmd,
1298 				struct drm_rect *bb)
1299 {
1300 	struct vmw_du_update_plane_buffer *bo_update;
1301 	struct vmw_screen_target_display_unit *stdu;
1302 	struct vmw_framebuffer_bo *vfbbo;
1303 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1304 	struct vmw_stdu_update_gb_image *cmd_img = cmd;
1305 	struct vmw_stdu_update *cmd_update;
1306 	struct ttm_buffer_object *src_bo, *dst_bo;
1307 	u32 src_offset, dst_offset;
1308 	s32 src_pitch, dst_pitch;
1309 	s32 width, height;
1310 
1311 	bo_update = container_of(update, typeof(*bo_update), base);
1312 	stdu = container_of(update->du, typeof(*stdu), base);
1313 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1314 
1315 	width = bb->x2 - bb->x1;
1316 	height = bb->y2 - bb->y1;
1317 
1318 	diff.cpp = stdu->cpp;
1319 
1320 	dst_bo = &stdu->display_srf->res.backup->base;
1321 	dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
1322 	dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1323 
1324 	src_bo = &vfbbo->buffer->base;
1325 	src_pitch = update->vfb->base.pitches[0];
1326 	src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1327 		stdu->cpp;
1328 
1329 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1330 			       src_offset, src_pitch, width * stdu->cpp, height,
1331 			       &diff);
1332 
1333 	if (drm_rect_visible(&diff.rect)) {
1334 		SVGA3dBox *box = &cmd_img->body.box;
1335 
1336 		cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1337 		cmd_img->header.size = sizeof(cmd_img->body);
1338 		cmd_img->body.image.sid = stdu->display_srf->res.id;
1339 		cmd_img->body.image.face = 0;
1340 		cmd_img->body.image.mipmap = 0;
1341 
1342 		box->x = diff.rect.x1;
1343 		box->y = diff.rect.y1;
1344 		box->z = 0;
1345 		box->w = drm_rect_width(&diff.rect);
1346 		box->h = drm_rect_height(&diff.rect);
1347 		box->d = 1;
1348 
1349 		cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1350 		vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1351 					 diff.rect.x1, diff.rect.x2,
1352 					 diff.rect.y1, diff.rect.y2);
1353 
1354 		return sizeof(*cmd_img) + sizeof(*cmd_update);
1355 	}
1356 
1357 	return 0;
1358 }
1359 
1360 /**
1361  * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1362  * @dev_priv: device private.
1363  * @plane: plane state.
1364  * @old_state: old plane state.
1365  * @vfb: framebuffer which is blitted to display unit.
1366  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1367  *             The returned fence pointer may be NULL in which case the device
1368  *             has already synchronized.
1369  *
1370  * Return: 0 on success or a negative error code on failure.
1371  */
1372 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1373 				    struct drm_plane *plane,
1374 				    struct drm_plane_state *old_state,
1375 				    struct vmw_framebuffer *vfb,
1376 				    struct vmw_fence_obj **out_fence)
1377 {
1378 	struct vmw_du_update_plane_buffer bo_update;
1379 
1380 	memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1381 	bo_update.base.plane = plane;
1382 	bo_update.base.old_state = old_state;
1383 	bo_update.base.dev_priv = dev_priv;
1384 	bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1385 	bo_update.base.vfb = vfb;
1386 	bo_update.base.out_fence = out_fence;
1387 	bo_update.base.mutex = NULL;
1388 	bo_update.base.cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
1389 	bo_update.base.intr = false;
1390 
1391 	/*
1392 	 * VM without 3D support don't have surface DMA command and framebuffer
1393 	 * should be moved out of VRAM.
1394 	 */
1395 	if (bo_update.base.cpu_blit) {
1396 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1397 		bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1398 		bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1399 		bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1400 	} else {
1401 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1402 		bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1403 		bo_update.base.clip = vmw_stdu_bo_populate_clip;
1404 		bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1405 	}
1406 
1407 	return vmw_du_helper_plane_update(&bo_update.base);
1408 }
1409 
1410 static uint32_t
1411 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1412 					uint32_t num_hits)
1413 {
1414 	struct vmw_framebuffer_surface *vfbs;
1415 	uint32_t size = 0;
1416 
1417 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1418 
1419 	if (vfbs->is_bo_proxy)
1420 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1421 
1422 	size += sizeof(struct vmw_stdu_update);
1423 
1424 	return size;
1425 }
1426 
1427 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1428 					   uint32_t num_hits)
1429 {
1430 	struct vmw_framebuffer_surface *vfbs;
1431 	uint32_t size = 0;
1432 
1433 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1434 
1435 	if (vfbs->is_bo_proxy)
1436 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1437 
1438 	size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1439 		num_hits + sizeof(struct vmw_stdu_update);
1440 
1441 	return size;
1442 }
1443 
1444 static uint32_t
1445 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1446 {
1447 	struct vmw_framebuffer_surface *vfbs;
1448 	struct drm_plane_state *state = update->plane->state;
1449 	struct drm_plane_state *old_state = update->old_state;
1450 	struct vmw_stdu_update_gb_image *cmd_update = cmd;
1451 	struct drm_atomic_helper_damage_iter iter;
1452 	struct drm_rect clip;
1453 	uint32_t copy_size = 0;
1454 
1455 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1456 
1457 	/*
1458 	 * proxy surface is special where a buffer object type fb is wrapped
1459 	 * in a surface and need an update gb image command to sync with device.
1460 	 */
1461 	drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1462 	drm_atomic_for_each_plane_damage(&iter, &clip) {
1463 		SVGA3dBox *box = &cmd_update->body.box;
1464 
1465 		cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1466 		cmd_update->header.size = sizeof(cmd_update->body);
1467 		cmd_update->body.image.sid = vfbs->surface->res.id;
1468 		cmd_update->body.image.face = 0;
1469 		cmd_update->body.image.mipmap = 0;
1470 
1471 		box->x = clip.x1;
1472 		box->y = clip.y1;
1473 		box->z = 0;
1474 		box->w = drm_rect_width(&clip);
1475 		box->h = drm_rect_height(&clip);
1476 		box->d = 1;
1477 
1478 		copy_size += sizeof(*cmd_update);
1479 		cmd_update++;
1480 	}
1481 
1482 	return copy_size;
1483 }
1484 
1485 static uint32_t
1486 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane  *update, void *cmd,
1487 			       uint32_t num_hits)
1488 {
1489 	struct vmw_screen_target_display_unit *stdu;
1490 	struct vmw_framebuffer_surface *vfbs;
1491 	struct vmw_stdu_surface_copy *cmd_copy = cmd;
1492 
1493 	stdu = container_of(update->du, typeof(*stdu), base);
1494 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1495 
1496 	cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1497 	cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1498 		num_hits;
1499 	cmd_copy->body.src.sid = vfbs->surface->res.id;
1500 	cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1501 
1502 	return sizeof(*cmd_copy);
1503 }
1504 
1505 static uint32_t
1506 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane  *update, void *cmd,
1507 			       struct drm_rect *clip, uint32_t fb_x,
1508 			       uint32_t fb_y)
1509 {
1510 	struct SVGA3dCopyBox *box = cmd;
1511 
1512 	box->srcx = fb_x;
1513 	box->srcy = fb_y;
1514 	box->srcz = 0;
1515 	box->x = clip->x1;
1516 	box->y = clip->y1;
1517 	box->z = 0;
1518 	box->w = drm_rect_width(clip);
1519 	box->h = drm_rect_height(clip);
1520 	box->d = 1;
1521 
1522 	return sizeof(*box);
1523 }
1524 
1525 static uint32_t
1526 vmw_stdu_surface_populate_update(struct vmw_du_update_plane  *update, void *cmd,
1527 				 struct drm_rect *bb)
1528 {
1529 	vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1530 				 bb->y2);
1531 
1532 	return sizeof(struct vmw_stdu_update);
1533 }
1534 
1535 /**
1536  * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1537  * @dev_priv: Device private
1538  * @plane: Plane state
1539  * @old_state: Old plane state
1540  * @vfb: Framebuffer which is blitted to display unit
1541  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1542  *             The returned fence pointer may be NULL in which case the device
1543  *             has already synchronized.
1544  *
1545  * Return: 0 on success or a negative error code on failure.
1546  */
1547 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1548 					 struct drm_plane *plane,
1549 					 struct drm_plane_state *old_state,
1550 					 struct vmw_framebuffer *vfb,
1551 					 struct vmw_fence_obj **out_fence)
1552 {
1553 	struct vmw_du_update_plane srf_update;
1554 	struct vmw_screen_target_display_unit *stdu;
1555 	struct vmw_framebuffer_surface *vfbs;
1556 
1557 	stdu = vmw_crtc_to_stdu(plane->state->crtc);
1558 	vfbs = container_of(vfb, typeof(*vfbs), base);
1559 
1560 	memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1561 	srf_update.plane = plane;
1562 	srf_update.old_state = old_state;
1563 	srf_update.dev_priv = dev_priv;
1564 	srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1565 	srf_update.vfb = vfb;
1566 	srf_update.out_fence = out_fence;
1567 	srf_update.mutex = &dev_priv->cmdbuf_mutex;
1568 	srf_update.cpu_blit = false;
1569 	srf_update.intr = true;
1570 
1571 	if (vfbs->is_bo_proxy)
1572 		srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1573 
1574 	if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1575 		srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1576 		srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1577 		srf_update.clip = vmw_stdu_surface_populate_clip;
1578 	} else {
1579 		srf_update.calc_fifo_size =
1580 			vmw_stdu_surface_fifo_size_same_display;
1581 	}
1582 
1583 	srf_update.post_clip = vmw_stdu_surface_populate_update;
1584 
1585 	return vmw_du_helper_plane_update(&srf_update);
1586 }
1587 
1588 /**
1589  * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1590  * @plane: display plane
1591  * @old_state: Only used to get crtc info
1592  *
1593  * Formally update stdu->display_srf to the new plane, and bind the new
1594  * plane STDU.  This function is called during the commit phase when
1595  * all the preparation have been done and all the configurations have
1596  * been checked.
1597  */
1598 static void
1599 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1600 				     struct drm_plane_state *old_state)
1601 {
1602 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1603 	struct drm_crtc *crtc = plane->state->crtc;
1604 	struct vmw_screen_target_display_unit *stdu;
1605 	struct drm_pending_vblank_event *event;
1606 	struct vmw_fence_obj *fence = NULL;
1607 	struct vmw_private *dev_priv;
1608 	int ret;
1609 
1610 	/* If case of device error, maintain consistent atomic state */
1611 	if (crtc && plane->state->fb) {
1612 		struct vmw_framebuffer *vfb =
1613 			vmw_framebuffer_to_vfb(plane->state->fb);
1614 		stdu = vmw_crtc_to_stdu(crtc);
1615 		dev_priv = vmw_priv(crtc->dev);
1616 
1617 		stdu->display_srf = vps->surf;
1618 		stdu->content_fb_type = vps->content_fb_type;
1619 		stdu->cpp = vps->cpp;
1620 
1621 		ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1622 		if (ret)
1623 			DRM_ERROR("Failed to bind surface to STDU.\n");
1624 
1625 		if (vfb->bo)
1626 			ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1627 						       old_state, vfb, &fence);
1628 		else
1629 			ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1630 							    old_state, vfb,
1631 							    &fence);
1632 		if (ret)
1633 			DRM_ERROR("Failed to update STDU.\n");
1634 	} else {
1635 		crtc = old_state->crtc;
1636 		stdu = vmw_crtc_to_stdu(crtc);
1637 		dev_priv = vmw_priv(crtc->dev);
1638 
1639 		/* Blank STDU when fb and crtc are NULL */
1640 		if (!stdu->defined)
1641 			return;
1642 
1643 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1644 		if (ret)
1645 			DRM_ERROR("Failed to blank STDU\n");
1646 
1647 		ret = vmw_stdu_update_st(dev_priv, stdu);
1648 		if (ret)
1649 			DRM_ERROR("Failed to update STDU.\n");
1650 
1651 		return;
1652 	}
1653 
1654 	/* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */
1655 	event = crtc->state->event;
1656 	if (event && fence) {
1657 		struct drm_file *file_priv = event->base.file_priv;
1658 
1659 		ret = vmw_event_fence_action_queue(file_priv,
1660 						   fence,
1661 						   &event->base,
1662 						   &event->event.vbl.tv_sec,
1663 						   &event->event.vbl.tv_usec,
1664 						   true);
1665 		if (ret)
1666 			DRM_ERROR("Failed to queue event on fence.\n");
1667 		else
1668 			crtc->state->event = NULL;
1669 	}
1670 
1671 	if (fence)
1672 		vmw_fence_obj_unreference(&fence);
1673 }
1674 
1675 
1676 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1677 	.update_plane = drm_atomic_helper_update_plane,
1678 	.disable_plane = drm_atomic_helper_disable_plane,
1679 	.destroy = vmw_du_primary_plane_destroy,
1680 	.reset = vmw_du_plane_reset,
1681 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1682 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1683 };
1684 
1685 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1686 	.update_plane = drm_atomic_helper_update_plane,
1687 	.disable_plane = drm_atomic_helper_disable_plane,
1688 	.destroy = vmw_du_cursor_plane_destroy,
1689 	.reset = vmw_du_plane_reset,
1690 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1691 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1692 };
1693 
1694 
1695 /*
1696  * Atomic Helpers
1697  */
1698 static const struct
1699 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1700 	.atomic_check = vmw_du_cursor_plane_atomic_check,
1701 	.atomic_update = vmw_du_cursor_plane_atomic_update,
1702 	.prepare_fb = vmw_du_cursor_plane_prepare_fb,
1703 	.cleanup_fb = vmw_du_plane_cleanup_fb,
1704 };
1705 
1706 static const struct
1707 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1708 	.atomic_check = vmw_du_primary_plane_atomic_check,
1709 	.atomic_update = vmw_stdu_primary_plane_atomic_update,
1710 	.prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1711 	.cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1712 };
1713 
1714 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1715 	.prepare = vmw_stdu_crtc_helper_prepare,
1716 	.mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1717 	.atomic_check = vmw_du_crtc_atomic_check,
1718 	.atomic_begin = vmw_du_crtc_atomic_begin,
1719 	.atomic_flush = vmw_du_crtc_atomic_flush,
1720 	.atomic_enable = vmw_stdu_crtc_atomic_enable,
1721 	.atomic_disable = vmw_stdu_crtc_atomic_disable,
1722 };
1723 
1724 
1725 /**
1726  * vmw_stdu_init - Sets up a Screen Target Display Unit
1727  *
1728  * @dev_priv: VMW DRM device
1729  * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1730  *
1731  * This function is called once per CRTC, and allocates one Screen Target
1732  * display unit to represent that CRTC.  Since the SVGA device does not separate
1733  * out encoder and connector, they are represented as part of the STDU as well.
1734  */
1735 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1736 {
1737 	struct vmw_screen_target_display_unit *stdu;
1738 	struct drm_device *dev = dev_priv->dev;
1739 	struct drm_connector *connector;
1740 	struct drm_encoder *encoder;
1741 	struct drm_plane *primary, *cursor;
1742 	struct drm_crtc *crtc;
1743 	int    ret;
1744 
1745 
1746 	stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1747 	if (!stdu)
1748 		return -ENOMEM;
1749 
1750 	stdu->base.unit = unit;
1751 	crtc = &stdu->base.crtc;
1752 	encoder = &stdu->base.encoder;
1753 	connector = &stdu->base.connector;
1754 	primary = &stdu->base.primary;
1755 	cursor = &stdu->base.cursor;
1756 
1757 	stdu->base.pref_active = (unit == 0);
1758 	stdu->base.pref_width  = dev_priv->initial_width;
1759 	stdu->base.pref_height = dev_priv->initial_height;
1760 	stdu->base.is_implicit = false;
1761 
1762 	/* Initialize primary plane */
1763 	vmw_du_plane_reset(primary);
1764 
1765 	ret = drm_universal_plane_init(dev, primary,
1766 				       0, &vmw_stdu_plane_funcs,
1767 				       vmw_primary_plane_formats,
1768 				       ARRAY_SIZE(vmw_primary_plane_formats),
1769 				       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1770 	if (ret) {
1771 		DRM_ERROR("Failed to initialize primary plane");
1772 		goto err_free;
1773 	}
1774 
1775 	drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1776 	drm_plane_enable_fb_damage_clips(primary);
1777 
1778 	/* Initialize cursor plane */
1779 	vmw_du_plane_reset(cursor);
1780 
1781 	ret = drm_universal_plane_init(dev, cursor,
1782 			0, &vmw_stdu_cursor_funcs,
1783 			vmw_cursor_plane_formats,
1784 			ARRAY_SIZE(vmw_cursor_plane_formats),
1785 			NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1786 	if (ret) {
1787 		DRM_ERROR("Failed to initialize cursor plane");
1788 		drm_plane_cleanup(&stdu->base.primary);
1789 		goto err_free;
1790 	}
1791 
1792 	drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1793 
1794 	vmw_du_connector_reset(connector);
1795 
1796 	ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1797 				 DRM_MODE_CONNECTOR_VIRTUAL);
1798 	if (ret) {
1799 		DRM_ERROR("Failed to initialize connector\n");
1800 		goto err_free;
1801 	}
1802 
1803 	drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1804 	connector->status = vmw_du_connector_detect(connector, false);
1805 
1806 	ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1807 			       DRM_MODE_ENCODER_VIRTUAL, NULL);
1808 	if (ret) {
1809 		DRM_ERROR("Failed to initialize encoder\n");
1810 		goto err_free_connector;
1811 	}
1812 
1813 	(void) drm_connector_attach_encoder(connector, encoder);
1814 	encoder->possible_crtcs = (1 << unit);
1815 	encoder->possible_clones = 0;
1816 
1817 	ret = drm_connector_register(connector);
1818 	if (ret) {
1819 		DRM_ERROR("Failed to register connector\n");
1820 		goto err_free_encoder;
1821 	}
1822 
1823 	vmw_du_crtc_reset(crtc);
1824 	ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1825 					&stdu->base.cursor,
1826 					&vmw_stdu_crtc_funcs, NULL);
1827 	if (ret) {
1828 		DRM_ERROR("Failed to initialize CRTC\n");
1829 		goto err_free_unregister;
1830 	}
1831 
1832 	drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1833 
1834 	drm_mode_crtc_set_gamma_size(crtc, 256);
1835 
1836 	drm_object_attach_property(&connector->base,
1837 				   dev_priv->hotplug_mode_update_property, 1);
1838 	drm_object_attach_property(&connector->base,
1839 				   dev->mode_config.suggested_x_property, 0);
1840 	drm_object_attach_property(&connector->base,
1841 				   dev->mode_config.suggested_y_property, 0);
1842 	return 0;
1843 
1844 err_free_unregister:
1845 	drm_connector_unregister(connector);
1846 err_free_encoder:
1847 	drm_encoder_cleanup(encoder);
1848 err_free_connector:
1849 	drm_connector_cleanup(connector);
1850 err_free:
1851 	kfree(stdu);
1852 	return ret;
1853 }
1854 
1855 
1856 
1857 /**
1858  *  vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1859  *
1860  *  @stdu:  Screen Target Display Unit to be destroyed
1861  *
1862  *  Clean up after vmw_stdu_init
1863  */
1864 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1865 {
1866 	vmw_du_cleanup(&stdu->base);
1867 	kfree(stdu);
1868 }
1869 
1870 
1871 
1872 /******************************************************************************
1873  * Screen Target Display KMS Functions
1874  *
1875  * These functions are called by the common KMS code in vmwgfx_kms.c
1876  *****************************************************************************/
1877 
1878 /**
1879  * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1880  *
1881  * @dev_priv: VMW DRM device
1882  *
1883  * This function initialize a Screen Target based display device.  It checks
1884  * the capability bits to make sure the underlying hardware can support
1885  * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1886  * Units, as supported by the display hardware.
1887  *
1888  * RETURNS:
1889  * 0 on success, error code otherwise
1890  */
1891 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1892 {
1893 	struct drm_device *dev = dev_priv->dev;
1894 	int i, ret;
1895 
1896 
1897 	/* Do nothing if Screen Target support is turned off */
1898 	if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1899 		return -ENOSYS;
1900 
1901 	if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1902 		return -ENOSYS;
1903 
1904 	ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1905 	if (unlikely(ret != 0))
1906 		return ret;
1907 
1908 	dev_priv->active_display_unit = vmw_du_screen_target;
1909 
1910 	for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1911 		ret = vmw_stdu_init(dev_priv, i);
1912 
1913 		if (unlikely(ret != 0)) {
1914 			DRM_ERROR("Failed to initialize STDU %d", i);
1915 			return ret;
1916 		}
1917 	}
1918 
1919 	DRM_INFO("Screen Target Display device initialized\n");
1920 
1921 	return 0;
1922 }
1923