1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /****************************************************************************** 3 * 4 * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 ******************************************************************************/ 27 28 #include <drm/drm_atomic.h> 29 #include <drm/drm_atomic_helper.h> 30 #include <drm/drm_damage_helper.h> 31 #include <drm/drm_fourcc.h> 32 #include <drm/drm_plane_helper.h> 33 #include <drm/drm_vblank.h> 34 35 #include "vmwgfx_kms.h" 36 #include "vmw_surface_cache.h" 37 38 #define vmw_crtc_to_stdu(x) \ 39 container_of(x, struct vmw_screen_target_display_unit, base.crtc) 40 #define vmw_encoder_to_stdu(x) \ 41 container_of(x, struct vmw_screen_target_display_unit, base.encoder) 42 #define vmw_connector_to_stdu(x) \ 43 container_of(x, struct vmw_screen_target_display_unit, base.connector) 44 45 46 47 enum stdu_content_type { 48 SAME_AS_DISPLAY = 0, 49 SEPARATE_SURFACE, 50 SEPARATE_BO 51 }; 52 53 /** 54 * struct vmw_stdu_dirty - closure structure for the update functions 55 * 56 * @base: The base type we derive from. Used by vmw_kms_helper_dirty(). 57 * @transfer: Transfer direction for DMA command. 58 * @left: Left side of bounding box. 59 * @right: Right side of bounding box. 60 * @top: Top side of bounding box. 61 * @bottom: Bottom side of bounding box. 62 * @fb_left: Left side of the framebuffer/content bounding box 63 * @fb_top: Top of the framebuffer/content bounding box 64 * @pitch: framebuffer pitch (stride) 65 * @buf: buffer object when DMA-ing between buffer and screen targets. 66 * @sid: Surface ID when copying between surface and screen targets. 67 */ 68 struct vmw_stdu_dirty { 69 struct vmw_kms_dirty base; 70 SVGA3dTransferType transfer; 71 s32 left, right, top, bottom; 72 s32 fb_left, fb_top; 73 u32 pitch; 74 union { 75 struct vmw_buffer_object *buf; 76 u32 sid; 77 }; 78 }; 79 80 /* 81 * SVGA commands that are used by this code. Please see the device headers 82 * for explanation. 83 */ 84 struct vmw_stdu_update { 85 SVGA3dCmdHeader header; 86 SVGA3dCmdUpdateGBScreenTarget body; 87 }; 88 89 struct vmw_stdu_dma { 90 SVGA3dCmdHeader header; 91 SVGA3dCmdSurfaceDMA body; 92 }; 93 94 struct vmw_stdu_surface_copy { 95 SVGA3dCmdHeader header; 96 SVGA3dCmdSurfaceCopy body; 97 }; 98 99 struct vmw_stdu_update_gb_image { 100 SVGA3dCmdHeader header; 101 SVGA3dCmdUpdateGBImage body; 102 }; 103 104 /** 105 * struct vmw_screen_target_display_unit 106 * 107 * @base: VMW specific DU structure 108 * @display_srf: surface to be displayed. The dimension of this will always 109 * match the display mode. If the display mode matches 110 * content_vfbs dimensions, then this is a pointer into the 111 * corresponding field in content_vfbs. If not, then this 112 * is a separate buffer to which content_vfbs will blit to. 113 * @content_fb_type: content_fb type 114 * @display_width: display width 115 * @display_height: display height 116 * @defined: true if the current display unit has been initialized 117 * @cpp: Bytes per pixel 118 */ 119 struct vmw_screen_target_display_unit { 120 struct vmw_display_unit base; 121 struct vmw_surface *display_srf; 122 enum stdu_content_type content_fb_type; 123 s32 display_width, display_height; 124 125 bool defined; 126 127 /* For CPU Blit */ 128 unsigned int cpp; 129 }; 130 131 132 133 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu); 134 135 136 137 /****************************************************************************** 138 * Screen Target Display Unit CRTC Functions 139 *****************************************************************************/ 140 141 142 /** 143 * vmw_stdu_crtc_destroy - cleans up the STDU 144 * 145 * @crtc: used to get a reference to the containing STDU 146 */ 147 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc) 148 { 149 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc)); 150 } 151 152 /** 153 * vmw_stdu_define_st - Defines a Screen Target 154 * 155 * @dev_priv: VMW DRM device 156 * @stdu: display unit to create a Screen Target for 157 * @mode: The mode to set. 158 * @crtc_x: X coordinate of screen target relative to framebuffer origin. 159 * @crtc_y: Y coordinate of screen target relative to framebuffer origin. 160 * 161 * Creates a STDU that we can used later. This function is called whenever the 162 * framebuffer size changes. 163 * 164 * RETURNs: 165 * 0 on success, error code on failure 166 */ 167 static int vmw_stdu_define_st(struct vmw_private *dev_priv, 168 struct vmw_screen_target_display_unit *stdu, 169 struct drm_display_mode *mode, 170 int crtc_x, int crtc_y) 171 { 172 struct { 173 SVGA3dCmdHeader header; 174 SVGA3dCmdDefineGBScreenTarget body; 175 } *cmd; 176 177 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 178 if (unlikely(cmd == NULL)) 179 return -ENOMEM; 180 181 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET; 182 cmd->header.size = sizeof(cmd->body); 183 184 cmd->body.stid = stdu->base.unit; 185 cmd->body.width = mode->hdisplay; 186 cmd->body.height = mode->vdisplay; 187 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0; 188 cmd->body.dpi = 0; 189 cmd->body.xRoot = crtc_x; 190 cmd->body.yRoot = crtc_y; 191 192 stdu->base.set_gui_x = cmd->body.xRoot; 193 stdu->base.set_gui_y = cmd->body.yRoot; 194 195 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 196 197 stdu->defined = true; 198 stdu->display_width = mode->hdisplay; 199 stdu->display_height = mode->vdisplay; 200 201 return 0; 202 } 203 204 205 206 /** 207 * vmw_stdu_bind_st - Binds a surface to a Screen Target 208 * 209 * @dev_priv: VMW DRM device 210 * @stdu: display unit affected 211 * @res: Buffer to bind to the screen target. Set to NULL to blank screen. 212 * 213 * Binding a surface to a Screen Target the same as flipping 214 */ 215 static int vmw_stdu_bind_st(struct vmw_private *dev_priv, 216 struct vmw_screen_target_display_unit *stdu, 217 const struct vmw_resource *res) 218 { 219 SVGA3dSurfaceImageId image; 220 221 struct { 222 SVGA3dCmdHeader header; 223 SVGA3dCmdBindGBScreenTarget body; 224 } *cmd; 225 226 227 if (!stdu->defined) { 228 DRM_ERROR("No screen target defined\n"); 229 return -EINVAL; 230 } 231 232 /* Set up image using information in vfb */ 233 memset(&image, 0, sizeof(image)); 234 image.sid = res ? res->id : SVGA3D_INVALID_ID; 235 236 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 237 if (unlikely(cmd == NULL)) 238 return -ENOMEM; 239 240 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET; 241 cmd->header.size = sizeof(cmd->body); 242 243 cmd->body.stid = stdu->base.unit; 244 cmd->body.image = image; 245 246 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 247 248 return 0; 249 } 250 251 /** 252 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a 253 * bounding box. 254 * 255 * @cmd: Pointer to command stream. 256 * @unit: Screen target unit. 257 * @left: Left side of bounding box. 258 * @right: Right side of bounding box. 259 * @top: Top side of bounding box. 260 * @bottom: Bottom side of bounding box. 261 */ 262 static void vmw_stdu_populate_update(void *cmd, int unit, 263 s32 left, s32 right, s32 top, s32 bottom) 264 { 265 struct vmw_stdu_update *update = cmd; 266 267 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET; 268 update->header.size = sizeof(update->body); 269 270 update->body.stid = unit; 271 update->body.rect.x = left; 272 update->body.rect.y = top; 273 update->body.rect.w = right - left; 274 update->body.rect.h = bottom - top; 275 } 276 277 /** 278 * vmw_stdu_update_st - Full update of a Screen Target 279 * 280 * @dev_priv: VMW DRM device 281 * @stdu: display unit affected 282 * 283 * This function needs to be called whenever the content of a screen 284 * target has changed completely. Typically as a result of a backing 285 * surface change. 286 * 287 * RETURNS: 288 * 0 on success, error code on failure 289 */ 290 static int vmw_stdu_update_st(struct vmw_private *dev_priv, 291 struct vmw_screen_target_display_unit *stdu) 292 { 293 struct vmw_stdu_update *cmd; 294 295 if (!stdu->defined) { 296 DRM_ERROR("No screen target defined"); 297 return -EINVAL; 298 } 299 300 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 301 if (unlikely(cmd == NULL)) 302 return -ENOMEM; 303 304 vmw_stdu_populate_update(cmd, stdu->base.unit, 305 0, stdu->display_width, 306 0, stdu->display_height); 307 308 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 309 310 return 0; 311 } 312 313 314 315 /** 316 * vmw_stdu_destroy_st - Destroy a Screen Target 317 * 318 * @dev_priv: VMW DRM device 319 * @stdu: display unit to destroy 320 */ 321 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv, 322 struct vmw_screen_target_display_unit *stdu) 323 { 324 int ret; 325 326 struct { 327 SVGA3dCmdHeader header; 328 SVGA3dCmdDestroyGBScreenTarget body; 329 } *cmd; 330 331 332 /* Nothing to do if not successfully defined */ 333 if (unlikely(!stdu->defined)) 334 return 0; 335 336 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 337 if (unlikely(cmd == NULL)) 338 return -ENOMEM; 339 340 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET; 341 cmd->header.size = sizeof(cmd->body); 342 343 cmd->body.stid = stdu->base.unit; 344 345 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 346 347 /* Force sync */ 348 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ); 349 if (unlikely(ret != 0)) 350 DRM_ERROR("Failed to sync with HW"); 351 352 stdu->defined = false; 353 stdu->display_width = 0; 354 stdu->display_height = 0; 355 356 return ret; 357 } 358 359 360 /** 361 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size 362 * 363 * @crtc: CRTC associated with the screen target 364 * 365 * This function defines/destroys a screen target 366 * 367 */ 368 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc) 369 { 370 struct vmw_private *dev_priv; 371 struct vmw_screen_target_display_unit *stdu; 372 struct drm_connector_state *conn_state; 373 struct vmw_connector_state *vmw_conn_state; 374 int x, y, ret; 375 376 stdu = vmw_crtc_to_stdu(crtc); 377 dev_priv = vmw_priv(crtc->dev); 378 conn_state = stdu->base.connector.state; 379 vmw_conn_state = vmw_connector_state_to_vcs(conn_state); 380 381 if (stdu->defined) { 382 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL); 383 if (ret) 384 DRM_ERROR("Failed to blank CRTC\n"); 385 386 (void) vmw_stdu_update_st(dev_priv, stdu); 387 388 ret = vmw_stdu_destroy_st(dev_priv, stdu); 389 if (ret) 390 DRM_ERROR("Failed to destroy Screen Target\n"); 391 392 stdu->content_fb_type = SAME_AS_DISPLAY; 393 } 394 395 if (!crtc->state->enable) 396 return; 397 398 x = vmw_conn_state->gui_x; 399 y = vmw_conn_state->gui_y; 400 401 vmw_svga_enable(dev_priv); 402 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y); 403 404 if (ret) 405 DRM_ERROR("Failed to define Screen Target of size %dx%d\n", 406 crtc->x, crtc->y); 407 } 408 409 410 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc) 411 { 412 } 413 414 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc, 415 struct drm_atomic_state *state) 416 { 417 } 418 419 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc, 420 struct drm_atomic_state *state) 421 { 422 struct vmw_private *dev_priv; 423 struct vmw_screen_target_display_unit *stdu; 424 int ret; 425 426 427 if (!crtc) { 428 DRM_ERROR("CRTC is NULL\n"); 429 return; 430 } 431 432 stdu = vmw_crtc_to_stdu(crtc); 433 dev_priv = vmw_priv(crtc->dev); 434 435 if (stdu->defined) { 436 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL); 437 if (ret) 438 DRM_ERROR("Failed to blank CRTC\n"); 439 440 (void) vmw_stdu_update_st(dev_priv, stdu); 441 442 ret = vmw_stdu_destroy_st(dev_priv, stdu); 443 if (ret) 444 DRM_ERROR("Failed to destroy Screen Target\n"); 445 446 stdu->content_fb_type = SAME_AS_DISPLAY; 447 } 448 } 449 450 /** 451 * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect 452 * 453 * @dirty: The closure structure. 454 * 455 * Encodes a surface DMA command cliprect and updates the bounding box 456 * for the DMA. 457 */ 458 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty) 459 { 460 struct vmw_stdu_dirty *ddirty = 461 container_of(dirty, struct vmw_stdu_dirty, base); 462 struct vmw_stdu_dma *cmd = dirty->cmd; 463 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1]; 464 465 blit += dirty->num_hits; 466 blit->srcx = dirty->fb_x; 467 blit->srcy = dirty->fb_y; 468 blit->x = dirty->unit_x1; 469 blit->y = dirty->unit_y1; 470 blit->d = 1; 471 blit->w = dirty->unit_x2 - dirty->unit_x1; 472 blit->h = dirty->unit_y2 - dirty->unit_y1; 473 dirty->num_hits++; 474 475 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) 476 return; 477 478 /* Destination bounding box */ 479 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1); 480 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1); 481 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2); 482 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2); 483 } 484 485 /** 486 * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command. 487 * 488 * @dirty: The closure structure. 489 * 490 * Fills in the missing fields in a DMA command, and optionally encodes 491 * a screen target update command, depending on transfer direction. 492 */ 493 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty) 494 { 495 struct vmw_stdu_dirty *ddirty = 496 container_of(dirty, struct vmw_stdu_dirty, base); 497 struct vmw_screen_target_display_unit *stdu = 498 container_of(dirty->unit, typeof(*stdu), base); 499 struct vmw_stdu_dma *cmd = dirty->cmd; 500 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1]; 501 SVGA3dCmdSurfaceDMASuffix *suffix = 502 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits]; 503 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix); 504 505 if (!dirty->num_hits) { 506 vmw_cmd_commit(dirty->dev_priv, 0); 507 return; 508 } 509 510 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA; 511 cmd->header.size = sizeof(cmd->body) + blit_size; 512 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr); 513 cmd->body.guest.pitch = ddirty->pitch; 514 cmd->body.host.sid = stdu->display_srf->res.id; 515 cmd->body.host.face = 0; 516 cmd->body.host.mipmap = 0; 517 cmd->body.transfer = ddirty->transfer; 518 suffix->suffixSize = sizeof(*suffix); 519 suffix->maximumOffset = ddirty->buf->base.base.size; 520 521 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) { 522 blit_size += sizeof(struct vmw_stdu_update); 523 524 vmw_stdu_populate_update(&suffix[1], stdu->base.unit, 525 ddirty->left, ddirty->right, 526 ddirty->top, ddirty->bottom); 527 } 528 529 vmw_cmd_commit(dirty->dev_priv, sizeof(*cmd) + blit_size); 530 531 stdu->display_srf->res.res_dirty = true; 532 ddirty->left = ddirty->top = S32_MAX; 533 ddirty->right = ddirty->bottom = S32_MIN; 534 } 535 536 537 /** 538 * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit 539 * 540 * @dirty: The closure structure. 541 * 542 * This function calculates the bounding box for all the incoming clips. 543 */ 544 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty) 545 { 546 struct vmw_stdu_dirty *ddirty = 547 container_of(dirty, struct vmw_stdu_dirty, base); 548 549 dirty->num_hits = 1; 550 551 /* Calculate destination bounding box */ 552 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1); 553 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1); 554 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2); 555 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2); 556 557 /* 558 * Calculate content bounding box. We only need the top-left 559 * coordinate because width and height will be the same as the 560 * destination bounding box above 561 */ 562 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x); 563 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y); 564 } 565 566 567 /** 568 * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object 569 * 570 * @dirty: The closure structure. 571 * 572 * For the special case when we cannot create a proxy surface in a 573 * 2D VM, we have to do a CPU blit ourselves. 574 */ 575 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty) 576 { 577 struct vmw_stdu_dirty *ddirty = 578 container_of(dirty, struct vmw_stdu_dirty, base); 579 struct vmw_screen_target_display_unit *stdu = 580 container_of(dirty->unit, typeof(*stdu), base); 581 s32 width, height; 582 s32 src_pitch, dst_pitch; 583 struct ttm_buffer_object *src_bo, *dst_bo; 584 u32 src_offset, dst_offset; 585 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp); 586 587 if (!dirty->num_hits) 588 return; 589 590 width = ddirty->right - ddirty->left; 591 height = ddirty->bottom - ddirty->top; 592 593 if (width == 0 || height == 0) 594 return; 595 596 /* Assume we are blitting from Guest (bo) to Host (display_srf) */ 597 dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp; 598 dst_bo = &stdu->display_srf->res.backup->base; 599 dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp; 600 601 src_pitch = ddirty->pitch; 602 src_bo = &ddirty->buf->base; 603 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp; 604 605 /* Swap src and dst if the assumption was wrong. */ 606 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) { 607 swap(dst_pitch, src_pitch); 608 swap(dst_bo, src_bo); 609 swap(src_offset, dst_offset); 610 } 611 612 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, 613 src_bo, src_offset, src_pitch, 614 width * stdu->cpp, height, &diff); 615 616 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM && 617 drm_rect_visible(&diff.rect)) { 618 struct vmw_private *dev_priv; 619 struct vmw_stdu_update *cmd; 620 struct drm_clip_rect region; 621 int ret; 622 623 /* We are updating the actual surface, not a proxy */ 624 region.x1 = diff.rect.x1; 625 region.x2 = diff.rect.x2; 626 region.y1 = diff.rect.y1; 627 region.y2 = diff.rect.y2; 628 ret = vmw_kms_update_proxy(&stdu->display_srf->res, ®ion, 629 1, 1); 630 if (ret) 631 goto out_cleanup; 632 633 634 dev_priv = vmw_priv(stdu->base.crtc.dev); 635 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 636 if (!cmd) 637 goto out_cleanup; 638 639 vmw_stdu_populate_update(cmd, stdu->base.unit, 640 region.x1, region.x2, 641 region.y1, region.y2); 642 643 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 644 } 645 646 out_cleanup: 647 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX; 648 ddirty->right = ddirty->bottom = S32_MIN; 649 } 650 651 /** 652 * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed 653 * framebuffer and the screen target system. 654 * 655 * @dev_priv: Pointer to the device private structure. 656 * @file_priv: Pointer to a struct drm-file identifying the caller. May be 657 * set to NULL, but then @user_fence_rep must also be set to NULL. 658 * @vfb: Pointer to the buffer-object backed framebuffer. 659 * @user_fence_rep: User-space provided structure for fence information. 660 * @clips: Array of clip rects. Either @clips or @vclips must be NULL. 661 * @vclips: Alternate array of clip rects. Either @clips or @vclips must 662 * be NULL. 663 * @num_clips: Number of clip rects in @clips or @vclips. 664 * @increment: Increment to use when looping over @clips or @vclips. 665 * @to_surface: Whether to DMA to the screen target system as opposed to 666 * from the screen target system. 667 * @interruptible: Whether to perform waits interruptible if possible. 668 * @crtc: If crtc is passed, perform stdu dma on that crtc only. 669 * 670 * If DMA-ing till the screen target system, the function will also notify 671 * the screen target system that a bounding box of the cliprects has been 672 * updated. 673 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if 674 * interrupted. 675 */ 676 int vmw_kms_stdu_dma(struct vmw_private *dev_priv, 677 struct drm_file *file_priv, 678 struct vmw_framebuffer *vfb, 679 struct drm_vmw_fence_rep __user *user_fence_rep, 680 struct drm_clip_rect *clips, 681 struct drm_vmw_rect *vclips, 682 uint32_t num_clips, 683 int increment, 684 bool to_surface, 685 bool interruptible, 686 struct drm_crtc *crtc) 687 { 688 struct vmw_buffer_object *buf = 689 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer; 690 struct vmw_stdu_dirty ddirty; 691 int ret; 692 bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D); 693 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); 694 695 /* 696 * VMs without 3D support don't have the surface DMA command and 697 * we'll be using a CPU blit, and the framebuffer should be moved out 698 * of VRAM. 699 */ 700 ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit); 701 if (ret) 702 return ret; 703 704 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible); 705 if (ret) 706 goto out_unref; 707 708 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM : 709 SVGA3D_READ_HOST_VRAM; 710 ddirty.left = ddirty.top = S32_MAX; 711 ddirty.right = ddirty.bottom = S32_MIN; 712 ddirty.fb_left = ddirty.fb_top = S32_MAX; 713 ddirty.pitch = vfb->base.pitches[0]; 714 ddirty.buf = buf; 715 ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit; 716 ddirty.base.clip = vmw_stdu_bo_clip; 717 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) + 718 num_clips * sizeof(SVGA3dCopyBox) + 719 sizeof(SVGA3dCmdSurfaceDMASuffix); 720 if (to_surface) 721 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update); 722 723 724 if (cpu_blit) { 725 ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit; 726 ddirty.base.clip = vmw_stdu_bo_cpu_clip; 727 ddirty.base.fifo_reserve_size = 0; 728 } 729 730 ddirty.base.crtc = crtc; 731 732 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips, 733 0, 0, num_clips, increment, &ddirty.base); 734 735 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL, 736 user_fence_rep); 737 return ret; 738 739 out_unref: 740 vmw_validation_unref_lists(&val_ctx); 741 return ret; 742 } 743 744 /** 745 * vmw_kms_stdu_surface_clip - Callback to encode a surface copy command cliprect 746 * 747 * @dirty: The closure structure. 748 * 749 * Encodes a surface copy command cliprect and updates the bounding box 750 * for the copy. 751 */ 752 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty) 753 { 754 struct vmw_stdu_dirty *sdirty = 755 container_of(dirty, struct vmw_stdu_dirty, base); 756 struct vmw_stdu_surface_copy *cmd = dirty->cmd; 757 struct vmw_screen_target_display_unit *stdu = 758 container_of(dirty->unit, typeof(*stdu), base); 759 760 if (sdirty->sid != stdu->display_srf->res.id) { 761 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1]; 762 763 blit += dirty->num_hits; 764 blit->srcx = dirty->fb_x; 765 blit->srcy = dirty->fb_y; 766 blit->x = dirty->unit_x1; 767 blit->y = dirty->unit_y1; 768 blit->d = 1; 769 blit->w = dirty->unit_x2 - dirty->unit_x1; 770 blit->h = dirty->unit_y2 - dirty->unit_y1; 771 } 772 773 dirty->num_hits++; 774 775 /* Destination bounding box */ 776 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1); 777 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1); 778 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2); 779 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2); 780 } 781 782 /** 783 * vmw_kms_stdu_surface_fifo_commit - Callback to fill in and submit a surface 784 * copy command. 785 * 786 * @dirty: The closure structure. 787 * 788 * Fills in the missing fields in a surface copy command, and encodes a screen 789 * target update command. 790 */ 791 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty) 792 { 793 struct vmw_stdu_dirty *sdirty = 794 container_of(dirty, struct vmw_stdu_dirty, base); 795 struct vmw_screen_target_display_unit *stdu = 796 container_of(dirty->unit, typeof(*stdu), base); 797 struct vmw_stdu_surface_copy *cmd = dirty->cmd; 798 struct vmw_stdu_update *update; 799 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits; 800 size_t commit_size; 801 802 if (!dirty->num_hits) { 803 vmw_cmd_commit(dirty->dev_priv, 0); 804 return; 805 } 806 807 if (sdirty->sid != stdu->display_srf->res.id) { 808 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1]; 809 810 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY; 811 cmd->header.size = sizeof(cmd->body) + blit_size; 812 cmd->body.src.sid = sdirty->sid; 813 cmd->body.dest.sid = stdu->display_srf->res.id; 814 update = (struct vmw_stdu_update *) &blit[dirty->num_hits]; 815 commit_size = sizeof(*cmd) + blit_size + sizeof(*update); 816 stdu->display_srf->res.res_dirty = true; 817 } else { 818 update = dirty->cmd; 819 commit_size = sizeof(*update); 820 } 821 822 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left, 823 sdirty->right, sdirty->top, sdirty->bottom); 824 825 vmw_cmd_commit(dirty->dev_priv, commit_size); 826 827 sdirty->left = sdirty->top = S32_MAX; 828 sdirty->right = sdirty->bottom = S32_MIN; 829 } 830 831 /** 832 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer 833 * 834 * @dev_priv: Pointer to the device private structure. 835 * @framebuffer: Pointer to the surface-buffer backed framebuffer. 836 * @clips: Array of clip rects. Either @clips or @vclips must be NULL. 837 * @vclips: Alternate array of clip rects. Either @clips or @vclips must 838 * be NULL. 839 * @srf: Pointer to surface to blit from. If NULL, the surface attached 840 * to @framebuffer will be used. 841 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates. 842 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates. 843 * @num_clips: Number of clip rects in @clips. 844 * @inc: Increment to use when looping over @clips. 845 * @out_fence: If non-NULL, will return a ref-counted pointer to a 846 * struct vmw_fence_obj. The returned fence pointer may be NULL in which 847 * case the device has already synchronized. 848 * @crtc: If crtc is passed, perform surface dirty on that crtc only. 849 * 850 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if 851 * interrupted. 852 */ 853 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv, 854 struct vmw_framebuffer *framebuffer, 855 struct drm_clip_rect *clips, 856 struct drm_vmw_rect *vclips, 857 struct vmw_resource *srf, 858 s32 dest_x, 859 s32 dest_y, 860 unsigned num_clips, int inc, 861 struct vmw_fence_obj **out_fence, 862 struct drm_crtc *crtc) 863 { 864 struct vmw_framebuffer_surface *vfbs = 865 container_of(framebuffer, typeof(*vfbs), base); 866 struct vmw_stdu_dirty sdirty; 867 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); 868 int ret; 869 870 if (!srf) 871 srf = &vfbs->surface->res; 872 873 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE, 874 NULL, NULL); 875 if (ret) 876 return ret; 877 878 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true); 879 if (ret) 880 goto out_unref; 881 882 if (vfbs->is_bo_proxy) { 883 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc); 884 if (ret) 885 goto out_finish; 886 } 887 888 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit; 889 sdirty.base.clip = vmw_kms_stdu_surface_clip; 890 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) + 891 sizeof(SVGA3dCopyBox) * num_clips + 892 sizeof(struct vmw_stdu_update); 893 sdirty.base.crtc = crtc; 894 sdirty.sid = srf->id; 895 sdirty.left = sdirty.top = S32_MAX; 896 sdirty.right = sdirty.bottom = S32_MIN; 897 898 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips, 899 dest_x, dest_y, num_clips, inc, 900 &sdirty.base); 901 out_finish: 902 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence, 903 NULL); 904 905 return ret; 906 907 out_unref: 908 vmw_validation_unref_lists(&val_ctx); 909 return ret; 910 } 911 912 913 /* 914 * Screen Target CRTC dispatch table 915 */ 916 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = { 917 .gamma_set = vmw_du_crtc_gamma_set, 918 .destroy = vmw_stdu_crtc_destroy, 919 .reset = vmw_du_crtc_reset, 920 .atomic_duplicate_state = vmw_du_crtc_duplicate_state, 921 .atomic_destroy_state = vmw_du_crtc_destroy_state, 922 .set_config = drm_atomic_helper_set_config, 923 .page_flip = drm_atomic_helper_page_flip, 924 .get_vblank_counter = vmw_get_vblank_counter, 925 .enable_vblank = vmw_enable_vblank, 926 .disable_vblank = vmw_disable_vblank, 927 }; 928 929 930 931 /****************************************************************************** 932 * Screen Target Display Unit Encoder Functions 933 *****************************************************************************/ 934 935 /** 936 * vmw_stdu_encoder_destroy - cleans up the STDU 937 * 938 * @encoder: used the get the containing STDU 939 * 940 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically 941 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case 942 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't 943 * get called. 944 */ 945 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder) 946 { 947 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder)); 948 } 949 950 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = { 951 .destroy = vmw_stdu_encoder_destroy, 952 }; 953 954 955 956 /****************************************************************************** 957 * Screen Target Display Unit Connector Functions 958 *****************************************************************************/ 959 960 /** 961 * vmw_stdu_connector_destroy - cleans up the STDU 962 * 963 * @connector: used to get the containing STDU 964 * 965 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically 966 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case 967 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't 968 * get called. 969 */ 970 static void vmw_stdu_connector_destroy(struct drm_connector *connector) 971 { 972 vmw_stdu_destroy(vmw_connector_to_stdu(connector)); 973 } 974 975 976 977 static const struct drm_connector_funcs vmw_stdu_connector_funcs = { 978 .dpms = vmw_du_connector_dpms, 979 .detect = vmw_du_connector_detect, 980 .fill_modes = vmw_du_connector_fill_modes, 981 .destroy = vmw_stdu_connector_destroy, 982 .reset = vmw_du_connector_reset, 983 .atomic_duplicate_state = vmw_du_connector_duplicate_state, 984 .atomic_destroy_state = vmw_du_connector_destroy_state, 985 }; 986 987 988 static const struct 989 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = { 990 }; 991 992 993 994 /****************************************************************************** 995 * Screen Target Display Plane Functions 996 *****************************************************************************/ 997 998 999 1000 /** 1001 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface 1002 * 1003 * @plane: display plane 1004 * @old_state: Contains the FB to clean up 1005 * 1006 * Unpins the display surface 1007 * 1008 * Returns 0 on success 1009 */ 1010 static void 1011 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane, 1012 struct drm_plane_state *old_state) 1013 { 1014 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state); 1015 1016 if (vps->surf) 1017 WARN_ON(!vps->pinned); 1018 1019 vmw_du_plane_cleanup_fb(plane, old_state); 1020 1021 vps->content_fb_type = SAME_AS_DISPLAY; 1022 vps->cpp = 0; 1023 } 1024 1025 1026 1027 /** 1028 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface 1029 * 1030 * @plane: display plane 1031 * @new_state: info on the new plane state, including the FB 1032 * 1033 * This function allocates a new display surface if the content is 1034 * backed by a buffer object. The display surface is pinned here, and it'll 1035 * be unpinned in .cleanup_fb() 1036 * 1037 * Returns 0 on success 1038 */ 1039 static int 1040 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, 1041 struct drm_plane_state *new_state) 1042 { 1043 struct vmw_private *dev_priv = vmw_priv(plane->dev); 1044 struct drm_framebuffer *new_fb = new_state->fb; 1045 struct vmw_framebuffer *vfb; 1046 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state); 1047 enum stdu_content_type new_content_type; 1048 struct vmw_framebuffer_surface *new_vfbs; 1049 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h; 1050 int ret; 1051 1052 /* No FB to prepare */ 1053 if (!new_fb) { 1054 if (vps->surf) { 1055 WARN_ON(vps->pinned != 0); 1056 vmw_surface_unreference(&vps->surf); 1057 } 1058 1059 return 0; 1060 } 1061 1062 vfb = vmw_framebuffer_to_vfb(new_fb); 1063 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb); 1064 1065 if (new_vfbs && 1066 new_vfbs->surface->metadata.base_size.width == hdisplay && 1067 new_vfbs->surface->metadata.base_size.height == vdisplay) 1068 new_content_type = SAME_AS_DISPLAY; 1069 else if (vfb->bo) 1070 new_content_type = SEPARATE_BO; 1071 else 1072 new_content_type = SEPARATE_SURFACE; 1073 1074 if (new_content_type != SAME_AS_DISPLAY) { 1075 struct vmw_surface_metadata metadata = {0}; 1076 1077 /* 1078 * If content buffer is a buffer object, then we have to 1079 * construct surface info 1080 */ 1081 if (new_content_type == SEPARATE_BO) { 1082 1083 switch (new_fb->format->cpp[0]*8) { 1084 case 32: 1085 metadata.format = SVGA3D_X8R8G8B8; 1086 break; 1087 1088 case 16: 1089 metadata.format = SVGA3D_R5G6B5; 1090 break; 1091 1092 case 8: 1093 metadata.format = SVGA3D_P8; 1094 break; 1095 1096 default: 1097 DRM_ERROR("Invalid format\n"); 1098 return -EINVAL; 1099 } 1100 1101 metadata.mip_levels[0] = 1; 1102 metadata.num_sizes = 1; 1103 metadata.scanout = true; 1104 } else { 1105 metadata = new_vfbs->surface->metadata; 1106 } 1107 1108 metadata.base_size.width = hdisplay; 1109 metadata.base_size.height = vdisplay; 1110 metadata.base_size.depth = 1; 1111 1112 if (vps->surf) { 1113 struct drm_vmw_size cur_base_size = 1114 vps->surf->metadata.base_size; 1115 1116 if (cur_base_size.width != metadata.base_size.width || 1117 cur_base_size.height != metadata.base_size.height || 1118 vps->surf->metadata.format != metadata.format) { 1119 WARN_ON(vps->pinned != 0); 1120 vmw_surface_unreference(&vps->surf); 1121 } 1122 1123 } 1124 1125 if (!vps->surf) { 1126 ret = vmw_gb_surface_define(dev_priv, 0, &metadata, 1127 &vps->surf); 1128 if (ret != 0) { 1129 DRM_ERROR("Couldn't allocate STDU surface.\n"); 1130 return ret; 1131 } 1132 } 1133 } else { 1134 /* 1135 * prepare_fb and clean_fb should only take care of pinning 1136 * and unpinning. References are tracked by state objects. 1137 * The only time we add a reference in prepare_fb is if the 1138 * state object doesn't have a reference to begin with 1139 */ 1140 if (vps->surf) { 1141 WARN_ON(vps->pinned != 0); 1142 vmw_surface_unreference(&vps->surf); 1143 } 1144 1145 vps->surf = vmw_surface_reference(new_vfbs->surface); 1146 } 1147 1148 if (vps->surf) { 1149 1150 /* Pin new surface before flipping */ 1151 ret = vmw_resource_pin(&vps->surf->res, false); 1152 if (ret) 1153 goto out_srf_unref; 1154 1155 vps->pinned++; 1156 } 1157 1158 vps->content_fb_type = new_content_type; 1159 1160 /* 1161 * This should only happen if the buffer object is too large to create a 1162 * proxy surface for. 1163 * If we are a 2D VM with a buffer object then we have to use CPU blit 1164 * so cache these mappings 1165 */ 1166 if (vps->content_fb_type == SEPARATE_BO && 1167 !(dev_priv->capabilities & SVGA_CAP_3D)) 1168 vps->cpp = new_fb->pitches[0] / new_fb->width; 1169 1170 return 0; 1171 1172 out_srf_unref: 1173 vmw_surface_unreference(&vps->surf); 1174 return ret; 1175 } 1176 1177 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update, 1178 uint32_t num_hits) 1179 { 1180 return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits + 1181 sizeof(SVGA3dCmdSurfaceDMASuffix) + 1182 sizeof(struct vmw_stdu_update); 1183 } 1184 1185 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update, 1186 uint32_t num_hits) 1187 { 1188 return sizeof(struct vmw_stdu_update_gb_image) + 1189 sizeof(struct vmw_stdu_update); 1190 } 1191 1192 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane *update, 1193 void *cmd, uint32_t num_hits) 1194 { 1195 struct vmw_screen_target_display_unit *stdu; 1196 struct vmw_framebuffer_bo *vfbbo; 1197 struct vmw_stdu_dma *cmd_dma = cmd; 1198 1199 stdu = container_of(update->du, typeof(*stdu), base); 1200 vfbbo = container_of(update->vfb, typeof(*vfbbo), base); 1201 1202 cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA; 1203 cmd_dma->header.size = sizeof(cmd_dma->body) + 1204 sizeof(struct SVGA3dCopyBox) * num_hits + 1205 sizeof(SVGA3dCmdSurfaceDMASuffix); 1206 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr); 1207 cmd_dma->body.guest.pitch = update->vfb->base.pitches[0]; 1208 cmd_dma->body.host.sid = stdu->display_srf->res.id; 1209 cmd_dma->body.host.face = 0; 1210 cmd_dma->body.host.mipmap = 0; 1211 cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM; 1212 1213 return sizeof(*cmd_dma); 1214 } 1215 1216 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane *update, 1217 void *cmd, struct drm_rect *clip, 1218 uint32_t fb_x, uint32_t fb_y) 1219 { 1220 struct SVGA3dCopyBox *box = cmd; 1221 1222 box->srcx = fb_x; 1223 box->srcy = fb_y; 1224 box->srcz = 0; 1225 box->x = clip->x1; 1226 box->y = clip->y1; 1227 box->z = 0; 1228 box->w = drm_rect_width(clip); 1229 box->h = drm_rect_height(clip); 1230 box->d = 1; 1231 1232 return sizeof(*box); 1233 } 1234 1235 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane *update, 1236 void *cmd, struct drm_rect *bb) 1237 { 1238 struct vmw_screen_target_display_unit *stdu; 1239 struct vmw_framebuffer_bo *vfbbo; 1240 SVGA3dCmdSurfaceDMASuffix *suffix = cmd; 1241 1242 stdu = container_of(update->du, typeof(*stdu), base); 1243 vfbbo = container_of(update->vfb, typeof(*vfbbo), base); 1244 1245 suffix->suffixSize = sizeof(*suffix); 1246 suffix->maximumOffset = vfbbo->buffer->base.base.size; 1247 1248 vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2, 1249 bb->y1, bb->y2); 1250 1251 return sizeof(*suffix) + sizeof(struct vmw_stdu_update); 1252 } 1253 1254 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane *update, 1255 void *cmd, uint32_t num_hits) 1256 { 1257 struct vmw_du_update_plane_buffer *bo_update = 1258 container_of(update, typeof(*bo_update), base); 1259 1260 bo_update->fb_left = INT_MAX; 1261 bo_update->fb_top = INT_MAX; 1262 1263 return 0; 1264 } 1265 1266 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane *update, 1267 void *cmd, struct drm_rect *clip, 1268 uint32_t fb_x, uint32_t fb_y) 1269 { 1270 struct vmw_du_update_plane_buffer *bo_update = 1271 container_of(update, typeof(*bo_update), base); 1272 1273 bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x); 1274 bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y); 1275 1276 return 0; 1277 } 1278 1279 static uint32_t 1280 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd, 1281 struct drm_rect *bb) 1282 { 1283 struct vmw_du_update_plane_buffer *bo_update; 1284 struct vmw_screen_target_display_unit *stdu; 1285 struct vmw_framebuffer_bo *vfbbo; 1286 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0); 1287 struct vmw_stdu_update_gb_image *cmd_img = cmd; 1288 struct vmw_stdu_update *cmd_update; 1289 struct ttm_buffer_object *src_bo, *dst_bo; 1290 u32 src_offset, dst_offset; 1291 s32 src_pitch, dst_pitch; 1292 s32 width, height; 1293 1294 bo_update = container_of(update, typeof(*bo_update), base); 1295 stdu = container_of(update->du, typeof(*stdu), base); 1296 vfbbo = container_of(update->vfb, typeof(*vfbbo), base); 1297 1298 width = bb->x2 - bb->x1; 1299 height = bb->y2 - bb->y1; 1300 1301 diff.cpp = stdu->cpp; 1302 1303 dst_bo = &stdu->display_srf->res.backup->base; 1304 dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp; 1305 dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp; 1306 1307 src_bo = &vfbbo->buffer->base; 1308 src_pitch = update->vfb->base.pitches[0]; 1309 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left * 1310 stdu->cpp; 1311 1312 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo, 1313 src_offset, src_pitch, width * stdu->cpp, height, 1314 &diff); 1315 1316 if (drm_rect_visible(&diff.rect)) { 1317 SVGA3dBox *box = &cmd_img->body.box; 1318 1319 cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE; 1320 cmd_img->header.size = sizeof(cmd_img->body); 1321 cmd_img->body.image.sid = stdu->display_srf->res.id; 1322 cmd_img->body.image.face = 0; 1323 cmd_img->body.image.mipmap = 0; 1324 1325 box->x = diff.rect.x1; 1326 box->y = diff.rect.y1; 1327 box->z = 0; 1328 box->w = drm_rect_width(&diff.rect); 1329 box->h = drm_rect_height(&diff.rect); 1330 box->d = 1; 1331 1332 cmd_update = (struct vmw_stdu_update *)&cmd_img[1]; 1333 vmw_stdu_populate_update(cmd_update, stdu->base.unit, 1334 diff.rect.x1, diff.rect.x2, 1335 diff.rect.y1, diff.rect.y2); 1336 1337 return sizeof(*cmd_img) + sizeof(*cmd_update); 1338 } 1339 1340 return 0; 1341 } 1342 1343 /** 1344 * vmw_stdu_plane_update_bo - Update display unit for bo backed fb. 1345 * @dev_priv: device private. 1346 * @plane: plane state. 1347 * @old_state: old plane state. 1348 * @vfb: framebuffer which is blitted to display unit. 1349 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. 1350 * The returned fence pointer may be NULL in which case the device 1351 * has already synchronized. 1352 * 1353 * Return: 0 on success or a negative error code on failure. 1354 */ 1355 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv, 1356 struct drm_plane *plane, 1357 struct drm_plane_state *old_state, 1358 struct vmw_framebuffer *vfb, 1359 struct vmw_fence_obj **out_fence) 1360 { 1361 struct vmw_du_update_plane_buffer bo_update; 1362 1363 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer)); 1364 bo_update.base.plane = plane; 1365 bo_update.base.old_state = old_state; 1366 bo_update.base.dev_priv = dev_priv; 1367 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); 1368 bo_update.base.vfb = vfb; 1369 bo_update.base.out_fence = out_fence; 1370 bo_update.base.mutex = NULL; 1371 bo_update.base.cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D); 1372 bo_update.base.intr = false; 1373 1374 /* 1375 * VM without 3D support don't have surface DMA command and framebuffer 1376 * should be moved out of VRAM. 1377 */ 1378 if (bo_update.base.cpu_blit) { 1379 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu; 1380 bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu; 1381 bo_update.base.clip = vmw_stdu_bo_clip_cpu; 1382 bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu; 1383 } else { 1384 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size; 1385 bo_update.base.pre_clip = vmw_stdu_bo_populate_dma; 1386 bo_update.base.clip = vmw_stdu_bo_populate_clip; 1387 bo_update.base.post_clip = vmw_stdu_bo_populate_update; 1388 } 1389 1390 return vmw_du_helper_plane_update(&bo_update.base); 1391 } 1392 1393 static uint32_t 1394 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update, 1395 uint32_t num_hits) 1396 { 1397 struct vmw_framebuffer_surface *vfbs; 1398 uint32_t size = 0; 1399 1400 vfbs = container_of(update->vfb, typeof(*vfbs), base); 1401 1402 if (vfbs->is_bo_proxy) 1403 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits; 1404 1405 size += sizeof(struct vmw_stdu_update); 1406 1407 return size; 1408 } 1409 1410 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update, 1411 uint32_t num_hits) 1412 { 1413 struct vmw_framebuffer_surface *vfbs; 1414 uint32_t size = 0; 1415 1416 vfbs = container_of(update->vfb, typeof(*vfbs), base); 1417 1418 if (vfbs->is_bo_proxy) 1419 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits; 1420 1421 size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) * 1422 num_hits + sizeof(struct vmw_stdu_update); 1423 1424 return size; 1425 } 1426 1427 static uint32_t 1428 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd) 1429 { 1430 struct vmw_framebuffer_surface *vfbs; 1431 struct drm_plane_state *state = update->plane->state; 1432 struct drm_plane_state *old_state = update->old_state; 1433 struct vmw_stdu_update_gb_image *cmd_update = cmd; 1434 struct drm_atomic_helper_damage_iter iter; 1435 struct drm_rect clip; 1436 uint32_t copy_size = 0; 1437 1438 vfbs = container_of(update->vfb, typeof(*vfbs), base); 1439 1440 /* 1441 * proxy surface is special where a buffer object type fb is wrapped 1442 * in a surface and need an update gb image command to sync with device. 1443 */ 1444 drm_atomic_helper_damage_iter_init(&iter, old_state, state); 1445 drm_atomic_for_each_plane_damage(&iter, &clip) { 1446 SVGA3dBox *box = &cmd_update->body.box; 1447 1448 cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE; 1449 cmd_update->header.size = sizeof(cmd_update->body); 1450 cmd_update->body.image.sid = vfbs->surface->res.id; 1451 cmd_update->body.image.face = 0; 1452 cmd_update->body.image.mipmap = 0; 1453 1454 box->x = clip.x1; 1455 box->y = clip.y1; 1456 box->z = 0; 1457 box->w = drm_rect_width(&clip); 1458 box->h = drm_rect_height(&clip); 1459 box->d = 1; 1460 1461 copy_size += sizeof(*cmd_update); 1462 cmd_update++; 1463 } 1464 1465 return copy_size; 1466 } 1467 1468 static uint32_t 1469 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd, 1470 uint32_t num_hits) 1471 { 1472 struct vmw_screen_target_display_unit *stdu; 1473 struct vmw_framebuffer_surface *vfbs; 1474 struct vmw_stdu_surface_copy *cmd_copy = cmd; 1475 1476 stdu = container_of(update->du, typeof(*stdu), base); 1477 vfbs = container_of(update->vfb, typeof(*vfbs), base); 1478 1479 cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY; 1480 cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) * 1481 num_hits; 1482 cmd_copy->body.src.sid = vfbs->surface->res.id; 1483 cmd_copy->body.dest.sid = stdu->display_srf->res.id; 1484 1485 return sizeof(*cmd_copy); 1486 } 1487 1488 static uint32_t 1489 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane *update, void *cmd, 1490 struct drm_rect *clip, uint32_t fb_x, 1491 uint32_t fb_y) 1492 { 1493 struct SVGA3dCopyBox *box = cmd; 1494 1495 box->srcx = fb_x; 1496 box->srcy = fb_y; 1497 box->srcz = 0; 1498 box->x = clip->x1; 1499 box->y = clip->y1; 1500 box->z = 0; 1501 box->w = drm_rect_width(clip); 1502 box->h = drm_rect_height(clip); 1503 box->d = 1; 1504 1505 return sizeof(*box); 1506 } 1507 1508 static uint32_t 1509 vmw_stdu_surface_populate_update(struct vmw_du_update_plane *update, void *cmd, 1510 struct drm_rect *bb) 1511 { 1512 vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1, 1513 bb->y2); 1514 1515 return sizeof(struct vmw_stdu_update); 1516 } 1517 1518 /** 1519 * vmw_stdu_plane_update_surface - Update display unit for surface backed fb 1520 * @dev_priv: Device private 1521 * @plane: Plane state 1522 * @old_state: Old plane state 1523 * @vfb: Framebuffer which is blitted to display unit 1524 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj. 1525 * The returned fence pointer may be NULL in which case the device 1526 * has already synchronized. 1527 * 1528 * Return: 0 on success or a negative error code on failure. 1529 */ 1530 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv, 1531 struct drm_plane *plane, 1532 struct drm_plane_state *old_state, 1533 struct vmw_framebuffer *vfb, 1534 struct vmw_fence_obj **out_fence) 1535 { 1536 struct vmw_du_update_plane srf_update; 1537 struct vmw_screen_target_display_unit *stdu; 1538 struct vmw_framebuffer_surface *vfbs; 1539 1540 stdu = vmw_crtc_to_stdu(plane->state->crtc); 1541 vfbs = container_of(vfb, typeof(*vfbs), base); 1542 1543 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane)); 1544 srf_update.plane = plane; 1545 srf_update.old_state = old_state; 1546 srf_update.dev_priv = dev_priv; 1547 srf_update.du = vmw_crtc_to_du(plane->state->crtc); 1548 srf_update.vfb = vfb; 1549 srf_update.out_fence = out_fence; 1550 srf_update.mutex = &dev_priv->cmdbuf_mutex; 1551 srf_update.cpu_blit = false; 1552 srf_update.intr = true; 1553 1554 if (vfbs->is_bo_proxy) 1555 srf_update.post_prepare = vmw_stdu_surface_update_proxy; 1556 1557 if (vfbs->surface->res.id != stdu->display_srf->res.id) { 1558 srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size; 1559 srf_update.pre_clip = vmw_stdu_surface_populate_copy; 1560 srf_update.clip = vmw_stdu_surface_populate_clip; 1561 } else { 1562 srf_update.calc_fifo_size = 1563 vmw_stdu_surface_fifo_size_same_display; 1564 } 1565 1566 srf_update.post_clip = vmw_stdu_surface_populate_update; 1567 1568 return vmw_du_helper_plane_update(&srf_update); 1569 } 1570 1571 /** 1572 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane 1573 * @plane: display plane 1574 * @state: Only used to get crtc info 1575 * 1576 * Formally update stdu->display_srf to the new plane, and bind the new 1577 * plane STDU. This function is called during the commit phase when 1578 * all the preparation have been done and all the configurations have 1579 * been checked. 1580 */ 1581 static void 1582 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane, 1583 struct drm_atomic_state *state) 1584 { 1585 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane); 1586 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); 1587 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state); 1588 struct drm_crtc *crtc = new_state->crtc; 1589 struct vmw_screen_target_display_unit *stdu; 1590 struct drm_pending_vblank_event *event; 1591 struct vmw_fence_obj *fence = NULL; 1592 struct vmw_private *dev_priv; 1593 int ret; 1594 1595 /* If case of device error, maintain consistent atomic state */ 1596 if (crtc && new_state->fb) { 1597 struct vmw_framebuffer *vfb = 1598 vmw_framebuffer_to_vfb(new_state->fb); 1599 stdu = vmw_crtc_to_stdu(crtc); 1600 dev_priv = vmw_priv(crtc->dev); 1601 1602 stdu->display_srf = vps->surf; 1603 stdu->content_fb_type = vps->content_fb_type; 1604 stdu->cpp = vps->cpp; 1605 1606 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res); 1607 if (ret) 1608 DRM_ERROR("Failed to bind surface to STDU.\n"); 1609 1610 if (vfb->bo) 1611 ret = vmw_stdu_plane_update_bo(dev_priv, plane, 1612 old_state, vfb, &fence); 1613 else 1614 ret = vmw_stdu_plane_update_surface(dev_priv, plane, 1615 old_state, vfb, 1616 &fence); 1617 if (ret) 1618 DRM_ERROR("Failed to update STDU.\n"); 1619 } else { 1620 crtc = old_state->crtc; 1621 stdu = vmw_crtc_to_stdu(crtc); 1622 dev_priv = vmw_priv(crtc->dev); 1623 1624 /* Blank STDU when fb and crtc are NULL */ 1625 if (!stdu->defined) 1626 return; 1627 1628 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL); 1629 if (ret) 1630 DRM_ERROR("Failed to blank STDU\n"); 1631 1632 ret = vmw_stdu_update_st(dev_priv, stdu); 1633 if (ret) 1634 DRM_ERROR("Failed to update STDU.\n"); 1635 1636 return; 1637 } 1638 1639 /* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */ 1640 event = crtc->state->event; 1641 if (event && fence) { 1642 struct drm_file *file_priv = event->base.file_priv; 1643 1644 ret = vmw_event_fence_action_queue(file_priv, 1645 fence, 1646 &event->base, 1647 &event->event.vbl.tv_sec, 1648 &event->event.vbl.tv_usec, 1649 true); 1650 if (ret) 1651 DRM_ERROR("Failed to queue event on fence.\n"); 1652 else 1653 crtc->state->event = NULL; 1654 } 1655 1656 if (fence) 1657 vmw_fence_obj_unreference(&fence); 1658 } 1659 1660 1661 static const struct drm_plane_funcs vmw_stdu_plane_funcs = { 1662 .update_plane = drm_atomic_helper_update_plane, 1663 .disable_plane = drm_atomic_helper_disable_plane, 1664 .destroy = vmw_du_primary_plane_destroy, 1665 .reset = vmw_du_plane_reset, 1666 .atomic_duplicate_state = vmw_du_plane_duplicate_state, 1667 .atomic_destroy_state = vmw_du_plane_destroy_state, 1668 }; 1669 1670 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = { 1671 .update_plane = drm_atomic_helper_update_plane, 1672 .disable_plane = drm_atomic_helper_disable_plane, 1673 .destroy = vmw_du_cursor_plane_destroy, 1674 .reset = vmw_du_plane_reset, 1675 .atomic_duplicate_state = vmw_du_plane_duplicate_state, 1676 .atomic_destroy_state = vmw_du_plane_destroy_state, 1677 }; 1678 1679 1680 /* 1681 * Atomic Helpers 1682 */ 1683 static const struct 1684 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = { 1685 .atomic_check = vmw_du_cursor_plane_atomic_check, 1686 .atomic_update = vmw_du_cursor_plane_atomic_update, 1687 .prepare_fb = vmw_du_cursor_plane_prepare_fb, 1688 .cleanup_fb = vmw_du_plane_cleanup_fb, 1689 }; 1690 1691 static const struct 1692 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = { 1693 .atomic_check = vmw_du_primary_plane_atomic_check, 1694 .atomic_update = vmw_stdu_primary_plane_atomic_update, 1695 .prepare_fb = vmw_stdu_primary_plane_prepare_fb, 1696 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb, 1697 }; 1698 1699 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = { 1700 .prepare = vmw_stdu_crtc_helper_prepare, 1701 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb, 1702 .atomic_check = vmw_du_crtc_atomic_check, 1703 .atomic_begin = vmw_du_crtc_atomic_begin, 1704 .atomic_flush = vmw_du_crtc_atomic_flush, 1705 .atomic_enable = vmw_stdu_crtc_atomic_enable, 1706 .atomic_disable = vmw_stdu_crtc_atomic_disable, 1707 }; 1708 1709 1710 /** 1711 * vmw_stdu_init - Sets up a Screen Target Display Unit 1712 * 1713 * @dev_priv: VMW DRM device 1714 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS 1715 * 1716 * This function is called once per CRTC, and allocates one Screen Target 1717 * display unit to represent that CRTC. Since the SVGA device does not separate 1718 * out encoder and connector, they are represented as part of the STDU as well. 1719 */ 1720 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit) 1721 { 1722 struct vmw_screen_target_display_unit *stdu; 1723 struct drm_device *dev = &dev_priv->drm; 1724 struct drm_connector *connector; 1725 struct drm_encoder *encoder; 1726 struct drm_plane *primary, *cursor; 1727 struct drm_crtc *crtc; 1728 int ret; 1729 1730 1731 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL); 1732 if (!stdu) 1733 return -ENOMEM; 1734 1735 stdu->base.unit = unit; 1736 crtc = &stdu->base.crtc; 1737 encoder = &stdu->base.encoder; 1738 connector = &stdu->base.connector; 1739 primary = &stdu->base.primary; 1740 cursor = &stdu->base.cursor; 1741 1742 stdu->base.pref_active = (unit == 0); 1743 stdu->base.pref_width = dev_priv->initial_width; 1744 stdu->base.pref_height = dev_priv->initial_height; 1745 stdu->base.is_implicit = false; 1746 1747 /* Initialize primary plane */ 1748 ret = drm_universal_plane_init(dev, primary, 1749 0, &vmw_stdu_plane_funcs, 1750 vmw_primary_plane_formats, 1751 ARRAY_SIZE(vmw_primary_plane_formats), 1752 NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 1753 if (ret) { 1754 DRM_ERROR("Failed to initialize primary plane"); 1755 goto err_free; 1756 } 1757 1758 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs); 1759 drm_plane_enable_fb_damage_clips(primary); 1760 1761 /* Initialize cursor plane */ 1762 ret = drm_universal_plane_init(dev, cursor, 1763 0, &vmw_stdu_cursor_funcs, 1764 vmw_cursor_plane_formats, 1765 ARRAY_SIZE(vmw_cursor_plane_formats), 1766 NULL, DRM_PLANE_TYPE_CURSOR, NULL); 1767 if (ret) { 1768 DRM_ERROR("Failed to initialize cursor plane"); 1769 drm_plane_cleanup(&stdu->base.primary); 1770 goto err_free; 1771 } 1772 1773 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs); 1774 1775 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs, 1776 DRM_MODE_CONNECTOR_VIRTUAL); 1777 if (ret) { 1778 DRM_ERROR("Failed to initialize connector\n"); 1779 goto err_free; 1780 } 1781 1782 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs); 1783 connector->status = vmw_du_connector_detect(connector, false); 1784 1785 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs, 1786 DRM_MODE_ENCODER_VIRTUAL, NULL); 1787 if (ret) { 1788 DRM_ERROR("Failed to initialize encoder\n"); 1789 goto err_free_connector; 1790 } 1791 1792 (void) drm_connector_attach_encoder(connector, encoder); 1793 encoder->possible_crtcs = (1 << unit); 1794 encoder->possible_clones = 0; 1795 1796 ret = drm_connector_register(connector); 1797 if (ret) { 1798 DRM_ERROR("Failed to register connector\n"); 1799 goto err_free_encoder; 1800 } 1801 1802 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary, 1803 &stdu->base.cursor, 1804 &vmw_stdu_crtc_funcs, NULL); 1805 if (ret) { 1806 DRM_ERROR("Failed to initialize CRTC\n"); 1807 goto err_free_unregister; 1808 } 1809 1810 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs); 1811 1812 drm_mode_crtc_set_gamma_size(crtc, 256); 1813 1814 drm_object_attach_property(&connector->base, 1815 dev_priv->hotplug_mode_update_property, 1); 1816 drm_object_attach_property(&connector->base, 1817 dev->mode_config.suggested_x_property, 0); 1818 drm_object_attach_property(&connector->base, 1819 dev->mode_config.suggested_y_property, 0); 1820 return 0; 1821 1822 err_free_unregister: 1823 drm_connector_unregister(connector); 1824 err_free_encoder: 1825 drm_encoder_cleanup(encoder); 1826 err_free_connector: 1827 drm_connector_cleanup(connector); 1828 err_free: 1829 kfree(stdu); 1830 return ret; 1831 } 1832 1833 1834 1835 /** 1836 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit 1837 * 1838 * @stdu: Screen Target Display Unit to be destroyed 1839 * 1840 * Clean up after vmw_stdu_init 1841 */ 1842 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu) 1843 { 1844 vmw_du_cleanup(&stdu->base); 1845 kfree(stdu); 1846 } 1847 1848 1849 1850 /****************************************************************************** 1851 * Screen Target Display KMS Functions 1852 * 1853 * These functions are called by the common KMS code in vmwgfx_kms.c 1854 *****************************************************************************/ 1855 1856 /** 1857 * vmw_kms_stdu_init_display - Initializes a Screen Target based display 1858 * 1859 * @dev_priv: VMW DRM device 1860 * 1861 * This function initialize a Screen Target based display device. It checks 1862 * the capability bits to make sure the underlying hardware can support 1863 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display 1864 * Units, as supported by the display hardware. 1865 * 1866 * RETURNS: 1867 * 0 on success, error code otherwise 1868 */ 1869 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv) 1870 { 1871 struct drm_device *dev = &dev_priv->drm; 1872 int i, ret; 1873 1874 1875 /* Do nothing if Screen Target support is turned off */ 1876 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE || !dev_priv->has_mob) 1877 return -ENOSYS; 1878 1879 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) 1880 return -ENOSYS; 1881 1882 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS); 1883 if (unlikely(ret != 0)) 1884 return ret; 1885 1886 dev_priv->active_display_unit = vmw_du_screen_target; 1887 1888 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) { 1889 ret = vmw_stdu_init(dev_priv, i); 1890 1891 if (unlikely(ret != 0)) { 1892 drm_err(&dev_priv->drm, 1893 "Failed to initialize STDU %d", i); 1894 return ret; 1895 } 1896 } 1897 1898 drm_mode_config_reset(dev); 1899 1900 return 0; 1901 } 1902