1 // SPDX-License-Identifier: GPL-2.0+ 2 3 #include <linux/crc32.h> 4 5 #include <drm/drm_atomic.h> 6 #include <drm/drm_atomic_helper.h> 7 #include <drm/drm_blend.h> 8 #include <drm/drm_fourcc.h> 9 #include <drm/drm_fixed.h> 10 #include <drm/drm_gem_framebuffer_helper.h> 11 #include <drm/drm_vblank.h> 12 #include <linux/minmax.h> 13 14 #include "vkms_drv.h" 15 16 static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha) 17 { 18 u32 new_color; 19 20 new_color = (src * 0xffff + dst * (0xffff - alpha)); 21 22 return DIV_ROUND_CLOSEST(new_color, 0xffff); 23 } 24 25 /** 26 * pre_mul_alpha_blend - alpha blending equation 27 * @frame_info: Source framebuffer's metadata 28 * @stage_buffer: The line with the pixels from src_plane 29 * @output_buffer: A line buffer that receives all the blends output 30 * 31 * Using the information from the `frame_info`, this blends only the 32 * necessary pixels from the `stage_buffer` to the `output_buffer` 33 * using premultiplied blend formula. 34 * 35 * The current DRM assumption is that pixel color values have been already 36 * pre-multiplied with the alpha channel values. See more 37 * drm_plane_create_blend_mode_property(). Also, this formula assumes a 38 * completely opaque background. 39 */ 40 static void pre_mul_alpha_blend(struct vkms_frame_info *frame_info, 41 struct line_buffer *stage_buffer, 42 struct line_buffer *output_buffer) 43 { 44 int x_dst = frame_info->dst.x1; 45 struct pixel_argb_u16 *out = output_buffer->pixels + x_dst; 46 struct pixel_argb_u16 *in = stage_buffer->pixels; 47 int x_limit = min_t(size_t, drm_rect_width(&frame_info->dst), 48 stage_buffer->n_pixels); 49 50 for (int x = 0; x < x_limit; x++) { 51 out[x].a = (u16)0xffff; 52 out[x].r = pre_mul_blend_channel(in[x].r, out[x].r, in[x].a); 53 out[x].g = pre_mul_blend_channel(in[x].g, out[x].g, in[x].a); 54 out[x].b = pre_mul_blend_channel(in[x].b, out[x].b, in[x].a); 55 } 56 } 57 58 static int get_y_pos(struct vkms_frame_info *frame_info, int y) 59 { 60 if (frame_info->rotation & DRM_MODE_REFLECT_Y) 61 return drm_rect_height(&frame_info->rotated) - y - 1; 62 63 switch (frame_info->rotation & DRM_MODE_ROTATE_MASK) { 64 case DRM_MODE_ROTATE_90: 65 return frame_info->rotated.x2 - y - 1; 66 case DRM_MODE_ROTATE_270: 67 return y + frame_info->rotated.x1; 68 default: 69 return y; 70 } 71 } 72 73 static bool check_limit(struct vkms_frame_info *frame_info, int pos) 74 { 75 if (drm_rotation_90_or_270(frame_info->rotation)) { 76 if (pos >= 0 && pos < drm_rect_width(&frame_info->rotated)) 77 return true; 78 } else { 79 if (pos >= frame_info->rotated.y1 && pos < frame_info->rotated.y2) 80 return true; 81 } 82 83 return false; 84 } 85 86 static void fill_background(const struct pixel_argb_u16 *background_color, 87 struct line_buffer *output_buffer) 88 { 89 for (size_t i = 0; i < output_buffer->n_pixels; i++) 90 output_buffer->pixels[i] = *background_color; 91 } 92 93 // lerp(a, b, t) = a + (b - a) * t 94 static u16 lerp_u16(u16 a, u16 b, s64 t) 95 { 96 s64 a_fp = drm_int2fixp(a); 97 s64 b_fp = drm_int2fixp(b); 98 99 s64 delta = drm_fixp_mul(b_fp - a_fp, t); 100 101 return drm_fixp2int(a_fp + delta); 102 } 103 104 static s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value) 105 { 106 s64 color_channel_fp = drm_int2fixp(channel_value); 107 108 return drm_fixp_mul(color_channel_fp, lut->channel_value2index_ratio); 109 } 110 111 /* 112 * This enum is related to the positions of the variables inside 113 * `struct drm_color_lut`, so the order of both needs to be the same. 114 */ 115 enum lut_channel { 116 LUT_RED = 0, 117 LUT_GREEN, 118 LUT_BLUE, 119 LUT_RESERVED 120 }; 121 122 static u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 channel_value, 123 enum lut_channel channel) 124 { 125 s64 lut_index = get_lut_index(lut, channel_value); 126 127 /* 128 * This checks if `struct drm_color_lut` has any gap added by the compiler 129 * between the struct fields. 130 */ 131 static_assert(sizeof(struct drm_color_lut) == sizeof(__u16) * 4); 132 133 u16 *floor_lut_value = (__u16 *)&lut->base[drm_fixp2int(lut_index)]; 134 u16 *ceil_lut_value = (__u16 *)&lut->base[drm_fixp2int_ceil(lut_index)]; 135 136 u16 floor_channel_value = floor_lut_value[channel]; 137 u16 ceil_channel_value = ceil_lut_value[channel]; 138 139 return lerp_u16(floor_channel_value, ceil_channel_value, 140 lut_index & DRM_FIXED_DECIMAL_MASK); 141 } 142 143 static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buffer *output_buffer) 144 { 145 if (!crtc_state->gamma_lut.base) 146 return; 147 148 if (!crtc_state->gamma_lut.lut_length) 149 return; 150 151 for (size_t x = 0; x < output_buffer->n_pixels; x++) { 152 struct pixel_argb_u16 *pixel = &output_buffer->pixels[x]; 153 154 pixel->r = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->r, LUT_RED); 155 pixel->g = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->g, LUT_GREEN); 156 pixel->b = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->b, LUT_BLUE); 157 } 158 } 159 160 /** 161 * blend - blend the pixels from all planes and compute crc 162 * @wb: The writeback frame buffer metadata 163 * @crtc_state: The crtc state 164 * @crc32: The crc output of the final frame 165 * @output_buffer: A buffer of a row that will receive the result of the blend(s) 166 * @stage_buffer: The line with the pixels from plane being blend to the output 167 * @row_size: The size, in bytes, of a single row 168 * 169 * This function blends the pixels (Using the `pre_mul_alpha_blend`) 170 * from all planes, calculates the crc32 of the output from the former step, 171 * and, if necessary, convert and store the output to the writeback buffer. 172 */ 173 static void blend(struct vkms_writeback_job *wb, 174 struct vkms_crtc_state *crtc_state, 175 u32 *crc32, struct line_buffer *stage_buffer, 176 struct line_buffer *output_buffer, size_t row_size) 177 { 178 struct vkms_plane_state **plane = crtc_state->active_planes; 179 u32 n_active_planes = crtc_state->num_active_planes; 180 int y_pos; 181 182 const struct pixel_argb_u16 background_color = { .a = 0xffff }; 183 184 size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay; 185 186 for (size_t y = 0; y < crtc_y_limit; y++) { 187 fill_background(&background_color, output_buffer); 188 189 /* The active planes are composed associatively in z-order. */ 190 for (size_t i = 0; i < n_active_planes; i++) { 191 y_pos = get_y_pos(plane[i]->frame_info, y); 192 193 if (!check_limit(plane[i]->frame_info, y_pos)) 194 continue; 195 196 vkms_compose_row(stage_buffer, plane[i], y_pos); 197 pre_mul_alpha_blend(plane[i]->frame_info, stage_buffer, 198 output_buffer); 199 } 200 201 apply_lut(crtc_state, output_buffer); 202 203 *crc32 = crc32_le(*crc32, (void *)output_buffer->pixels, row_size); 204 205 if (wb) 206 vkms_writeback_row(wb, output_buffer, y_pos); 207 } 208 } 209 210 static int check_format_funcs(struct vkms_crtc_state *crtc_state, 211 struct vkms_writeback_job *active_wb) 212 { 213 struct vkms_plane_state **planes = crtc_state->active_planes; 214 u32 n_active_planes = crtc_state->num_active_planes; 215 216 for (size_t i = 0; i < n_active_planes; i++) 217 if (!planes[i]->pixel_read) 218 return -1; 219 220 if (active_wb && !active_wb->pixel_write) 221 return -1; 222 223 return 0; 224 } 225 226 static int check_iosys_map(struct vkms_crtc_state *crtc_state) 227 { 228 struct vkms_plane_state **plane_state = crtc_state->active_planes; 229 u32 n_active_planes = crtc_state->num_active_planes; 230 231 for (size_t i = 0; i < n_active_planes; i++) 232 if (iosys_map_is_null(&plane_state[i]->frame_info->map[0])) 233 return -1; 234 235 return 0; 236 } 237 238 static int compose_active_planes(struct vkms_writeback_job *active_wb, 239 struct vkms_crtc_state *crtc_state, 240 u32 *crc32) 241 { 242 size_t line_width, pixel_size = sizeof(struct pixel_argb_u16); 243 struct line_buffer output_buffer, stage_buffer; 244 int ret = 0; 245 246 /* 247 * This check exists so we can call `crc32_le` for the entire line 248 * instead doing it for each channel of each pixel in case 249 * `struct `pixel_argb_u16` had any gap added by the compiler 250 * between the struct fields. 251 */ 252 static_assert(sizeof(struct pixel_argb_u16) == 8); 253 254 if (WARN_ON(check_iosys_map(crtc_state))) 255 return -EINVAL; 256 257 if (WARN_ON(check_format_funcs(crtc_state, active_wb))) 258 return -EINVAL; 259 260 line_width = crtc_state->base.crtc->mode.hdisplay; 261 stage_buffer.n_pixels = line_width; 262 output_buffer.n_pixels = line_width; 263 264 stage_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL); 265 if (!stage_buffer.pixels) { 266 DRM_ERROR("Cannot allocate memory for the output line buffer"); 267 return -ENOMEM; 268 } 269 270 output_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL); 271 if (!output_buffer.pixels) { 272 DRM_ERROR("Cannot allocate memory for intermediate line buffer"); 273 ret = -ENOMEM; 274 goto free_stage_buffer; 275 } 276 277 blend(active_wb, crtc_state, crc32, &stage_buffer, 278 &output_buffer, line_width * pixel_size); 279 280 kvfree(output_buffer.pixels); 281 free_stage_buffer: 282 kvfree(stage_buffer.pixels); 283 284 return ret; 285 } 286 287 /** 288 * vkms_composer_worker - ordered work_struct to compute CRC 289 * 290 * @work: work_struct 291 * 292 * Work handler for composing and computing CRCs. work_struct scheduled in 293 * an ordered workqueue that's periodically scheduled to run by 294 * vkms_vblank_simulate() and flushed at vkms_atomic_commit_tail(). 295 */ 296 void vkms_composer_worker(struct work_struct *work) 297 { 298 struct vkms_crtc_state *crtc_state = container_of(work, 299 struct vkms_crtc_state, 300 composer_work); 301 struct drm_crtc *crtc = crtc_state->base.crtc; 302 struct vkms_writeback_job *active_wb = crtc_state->active_writeback; 303 struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 304 bool crc_pending, wb_pending; 305 u64 frame_start, frame_end; 306 u32 crc32 = 0; 307 int ret; 308 309 spin_lock_irq(&out->composer_lock); 310 frame_start = crtc_state->frame_start; 311 frame_end = crtc_state->frame_end; 312 crc_pending = crtc_state->crc_pending; 313 wb_pending = crtc_state->wb_pending; 314 crtc_state->frame_start = 0; 315 crtc_state->frame_end = 0; 316 crtc_state->crc_pending = false; 317 318 if (crtc->state->gamma_lut) { 319 s64 max_lut_index_fp; 320 s64 u16_max_fp = drm_int2fixp(0xffff); 321 322 crtc_state->gamma_lut.base = (struct drm_color_lut *)crtc->state->gamma_lut->data; 323 crtc_state->gamma_lut.lut_length = 324 crtc->state->gamma_lut->length / sizeof(struct drm_color_lut); 325 max_lut_index_fp = drm_int2fixp(crtc_state->gamma_lut.lut_length - 1); 326 crtc_state->gamma_lut.channel_value2index_ratio = drm_fixp_div(max_lut_index_fp, 327 u16_max_fp); 328 329 } else { 330 crtc_state->gamma_lut.base = NULL; 331 } 332 333 spin_unlock_irq(&out->composer_lock); 334 335 /* 336 * We raced with the vblank hrtimer and previous work already computed 337 * the crc, nothing to do. 338 */ 339 if (!crc_pending) 340 return; 341 342 if (wb_pending) 343 ret = compose_active_planes(active_wb, crtc_state, &crc32); 344 else 345 ret = compose_active_planes(NULL, crtc_state, &crc32); 346 347 if (ret) 348 return; 349 350 if (wb_pending) { 351 drm_writeback_signal_completion(&out->wb_connector, 0); 352 spin_lock_irq(&out->composer_lock); 353 crtc_state->wb_pending = false; 354 spin_unlock_irq(&out->composer_lock); 355 } 356 357 /* 358 * The worker can fall behind the vblank hrtimer, make sure we catch up. 359 */ 360 while (frame_start <= frame_end) 361 drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); 362 } 363 364 static const char * const pipe_crc_sources[] = {"auto"}; 365 366 const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, 367 size_t *count) 368 { 369 *count = ARRAY_SIZE(pipe_crc_sources); 370 return pipe_crc_sources; 371 } 372 373 static int vkms_crc_parse_source(const char *src_name, bool *enabled) 374 { 375 int ret = 0; 376 377 if (!src_name) { 378 *enabled = false; 379 } else if (strcmp(src_name, "auto") == 0) { 380 *enabled = true; 381 } else { 382 *enabled = false; 383 ret = -EINVAL; 384 } 385 386 return ret; 387 } 388 389 int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name, 390 size_t *values_cnt) 391 { 392 bool enabled; 393 394 if (vkms_crc_parse_source(src_name, &enabled) < 0) { 395 DRM_DEBUG_DRIVER("unknown source %s\n", src_name); 396 return -EINVAL; 397 } 398 399 *values_cnt = 1; 400 401 return 0; 402 } 403 404 void vkms_set_composer(struct vkms_output *out, bool enabled) 405 { 406 bool old_enabled; 407 408 if (enabled) 409 drm_crtc_vblank_get(&out->crtc); 410 411 spin_lock_irq(&out->lock); 412 old_enabled = out->composer_enabled; 413 out->composer_enabled = enabled; 414 spin_unlock_irq(&out->lock); 415 416 if (old_enabled) 417 drm_crtc_vblank_put(&out->crtc); 418 } 419 420 int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) 421 { 422 struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 423 bool enabled = false; 424 int ret = 0; 425 426 ret = vkms_crc_parse_source(src_name, &enabled); 427 428 vkms_set_composer(out, enabled); 429 430 return ret; 431 } 432