xref: /openbmc/linux/drivers/gpu/drm/virtio/virtgpu_plane.c (revision 05cf4fe738242183f1237f1b3a28b4479348c0a1)
1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #include "virtgpu_drv.h"
27 #include <drm/drm_plane_helper.h>
28 #include <drm/drm_atomic_helper.h>
29 
30 static const uint32_t virtio_gpu_formats[] = {
31 	DRM_FORMAT_HOST_XRGB8888,
32 };
33 
34 static const uint32_t virtio_gpu_cursor_formats[] = {
35 	DRM_FORMAT_HOST_ARGB8888,
36 };
37 
38 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
39 {
40 	uint32_t format;
41 
42 	switch (drm_fourcc) {
43 	case DRM_FORMAT_XRGB8888:
44 		format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
45 		break;
46 	case DRM_FORMAT_ARGB8888:
47 		format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
48 		break;
49 	case DRM_FORMAT_BGRX8888:
50 		format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
51 		break;
52 	case DRM_FORMAT_BGRA8888:
53 		format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
54 		break;
55 	default:
56 		/*
57 		 * This should not happen, we handle everything listed
58 		 * in virtio_gpu_formats[].
59 		 */
60 		format = 0;
61 		break;
62 	}
63 	WARN_ON(format == 0);
64 	return format;
65 }
66 
67 static void virtio_gpu_plane_destroy(struct drm_plane *plane)
68 {
69 	drm_plane_cleanup(plane);
70 	kfree(plane);
71 }
72 
73 static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
74 	.update_plane		= drm_atomic_helper_update_plane,
75 	.disable_plane		= drm_atomic_helper_disable_plane,
76 	.destroy		= virtio_gpu_plane_destroy,
77 	.reset			= drm_atomic_helper_plane_reset,
78 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
79 	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
80 };
81 
82 static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
83 					 struct drm_plane_state *state)
84 {
85 	return 0;
86 }
87 
88 static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
89 					    struct drm_plane_state *old_state)
90 {
91 	struct drm_device *dev = plane->dev;
92 	struct virtio_gpu_device *vgdev = dev->dev_private;
93 	struct virtio_gpu_output *output = NULL;
94 	struct virtio_gpu_framebuffer *vgfb;
95 	struct virtio_gpu_object *bo;
96 	uint32_t handle;
97 
98 	if (plane->state->crtc)
99 		output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
100 	if (old_state->crtc)
101 		output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
102 	if (WARN_ON(!output))
103 		return;
104 
105 	if (plane->state->fb && output->enabled) {
106 		vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
107 		bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
108 		handle = bo->hw_res_handle;
109 		if (bo->dumb) {
110 			virtio_gpu_cmd_transfer_to_host_2d
111 				(vgdev, bo, 0,
112 				 cpu_to_le32(plane->state->src_w >> 16),
113 				 cpu_to_le32(plane->state->src_h >> 16),
114 				 cpu_to_le32(plane->state->src_x >> 16),
115 				 cpu_to_le32(plane->state->src_y >> 16), NULL);
116 		}
117 	} else {
118 		handle = 0;
119 	}
120 
121 	DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
122 		  plane->state->crtc_w, plane->state->crtc_h,
123 		  plane->state->crtc_x, plane->state->crtc_y,
124 		  plane->state->src_w >> 16,
125 		  plane->state->src_h >> 16,
126 		  plane->state->src_x >> 16,
127 		  plane->state->src_y >> 16);
128 	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
129 				   plane->state->src_w >> 16,
130 				   plane->state->src_h >> 16,
131 				   plane->state->src_x >> 16,
132 				   plane->state->src_y >> 16);
133 	virtio_gpu_cmd_resource_flush(vgdev, handle,
134 				      plane->state->src_x >> 16,
135 				      plane->state->src_y >> 16,
136 				      plane->state->src_w >> 16,
137 				      plane->state->src_h >> 16);
138 }
139 
140 static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
141 					   struct drm_plane_state *old_state)
142 {
143 	struct drm_device *dev = plane->dev;
144 	struct virtio_gpu_device *vgdev = dev->dev_private;
145 	struct virtio_gpu_output *output = NULL;
146 	struct virtio_gpu_framebuffer *vgfb;
147 	struct virtio_gpu_fence *fence = NULL;
148 	struct virtio_gpu_object *bo = NULL;
149 	uint32_t handle;
150 	int ret = 0;
151 
152 	if (plane->state->crtc)
153 		output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
154 	if (old_state->crtc)
155 		output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
156 	if (WARN_ON(!output))
157 		return;
158 
159 	if (plane->state->fb) {
160 		vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
161 		bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
162 		handle = bo->hw_res_handle;
163 	} else {
164 		handle = 0;
165 	}
166 
167 	if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
168 		/* new cursor -- update & wait */
169 		virtio_gpu_cmd_transfer_to_host_2d
170 			(vgdev, bo, 0,
171 			 cpu_to_le32(plane->state->crtc_w),
172 			 cpu_to_le32(plane->state->crtc_h),
173 			 0, 0, &fence);
174 		ret = virtio_gpu_object_reserve(bo, false);
175 		if (!ret) {
176 			reservation_object_add_excl_fence(bo->tbo.resv,
177 							  &fence->f);
178 			dma_fence_put(&fence->f);
179 			fence = NULL;
180 			virtio_gpu_object_unreserve(bo);
181 			virtio_gpu_object_wait(bo, false);
182 		}
183 	}
184 
185 	if (plane->state->fb != old_state->fb) {
186 		DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
187 			  plane->state->crtc_x,
188 			  plane->state->crtc_y,
189 			  plane->state->fb ? plane->state->fb->hot_x : 0,
190 			  plane->state->fb ? plane->state->fb->hot_y : 0);
191 		output->cursor.hdr.type =
192 			cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
193 		output->cursor.resource_id = cpu_to_le32(handle);
194 		if (plane->state->fb) {
195 			output->cursor.hot_x =
196 				cpu_to_le32(plane->state->fb->hot_x);
197 			output->cursor.hot_y =
198 				cpu_to_le32(plane->state->fb->hot_y);
199 		} else {
200 			output->cursor.hot_x = cpu_to_le32(0);
201 			output->cursor.hot_y = cpu_to_le32(0);
202 		}
203 	} else {
204 		DRM_DEBUG("move +%d+%d\n",
205 			  plane->state->crtc_x,
206 			  plane->state->crtc_y);
207 		output->cursor.hdr.type =
208 			cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
209 	}
210 	output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
211 	output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
212 	virtio_gpu_cursor_ping(vgdev, output);
213 }
214 
215 static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
216 	.atomic_check		= virtio_gpu_plane_atomic_check,
217 	.atomic_update		= virtio_gpu_primary_plane_update,
218 };
219 
220 static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
221 	.atomic_check		= virtio_gpu_plane_atomic_check,
222 	.atomic_update		= virtio_gpu_cursor_plane_update,
223 };
224 
225 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
226 					enum drm_plane_type type,
227 					int index)
228 {
229 	struct drm_device *dev = vgdev->ddev;
230 	const struct drm_plane_helper_funcs *funcs;
231 	struct drm_plane *plane;
232 	const uint32_t *formats;
233 	int ret, nformats;
234 
235 	plane = kzalloc(sizeof(*plane), GFP_KERNEL);
236 	if (!plane)
237 		return ERR_PTR(-ENOMEM);
238 
239 	if (type == DRM_PLANE_TYPE_CURSOR) {
240 		formats = virtio_gpu_cursor_formats;
241 		nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
242 		funcs = &virtio_gpu_cursor_helper_funcs;
243 	} else {
244 		formats = virtio_gpu_formats;
245 		nformats = ARRAY_SIZE(virtio_gpu_formats);
246 		funcs = &virtio_gpu_primary_helper_funcs;
247 	}
248 	ret = drm_universal_plane_init(dev, plane, 1 << index,
249 				       &virtio_gpu_plane_funcs,
250 				       formats, nformats,
251 				       NULL, type, NULL);
252 	if (ret)
253 		goto err_plane_init;
254 
255 	drm_plane_helper_add(plane, funcs);
256 	return plane;
257 
258 err_plane_init:
259 	kfree(plane);
260 	return ERR_PTR(ret);
261 }
262