1dc5698e8SDave Airlie /*
2dc5698e8SDave Airlie * Copyright (C) 2015 Red Hat, Inc.
3dc5698e8SDave Airlie * All Rights Reserved.
4dc5698e8SDave Airlie *
5dc5698e8SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining
6dc5698e8SDave Airlie * a copy of this software and associated documentation files (the
7dc5698e8SDave Airlie * "Software"), to deal in the Software without restriction, including
8dc5698e8SDave Airlie * without limitation the rights to use, copy, modify, merge, publish,
9dc5698e8SDave Airlie * distribute, sublicense, and/or sell copies of the Software, and to
10dc5698e8SDave Airlie * permit persons to whom the Software is furnished to do so, subject to
11dc5698e8SDave Airlie * the following conditions:
12dc5698e8SDave Airlie *
13dc5698e8SDave Airlie * The above copyright notice and this permission notice (including the
14dc5698e8SDave Airlie * next paragraph) shall be included in all copies or substantial
15dc5698e8SDave Airlie * portions of the Software.
16dc5698e8SDave Airlie *
17dc5698e8SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18dc5698e8SDave Airlie * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19dc5698e8SDave Airlie * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20dc5698e8SDave Airlie * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21dc5698e8SDave Airlie * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22dc5698e8SDave Airlie * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23dc5698e8SDave Airlie * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24dc5698e8SDave Airlie */
25dc5698e8SDave Airlie
26dc5698e8SDave Airlie #include <drm/drm_atomic_helper.h>
27c0967617SGerd Hoffmann #include <drm/drm_damage_helper.h>
28a3d63977SSam Ravnborg #include <drm/drm_fourcc.h>
29a3d63977SSam Ravnborg
30a3d63977SSam Ravnborg #include "virtgpu_drv.h"
31dc5698e8SDave Airlie
32dc5698e8SDave Airlie static const uint32_t virtio_gpu_formats[] = {
3342fd9e6cSGerd Hoffmann DRM_FORMAT_HOST_XRGB8888,
34dc5698e8SDave Airlie };
35dc5698e8SDave Airlie
36bbbed888SGerd Hoffmann static const uint32_t virtio_gpu_cursor_formats[] = {
3742fd9e6cSGerd Hoffmann DRM_FORMAT_HOST_ARGB8888,
38bbbed888SGerd Hoffmann };
39bbbed888SGerd Hoffmann
virtio_gpu_translate_format(uint32_t drm_fourcc)40d519cb76SGerd Hoffmann uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
41d519cb76SGerd Hoffmann {
42d519cb76SGerd Hoffmann uint32_t format;
43d519cb76SGerd Hoffmann
44d519cb76SGerd Hoffmann switch (drm_fourcc) {
45d519cb76SGerd Hoffmann case DRM_FORMAT_XRGB8888:
46d519cb76SGerd Hoffmann format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
47d519cb76SGerd Hoffmann break;
48d519cb76SGerd Hoffmann case DRM_FORMAT_ARGB8888:
49d519cb76SGerd Hoffmann format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
50d519cb76SGerd Hoffmann break;
51d519cb76SGerd Hoffmann case DRM_FORMAT_BGRX8888:
52d519cb76SGerd Hoffmann format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
53d519cb76SGerd Hoffmann break;
54d519cb76SGerd Hoffmann case DRM_FORMAT_BGRA8888:
55d519cb76SGerd Hoffmann format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
56d519cb76SGerd Hoffmann break;
57d519cb76SGerd Hoffmann default:
58d519cb76SGerd Hoffmann /*
59d519cb76SGerd Hoffmann * This should not happen, we handle everything listed
60d519cb76SGerd Hoffmann * in virtio_gpu_formats[].
61d519cb76SGerd Hoffmann */
62d519cb76SGerd Hoffmann format = 0;
63d519cb76SGerd Hoffmann break;
64d519cb76SGerd Hoffmann }
65d519cb76SGerd Hoffmann WARN_ON(format == 0);
66d519cb76SGerd Hoffmann return format;
67d519cb76SGerd Hoffmann }
68d519cb76SGerd Hoffmann
69dc5698e8SDave Airlie static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
70dc5698e8SDave Airlie .update_plane = drm_atomic_helper_update_plane,
71dc5698e8SDave Airlie .disable_plane = drm_atomic_helper_disable_plane,
72dc5698e8SDave Airlie .reset = drm_atomic_helper_plane_reset,
73dc5698e8SDave Airlie .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
74dc5698e8SDave Airlie .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
75dc5698e8SDave Airlie };
76dc5698e8SDave Airlie
virtio_gpu_plane_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)77dc5698e8SDave Airlie static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
787c11b99aSMaxime Ripard struct drm_atomic_state *state)
79dc5698e8SDave Airlie {
807c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
817c11b99aSMaxime Ripard plane);
82*10550774SJavier Martinez Canillas struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state,
83*10550774SJavier Martinez Canillas plane);
84a02c4c25SGerd Hoffmann bool is_cursor = plane->type == DRM_PLANE_TYPE_CURSOR;
85a02c4c25SGerd Hoffmann struct drm_crtc_state *crtc_state;
86a02c4c25SGerd Hoffmann int ret;
87a02c4c25SGerd Hoffmann
88ba5c1649SMaxime Ripard if (!new_plane_state->fb || WARN_ON(!new_plane_state->crtc))
89dc5698e8SDave Airlie return 0;
90a02c4c25SGerd Hoffmann
91*10550774SJavier Martinez Canillas /*
92*10550774SJavier Martinez Canillas * Ignore damage clips if the framebuffer attached to the plane's state
93*10550774SJavier Martinez Canillas * has changed since the last plane update (page-flip). In this case, a
94*10550774SJavier Martinez Canillas * full plane update should happen because uploads are done per-buffer.
95*10550774SJavier Martinez Canillas */
96*10550774SJavier Martinez Canillas if (old_plane_state->fb != new_plane_state->fb)
97*10550774SJavier Martinez Canillas new_plane_state->ignore_damage_clips = true;
98*10550774SJavier Martinez Canillas
99dec92020SMaxime Ripard crtc_state = drm_atomic_get_crtc_state(state,
100ba5c1649SMaxime Ripard new_plane_state->crtc);
101a02c4c25SGerd Hoffmann if (IS_ERR(crtc_state))
102a02c4c25SGerd Hoffmann return PTR_ERR(crtc_state);
103a02c4c25SGerd Hoffmann
104ba5c1649SMaxime Ripard ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
105cce32e4eSThomas Zimmermann DRM_PLANE_NO_SCALING,
106cce32e4eSThomas Zimmermann DRM_PLANE_NO_SCALING,
107a02c4c25SGerd Hoffmann is_cursor, true);
108a02c4c25SGerd Hoffmann return ret;
109dc5698e8SDave Airlie }
110dc5698e8SDave Airlie
virtio_gpu_update_dumb_bo(struct virtio_gpu_device * vgdev,struct drm_plane_state * state,struct drm_rect * rect)111544c521dSGerd Hoffmann static void virtio_gpu_update_dumb_bo(struct virtio_gpu_device *vgdev,
112c0967617SGerd Hoffmann struct drm_plane_state *state,
113c0967617SGerd Hoffmann struct drm_rect *rect)
114544c521dSGerd Hoffmann {
115c0967617SGerd Hoffmann struct virtio_gpu_object *bo =
116c0967617SGerd Hoffmann gem_to_virtio_gpu_obj(state->fb->obj[0]);
117544c521dSGerd Hoffmann struct virtio_gpu_object_array *objs;
118c0967617SGerd Hoffmann uint32_t w = rect->x2 - rect->x1;
119c0967617SGerd Hoffmann uint32_t h = rect->y2 - rect->y1;
120c0967617SGerd Hoffmann uint32_t x = rect->x1;
121c0967617SGerd Hoffmann uint32_t y = rect->y1;
122c0967617SGerd Hoffmann uint32_t off = x * state->fb->format->cpp[0] +
123c0967617SGerd Hoffmann y * state->fb->pitches[0];
124544c521dSGerd Hoffmann
125544c521dSGerd Hoffmann objs = virtio_gpu_array_alloc(1);
126544c521dSGerd Hoffmann if (!objs)
127544c521dSGerd Hoffmann return;
128544c521dSGerd Hoffmann virtio_gpu_array_add_obj(objs, &bo->base.base);
129c0967617SGerd Hoffmann
130c0967617SGerd Hoffmann virtio_gpu_cmd_transfer_to_host_2d(vgdev, off, w, h, x, y,
131544c521dSGerd Hoffmann objs, NULL);
132544c521dSGerd Hoffmann }
133544c521dSGerd Hoffmann
virtio_gpu_resource_flush(struct drm_plane * plane,uint32_t x,uint32_t y,uint32_t width,uint32_t height)1345c68ab92SVivek Kasireddy static void virtio_gpu_resource_flush(struct drm_plane *plane,
1355c68ab92SVivek Kasireddy uint32_t x, uint32_t y,
1365c68ab92SVivek Kasireddy uint32_t width, uint32_t height)
1375c68ab92SVivek Kasireddy {
1385c68ab92SVivek Kasireddy struct drm_device *dev = plane->dev;
1395c68ab92SVivek Kasireddy struct virtio_gpu_device *vgdev = dev->dev_private;
1405c68ab92SVivek Kasireddy struct virtio_gpu_framebuffer *vgfb;
1415c68ab92SVivek Kasireddy struct virtio_gpu_object *bo;
1425c68ab92SVivek Kasireddy
1435c68ab92SVivek Kasireddy vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
1445c68ab92SVivek Kasireddy bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
1455c68ab92SVivek Kasireddy if (vgfb->fence) {
1465c68ab92SVivek Kasireddy struct virtio_gpu_object_array *objs;
1475c68ab92SVivek Kasireddy
1485c68ab92SVivek Kasireddy objs = virtio_gpu_array_alloc(1);
1495c68ab92SVivek Kasireddy if (!objs)
1505c68ab92SVivek Kasireddy return;
1515c68ab92SVivek Kasireddy virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]);
1525c68ab92SVivek Kasireddy virtio_gpu_array_lock_resv(objs);
1535c68ab92SVivek Kasireddy virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y,
1545c68ab92SVivek Kasireddy width, height, objs, vgfb->fence);
1555c68ab92SVivek Kasireddy virtio_gpu_notify(vgdev);
1565c68ab92SVivek Kasireddy
1575c68ab92SVivek Kasireddy dma_fence_wait_timeout(&vgfb->fence->f, true,
1585c68ab92SVivek Kasireddy msecs_to_jiffies(50));
1595c68ab92SVivek Kasireddy dma_fence_put(&vgfb->fence->f);
1605c68ab92SVivek Kasireddy vgfb->fence = NULL;
1615c68ab92SVivek Kasireddy } else {
1625c68ab92SVivek Kasireddy virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y,
1635c68ab92SVivek Kasireddy width, height, NULL, NULL);
1645c68ab92SVivek Kasireddy virtio_gpu_notify(vgdev);
1655c68ab92SVivek Kasireddy }
1665c68ab92SVivek Kasireddy }
1675c68ab92SVivek Kasireddy
virtio_gpu_primary_plane_update(struct drm_plane * plane,struct drm_atomic_state * state)168bbbed888SGerd Hoffmann static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
169977697e2SMaxime Ripard struct drm_atomic_state *state)
170dc5698e8SDave Airlie {
171977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
172977697e2SMaxime Ripard plane);
173dc5698e8SDave Airlie struct drm_device *dev = plane->dev;
174dc5698e8SDave Airlie struct virtio_gpu_device *vgdev = dev->dev_private;
175d3767d49SGerd Hoffmann struct virtio_gpu_output *output = NULL;
176dc5698e8SDave Airlie struct virtio_gpu_object *bo;
177c0967617SGerd Hoffmann struct drm_rect rect;
178dc5698e8SDave Airlie
179d3767d49SGerd Hoffmann if (plane->state->crtc)
180d3767d49SGerd Hoffmann output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
181d3767d49SGerd Hoffmann if (old_state->crtc)
182d3767d49SGerd Hoffmann output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
183b28c69ddSHeinrich Schuchardt if (WARN_ON(!output))
184b28c69ddSHeinrich Schuchardt return;
185d3767d49SGerd Hoffmann
1861174c8a0SGerd Hoffmann if (!plane->state->fb || !output->crtc.state->active) {
18764440ef6SGerd Hoffmann DRM_DEBUG("nofb\n");
18864440ef6SGerd Hoffmann virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
18964440ef6SGerd Hoffmann plane->state->src_w >> 16,
19064440ef6SGerd Hoffmann plane->state->src_h >> 16,
19164440ef6SGerd Hoffmann 0, 0);
192790bcd79SGerd Hoffmann virtio_gpu_notify(vgdev);
19364440ef6SGerd Hoffmann return;
19464440ef6SGerd Hoffmann }
19564440ef6SGerd Hoffmann
196c0967617SGerd Hoffmann if (!drm_atomic_helper_damage_merged(old_state, plane->state, &rect))
197c0967617SGerd Hoffmann return;
198c0967617SGerd Hoffmann
199c0967617SGerd Hoffmann bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);
200544c521dSGerd Hoffmann if (bo->dumb)
201c0967617SGerd Hoffmann virtio_gpu_update_dumb_bo(vgdev, plane->state, &rect);
202dc5698e8SDave Airlie
2033954ff10SGerd Hoffmann if (plane->state->fb != old_state->fb ||
2043954ff10SGerd Hoffmann plane->state->src_w != old_state->src_w ||
2053954ff10SGerd Hoffmann plane->state->src_h != old_state->src_h ||
2063954ff10SGerd Hoffmann plane->state->src_x != old_state->src_x ||
2071bc371cdSGerd Hoffmann plane->state->src_y != old_state->src_y ||
2081bc371cdSGerd Hoffmann output->needs_modeset) {
2091bc371cdSGerd Hoffmann output->needs_modeset = false;
21064440ef6SGerd Hoffmann DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n",
21164440ef6SGerd Hoffmann bo->hw_res_handle,
212dc5698e8SDave Airlie plane->state->crtc_w, plane->state->crtc_h,
2130062795eSGerd Hoffmann plane->state->crtc_x, plane->state->crtc_y,
2140062795eSGerd Hoffmann plane->state->src_w >> 16,
2150062795eSGerd Hoffmann plane->state->src_h >> 16,
2160062795eSGerd Hoffmann plane->state->src_x >> 16,
2170062795eSGerd Hoffmann plane->state->src_y >> 16);
2180b0f1afeSGurchetan Singh
2190b0f1afeSGurchetan Singh if (bo->host3d_blob || bo->guest_blob) {
2200b0f1afeSGurchetan Singh virtio_gpu_cmd_set_scanout_blob
2210b0f1afeSGurchetan Singh (vgdev, output->index, bo,
2220b0f1afeSGurchetan Singh plane->state->fb,
2230b0f1afeSGurchetan Singh plane->state->src_w >> 16,
2240b0f1afeSGurchetan Singh plane->state->src_h >> 16,
2250b0f1afeSGurchetan Singh plane->state->src_x >> 16,
2260b0f1afeSGurchetan Singh plane->state->src_y >> 16);
2270b0f1afeSGurchetan Singh } else {
22864440ef6SGerd Hoffmann virtio_gpu_cmd_set_scanout(vgdev, output->index,
22964440ef6SGerd Hoffmann bo->hw_res_handle,
2300062795eSGerd Hoffmann plane->state->src_w >> 16,
2310062795eSGerd Hoffmann plane->state->src_h >> 16,
2320062795eSGerd Hoffmann plane->state->src_x >> 16,
2330062795eSGerd Hoffmann plane->state->src_y >> 16);
2343954ff10SGerd Hoffmann }
2350b0f1afeSGurchetan Singh }
2363954ff10SGerd Hoffmann
2375c68ab92SVivek Kasireddy virtio_gpu_resource_flush(plane,
238c0967617SGerd Hoffmann rect.x1,
239c0967617SGerd Hoffmann rect.y1,
240c0967617SGerd Hoffmann rect.x2 - rect.x1,
241c0967617SGerd Hoffmann rect.y2 - rect.y1);
242dc5698e8SDave Airlie }
243dc5698e8SDave Airlie
virtio_gpu_plane_prepare_fb(struct drm_plane * plane,struct drm_plane_state * new_state)2443a1fde58SVivek Kasireddy static int virtio_gpu_plane_prepare_fb(struct drm_plane *plane,
2459fdd90c0SRobert Foss struct drm_plane_state *new_state)
2469fdd90c0SRobert Foss {
2479fdd90c0SRobert Foss struct drm_device *dev = plane->dev;
2489fdd90c0SRobert Foss struct virtio_gpu_device *vgdev = dev->dev_private;
2499fdd90c0SRobert Foss struct virtio_gpu_framebuffer *vgfb;
2509fdd90c0SRobert Foss struct virtio_gpu_object *bo;
2519fdd90c0SRobert Foss
2529fdd90c0SRobert Foss if (!new_state->fb)
2539fdd90c0SRobert Foss return 0;
2549fdd90c0SRobert Foss
2559fdd90c0SRobert Foss vgfb = to_virtio_gpu_framebuffer(new_state->fb);
2569fdd90c0SRobert Foss bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
2573a1fde58SVivek Kasireddy if (!bo || (plane->type == DRM_PLANE_TYPE_PRIMARY && !bo->guest_blob))
2583a1fde58SVivek Kasireddy return 0;
2593a1fde58SVivek Kasireddy
2603a1fde58SVivek Kasireddy if (bo->dumb && (plane->state->fb != new_state->fb)) {
261e8b6e76fSGurchetan Singh vgfb->fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context,
262e8b6e76fSGurchetan Singh 0);
2639fdd90c0SRobert Foss if (!vgfb->fence)
2649fdd90c0SRobert Foss return -ENOMEM;
2659fdd90c0SRobert Foss }
2669fdd90c0SRobert Foss
2679fdd90c0SRobert Foss return 0;
2689fdd90c0SRobert Foss }
2699fdd90c0SRobert Foss
virtio_gpu_plane_cleanup_fb(struct drm_plane * plane,struct drm_plane_state * state)2703a1fde58SVivek Kasireddy static void virtio_gpu_plane_cleanup_fb(struct drm_plane *plane,
2714656b3a2SDmitry Osipenko struct drm_plane_state *state)
2729fdd90c0SRobert Foss {
2739fdd90c0SRobert Foss struct virtio_gpu_framebuffer *vgfb;
2749fdd90c0SRobert Foss
2754656b3a2SDmitry Osipenko if (!state->fb)
2769fdd90c0SRobert Foss return;
2779fdd90c0SRobert Foss
2784656b3a2SDmitry Osipenko vgfb = to_virtio_gpu_framebuffer(state->fb);
279cb66c6daSGerd Hoffmann if (vgfb->fence) {
280cb66c6daSGerd Hoffmann dma_fence_put(&vgfb->fence->f);
281cb66c6daSGerd Hoffmann vgfb->fence = NULL;
282cb66c6daSGerd Hoffmann }
2839fdd90c0SRobert Foss }
2849fdd90c0SRobert Foss
virtio_gpu_cursor_plane_update(struct drm_plane * plane,struct drm_atomic_state * state)285bbbed888SGerd Hoffmann static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
286977697e2SMaxime Ripard struct drm_atomic_state *state)
287bbbed888SGerd Hoffmann {
288977697e2SMaxime Ripard struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
289977697e2SMaxime Ripard plane);
290bbbed888SGerd Hoffmann struct drm_device *dev = plane->dev;
291bbbed888SGerd Hoffmann struct virtio_gpu_device *vgdev = dev->dev_private;
292bbbed888SGerd Hoffmann struct virtio_gpu_output *output = NULL;
293bbbed888SGerd Hoffmann struct virtio_gpu_framebuffer *vgfb;
294bbbed888SGerd Hoffmann struct virtio_gpu_object *bo = NULL;
295bbbed888SGerd Hoffmann uint32_t handle;
296dc5698e8SDave Airlie
297bbbed888SGerd Hoffmann if (plane->state->crtc)
298bbbed888SGerd Hoffmann output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
299bbbed888SGerd Hoffmann if (old_state->crtc)
300bbbed888SGerd Hoffmann output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
301b28c69ddSHeinrich Schuchardt if (WARN_ON(!output))
302b28c69ddSHeinrich Schuchardt return;
303bbbed888SGerd Hoffmann
304bbbed888SGerd Hoffmann if (plane->state->fb) {
305bbbed888SGerd Hoffmann vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
3063823da3aSDaniel Stone bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);
307bbbed888SGerd Hoffmann handle = bo->hw_res_handle;
308bbbed888SGerd Hoffmann } else {
309bbbed888SGerd Hoffmann handle = 0;
310bbbed888SGerd Hoffmann }
311bbbed888SGerd Hoffmann
312bbbed888SGerd Hoffmann if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
313bbbed888SGerd Hoffmann /* new cursor -- update & wait */
3143d3bdbc0SGerd Hoffmann struct virtio_gpu_object_array *objs;
3153d3bdbc0SGerd Hoffmann
3163d3bdbc0SGerd Hoffmann objs = virtio_gpu_array_alloc(1);
3173d3bdbc0SGerd Hoffmann if (!objs)
3183d3bdbc0SGerd Hoffmann return;
3193d3bdbc0SGerd Hoffmann virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]);
3205cfd31c5SGerd Hoffmann virtio_gpu_array_lock_resv(objs);
321bbbed888SGerd Hoffmann virtio_gpu_cmd_transfer_to_host_2d
3223d3bdbc0SGerd Hoffmann (vgdev, 0,
32364f1cc99SGerd Hoffmann plane->state->crtc_w,
32464f1cc99SGerd Hoffmann plane->state->crtc_h,
3253d3bdbc0SGerd Hoffmann 0, 0, objs, vgfb->fence);
326790bcd79SGerd Hoffmann virtio_gpu_notify(vgdev);
327620f9c5eSGerd Hoffmann dma_fence_wait(&vgfb->fence->f, true);
3289fdd90c0SRobert Foss dma_fence_put(&vgfb->fence->f);
3299fdd90c0SRobert Foss vgfb->fence = NULL;
330bbbed888SGerd Hoffmann }
331bbbed888SGerd Hoffmann
332bbbed888SGerd Hoffmann if (plane->state->fb != old_state->fb) {
33386f752d2SGerd Hoffmann DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
334bbbed888SGerd Hoffmann plane->state->crtc_x,
33586f752d2SGerd Hoffmann plane->state->crtc_y,
33686f752d2SGerd Hoffmann plane->state->fb ? plane->state->fb->hot_x : 0,
33786f752d2SGerd Hoffmann plane->state->fb ? plane->state->fb->hot_y : 0);
338bbbed888SGerd Hoffmann output->cursor.hdr.type =
339bbbed888SGerd Hoffmann cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
340bbbed888SGerd Hoffmann output->cursor.resource_id = cpu_to_le32(handle);
34186f752d2SGerd Hoffmann if (plane->state->fb) {
34286f752d2SGerd Hoffmann output->cursor.hot_x =
34386f752d2SGerd Hoffmann cpu_to_le32(plane->state->fb->hot_x);
34486f752d2SGerd Hoffmann output->cursor.hot_y =
34586f752d2SGerd Hoffmann cpu_to_le32(plane->state->fb->hot_y);
34686f752d2SGerd Hoffmann } else {
34786f752d2SGerd Hoffmann output->cursor.hot_x = cpu_to_le32(0);
34886f752d2SGerd Hoffmann output->cursor.hot_y = cpu_to_le32(0);
34986f752d2SGerd Hoffmann }
350bbbed888SGerd Hoffmann } else {
351bbbed888SGerd Hoffmann DRM_DEBUG("move +%d+%d\n",
352bbbed888SGerd Hoffmann plane->state->crtc_x,
353bbbed888SGerd Hoffmann plane->state->crtc_y);
354bbbed888SGerd Hoffmann output->cursor.hdr.type =
355bbbed888SGerd Hoffmann cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
356bbbed888SGerd Hoffmann }
357bbbed888SGerd Hoffmann output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
358bbbed888SGerd Hoffmann output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
359bbbed888SGerd Hoffmann virtio_gpu_cursor_ping(vgdev, output);
360bbbed888SGerd Hoffmann }
361bbbed888SGerd Hoffmann
362bbbed888SGerd Hoffmann static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
3633a1fde58SVivek Kasireddy .prepare_fb = virtio_gpu_plane_prepare_fb,
3643a1fde58SVivek Kasireddy .cleanup_fb = virtio_gpu_plane_cleanup_fb,
365dc5698e8SDave Airlie .atomic_check = virtio_gpu_plane_atomic_check,
366bbbed888SGerd Hoffmann .atomic_update = virtio_gpu_primary_plane_update,
367bbbed888SGerd Hoffmann };
368bbbed888SGerd Hoffmann
369bbbed888SGerd Hoffmann static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
3703a1fde58SVivek Kasireddy .prepare_fb = virtio_gpu_plane_prepare_fb,
3713a1fde58SVivek Kasireddy .cleanup_fb = virtio_gpu_plane_cleanup_fb,
372bbbed888SGerd Hoffmann .atomic_check = virtio_gpu_plane_atomic_check,
373bbbed888SGerd Hoffmann .atomic_update = virtio_gpu_cursor_plane_update,
374dc5698e8SDave Airlie };
375dc5698e8SDave Airlie
virtio_gpu_plane_init(struct virtio_gpu_device * vgdev,enum drm_plane_type type,int index)376dc5698e8SDave Airlie struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
377bbbed888SGerd Hoffmann enum drm_plane_type type,
378dc5698e8SDave Airlie int index)
379dc5698e8SDave Airlie {
380dc5698e8SDave Airlie struct drm_device *dev = vgdev->ddev;
381bbbed888SGerd Hoffmann const struct drm_plane_helper_funcs *funcs;
382dc5698e8SDave Airlie struct drm_plane *plane;
383bbbed888SGerd Hoffmann const uint32_t *formats;
38478476288SDanilo Krummrich int nformats;
385dc5698e8SDave Airlie
386bbbed888SGerd Hoffmann if (type == DRM_PLANE_TYPE_CURSOR) {
387bbbed888SGerd Hoffmann formats = virtio_gpu_cursor_formats;
388bbbed888SGerd Hoffmann nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
389bbbed888SGerd Hoffmann funcs = &virtio_gpu_cursor_helper_funcs;
390bbbed888SGerd Hoffmann } else {
391bbbed888SGerd Hoffmann formats = virtio_gpu_formats;
392bbbed888SGerd Hoffmann nformats = ARRAY_SIZE(virtio_gpu_formats);
393bbbed888SGerd Hoffmann funcs = &virtio_gpu_primary_helper_funcs;
394bbbed888SGerd Hoffmann }
39578476288SDanilo Krummrich
39678476288SDanilo Krummrich plane = drmm_universal_plane_alloc(dev, struct drm_plane, dev,
39778476288SDanilo Krummrich 1 << index, &virtio_gpu_plane_funcs,
39878476288SDanilo Krummrich formats, nformats, NULL, type, NULL);
39978476288SDanilo Krummrich if (IS_ERR(plane))
40078476288SDanilo Krummrich return plane;
401dc5698e8SDave Airlie
402bbbed888SGerd Hoffmann drm_plane_helper_add(plane, funcs);
40301f05940SJavier Martinez Canillas
40401f05940SJavier Martinez Canillas if (type == DRM_PLANE_TYPE_PRIMARY)
40501f05940SJavier Martinez Canillas drm_plane_enable_fb_damage_clips(plane);
40601f05940SJavier Martinez Canillas
407dc5698e8SDave Airlie return plane;
408dc5698e8SDave Airlie }
409