1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #include <drm/drm_file.h>
27 #include <drm/drm_fourcc.h>
28 
29 #include "virtgpu_drv.h"
30 
31 static int virtio_gpu_gem_create(struct drm_file *file,
32 				 struct drm_device *dev,
33 				 struct virtio_gpu_object_params *params,
34 				 struct drm_gem_object **obj_p,
35 				 uint32_t *handle_p)
36 {
37 	struct virtio_gpu_device *vgdev = dev->dev_private;
38 	struct virtio_gpu_object *obj;
39 	int ret;
40 	u32 handle;
41 
42 	if (vgdev->has_virgl_3d)
43 		virtio_gpu_create_context(dev, file);
44 
45 	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
46 	if (ret < 0)
47 		return ret;
48 
49 	ret = drm_gem_handle_create(file, &obj->base.base, &handle);
50 	if (ret) {
51 		drm_gem_object_release(&obj->base.base);
52 		return ret;
53 	}
54 
55 	*obj_p = &obj->base.base;
56 
57 	/* drop reference from allocate - handle holds it now */
58 	drm_gem_object_put_unlocked(&obj->base.base);
59 
60 	*handle_p = handle;
61 	return 0;
62 }
63 
64 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
65 				struct drm_device *dev,
66 				struct drm_mode_create_dumb *args)
67 {
68 	struct drm_gem_object *gobj;
69 	struct virtio_gpu_object_params params = { 0 };
70 	int ret;
71 	uint32_t pitch;
72 
73 	if (args->bpp != 32)
74 		return -EINVAL;
75 
76 	pitch = args->width * 4;
77 	args->size = pitch * args->height;
78 	args->size = ALIGN(args->size, PAGE_SIZE);
79 
80 	params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888);
81 	params.width = args->width;
82 	params.height = args->height;
83 	params.size = args->size;
84 	params.dumb = true;
85 	ret = virtio_gpu_gem_create(file_priv, dev, &params, &gobj,
86 				    &args->handle);
87 	if (ret)
88 		goto fail;
89 
90 	args->pitch = pitch;
91 	return ret;
92 
93 fail:
94 	return ret;
95 }
96 
97 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
98 			      struct drm_device *dev,
99 			      uint32_t handle, uint64_t *offset_p)
100 {
101 	struct drm_gem_object *gobj;
102 
103 	BUG_ON(!offset_p);
104 	gobj = drm_gem_object_lookup(file_priv, handle);
105 	if (gobj == NULL)
106 		return -ENOENT;
107 	*offset_p = drm_vma_node_offset_addr(&gobj->vma_node);
108 	drm_gem_object_put_unlocked(gobj);
109 	return 0;
110 }
111 
112 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
113 			       struct drm_file *file)
114 {
115 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
116 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
117 	struct virtio_gpu_object_array *objs;
118 
119 	if (!vgdev->has_virgl_3d)
120 		goto out_notify;
121 
122 	objs = virtio_gpu_array_alloc(1);
123 	if (!objs)
124 		return -ENOMEM;
125 	virtio_gpu_array_add_obj(objs, obj);
126 
127 	virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id,
128 					       objs);
129 out_notify:
130 	virtio_gpu_notify(vgdev);
131 	return 0;
132 }
133 
134 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
135 				 struct drm_file *file)
136 {
137 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
138 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
139 	struct virtio_gpu_object_array *objs;
140 
141 	if (!vgdev->has_virgl_3d)
142 		return;
143 
144 	objs = virtio_gpu_array_alloc(1);
145 	if (!objs)
146 		return;
147 	virtio_gpu_array_add_obj(objs, obj);
148 
149 	virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id,
150 					       objs);
151 	virtio_gpu_notify(vgdev);
152 }
153 
154 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)
155 {
156 	struct virtio_gpu_object_array *objs;
157 	size_t size = sizeof(*objs) + sizeof(objs->objs[0]) * nents;
158 
159 	objs = kmalloc(size, GFP_KERNEL);
160 	if (!objs)
161 		return NULL;
162 
163 	objs->nents = 0;
164 	objs->total = nents;
165 	return objs;
166 }
167 
168 static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs)
169 {
170 	kfree(objs);
171 }
172 
173 struct virtio_gpu_object_array*
174 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents)
175 {
176 	struct virtio_gpu_object_array *objs;
177 	u32 i;
178 
179 	objs = virtio_gpu_array_alloc(nents);
180 	if (!objs)
181 		return NULL;
182 
183 	for (i = 0; i < nents; i++) {
184 		objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]);
185 		if (!objs->objs[i]) {
186 			objs->nents = i;
187 			virtio_gpu_array_put_free(objs);
188 			return NULL;
189 		}
190 	}
191 	objs->nents = i;
192 	return objs;
193 }
194 
195 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
196 			      struct drm_gem_object *obj)
197 {
198 	if (WARN_ON_ONCE(objs->nents == objs->total))
199 		return;
200 
201 	drm_gem_object_get(obj);
202 	objs->objs[objs->nents] = obj;
203 	objs->nents++;
204 }
205 
206 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs)
207 {
208 	int ret;
209 
210 	if (objs->nents == 1) {
211 		ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL);
212 	} else {
213 		ret = drm_gem_lock_reservations(objs->objs, objs->nents,
214 						&objs->ticket);
215 	}
216 	return ret;
217 }
218 
219 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs)
220 {
221 	if (objs->nents == 1) {
222 		dma_resv_unlock(objs->objs[0]->resv);
223 	} else {
224 		drm_gem_unlock_reservations(objs->objs, objs->nents,
225 					    &objs->ticket);
226 	}
227 }
228 
229 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
230 				struct dma_fence *fence)
231 {
232 	int i;
233 
234 	for (i = 0; i < objs->nents; i++)
235 		dma_resv_add_excl_fence(objs->objs[i]->resv, fence);
236 }
237 
238 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs)
239 {
240 	u32 i;
241 
242 	for (i = 0; i < objs->nents; i++)
243 		drm_gem_object_put_unlocked(objs->objs[i]);
244 	virtio_gpu_array_free(objs);
245 }
246 
247 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
248 				       struct virtio_gpu_object_array *objs)
249 {
250 	spin_lock(&vgdev->obj_free_lock);
251 	list_add_tail(&objs->next, &vgdev->obj_free_list);
252 	spin_unlock(&vgdev->obj_free_lock);
253 	schedule_work(&vgdev->obj_free_work);
254 }
255 
256 void virtio_gpu_array_put_free_work(struct work_struct *work)
257 {
258 	struct virtio_gpu_device *vgdev =
259 		container_of(work, struct virtio_gpu_device, obj_free_work);
260 	struct virtio_gpu_object_array *objs;
261 
262 	spin_lock(&vgdev->obj_free_lock);
263 	while (!list_empty(&vgdev->obj_free_list)) {
264 		objs = list_first_entry(&vgdev->obj_free_list,
265 					struct virtio_gpu_object_array, next);
266 		list_del(&objs->next);
267 		spin_unlock(&vgdev->obj_free_lock);
268 		virtio_gpu_array_put_free(objs);
269 		spin_lock(&vgdev->obj_free_lock);
270 	}
271 	spin_unlock(&vgdev->obj_free_lock);
272 }
273