1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <drm/drm_file.h> 27 #include <drm/drm_fourcc.h> 28 29 #include "virtgpu_drv.h" 30 31 static int virtio_gpu_gem_create(struct drm_file *file, 32 struct drm_device *dev, 33 struct virtio_gpu_object_params *params, 34 struct drm_gem_object **obj_p, 35 uint32_t *handle_p) 36 { 37 struct virtio_gpu_device *vgdev = dev->dev_private; 38 struct virtio_gpu_object *obj; 39 int ret; 40 u32 handle; 41 42 if (vgdev->has_virgl_3d) 43 virtio_gpu_create_context(dev, file); 44 45 ret = virtio_gpu_object_create(vgdev, params, &obj, NULL); 46 if (ret < 0) 47 return ret; 48 49 ret = drm_gem_handle_create(file, &obj->base.base, &handle); 50 if (ret) { 51 drm_gem_object_release(&obj->base.base); 52 return ret; 53 } 54 55 *obj_p = &obj->base.base; 56 57 /* drop reference from allocate - handle holds it now */ 58 drm_gem_object_put(&obj->base.base); 59 60 *handle_p = handle; 61 return 0; 62 } 63 64 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 65 struct drm_device *dev, 66 struct drm_mode_create_dumb *args) 67 { 68 struct drm_gem_object *gobj; 69 struct virtio_gpu_object_params params = { 0 }; 70 int ret; 71 uint32_t pitch; 72 73 if (args->bpp != 32) 74 return -EINVAL; 75 76 pitch = args->width * 4; 77 args->size = pitch * args->height; 78 args->size = ALIGN(args->size, PAGE_SIZE); 79 80 params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888); 81 params.width = args->width; 82 params.height = args->height; 83 params.size = args->size; 84 params.dumb = true; 85 ret = virtio_gpu_gem_create(file_priv, dev, ¶ms, &gobj, 86 &args->handle); 87 if (ret) 88 goto fail; 89 90 args->pitch = pitch; 91 return ret; 92 93 fail: 94 return ret; 95 } 96 97 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 98 struct drm_device *dev, 99 uint32_t handle, uint64_t *offset_p) 100 { 101 struct drm_gem_object *gobj; 102 103 BUG_ON(!offset_p); 104 gobj = drm_gem_object_lookup(file_priv, handle); 105 if (gobj == NULL) 106 return -ENOENT; 107 *offset_p = drm_vma_node_offset_addr(&gobj->vma_node); 108 drm_gem_object_put(gobj); 109 return 0; 110 } 111 112 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 113 struct drm_file *file) 114 { 115 struct virtio_gpu_device *vgdev = obj->dev->dev_private; 116 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 117 struct virtio_gpu_object_array *objs; 118 119 if (!vgdev->has_virgl_3d) 120 goto out_notify; 121 122 objs = virtio_gpu_array_alloc(1); 123 if (!objs) 124 return -ENOMEM; 125 virtio_gpu_array_add_obj(objs, obj); 126 127 virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id, 128 objs); 129 out_notify: 130 virtio_gpu_notify(vgdev); 131 return 0; 132 } 133 134 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 135 struct drm_file *file) 136 { 137 struct virtio_gpu_device *vgdev = obj->dev->dev_private; 138 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 139 struct virtio_gpu_object_array *objs; 140 141 if (!vgdev->has_virgl_3d) 142 return; 143 144 objs = virtio_gpu_array_alloc(1); 145 if (!objs) 146 return; 147 virtio_gpu_array_add_obj(objs, obj); 148 149 virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id, 150 objs); 151 virtio_gpu_notify(vgdev); 152 } 153 154 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents) 155 { 156 struct virtio_gpu_object_array *objs; 157 158 objs = kmalloc(struct_size(objs, objs, nents), GFP_KERNEL); 159 if (!objs) 160 return NULL; 161 162 objs->nents = 0; 163 objs->total = nents; 164 return objs; 165 } 166 167 static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs) 168 { 169 kfree(objs); 170 } 171 172 struct virtio_gpu_object_array* 173 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents) 174 { 175 struct virtio_gpu_object_array *objs; 176 u32 i; 177 178 objs = virtio_gpu_array_alloc(nents); 179 if (!objs) 180 return NULL; 181 182 for (i = 0; i < nents; i++) { 183 objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]); 184 if (!objs->objs[i]) { 185 objs->nents = i; 186 virtio_gpu_array_put_free(objs); 187 return NULL; 188 } 189 } 190 objs->nents = i; 191 return objs; 192 } 193 194 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 195 struct drm_gem_object *obj) 196 { 197 if (WARN_ON_ONCE(objs->nents == objs->total)) 198 return; 199 200 drm_gem_object_get(obj); 201 objs->objs[objs->nents] = obj; 202 objs->nents++; 203 } 204 205 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs) 206 { 207 int ret; 208 209 if (objs->nents == 1) { 210 ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL); 211 } else { 212 ret = drm_gem_lock_reservations(objs->objs, objs->nents, 213 &objs->ticket); 214 } 215 return ret; 216 } 217 218 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs) 219 { 220 if (objs->nents == 1) { 221 dma_resv_unlock(objs->objs[0]->resv); 222 } else { 223 drm_gem_unlock_reservations(objs->objs, objs->nents, 224 &objs->ticket); 225 } 226 } 227 228 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 229 struct dma_fence *fence) 230 { 231 int i; 232 233 for (i = 0; i < objs->nents; i++) 234 dma_resv_add_excl_fence(objs->objs[i]->resv, fence); 235 } 236 237 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs) 238 { 239 u32 i; 240 241 for (i = 0; i < objs->nents; i++) 242 drm_gem_object_put(objs->objs[i]); 243 virtio_gpu_array_free(objs); 244 } 245 246 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 247 struct virtio_gpu_object_array *objs) 248 { 249 spin_lock(&vgdev->obj_free_lock); 250 list_add_tail(&objs->next, &vgdev->obj_free_list); 251 spin_unlock(&vgdev->obj_free_lock); 252 schedule_work(&vgdev->obj_free_work); 253 } 254 255 void virtio_gpu_array_put_free_work(struct work_struct *work) 256 { 257 struct virtio_gpu_device *vgdev = 258 container_of(work, struct virtio_gpu_device, obj_free_work); 259 struct virtio_gpu_object_array *objs; 260 261 spin_lock(&vgdev->obj_free_lock); 262 while (!list_empty(&vgdev->obj_free_list)) { 263 objs = list_first_entry(&vgdev->obj_free_list, 264 struct virtio_gpu_object_array, next); 265 list_del(&objs->next); 266 spin_unlock(&vgdev->obj_free_lock); 267 virtio_gpu_array_put_free(objs); 268 spin_lock(&vgdev->obj_free_lock); 269 } 270 spin_unlock(&vgdev->obj_free_lock); 271 } 272