1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #include <drm/drm_file.h>
27 #include <drm/drm_fourcc.h>
28 
29 #include "virtgpu_drv.h"
30 
31 static int virtio_gpu_gem_create(struct drm_file *file,
32 				 struct drm_device *dev,
33 				 struct virtio_gpu_object_params *params,
34 				 struct drm_gem_object **obj_p,
35 				 uint32_t *handle_p)
36 {
37 	struct virtio_gpu_device *vgdev = dev->dev_private;
38 	struct virtio_gpu_object *obj;
39 	int ret;
40 	u32 handle;
41 
42 	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
43 	if (ret < 0)
44 		return ret;
45 
46 	ret = drm_gem_handle_create(file, &obj->base.base, &handle);
47 	if (ret) {
48 		drm_gem_object_release(&obj->base.base);
49 		return ret;
50 	}
51 
52 	*obj_p = &obj->base.base;
53 
54 	/* drop reference from allocate - handle holds it now */
55 	drm_gem_object_put(&obj->base.base);
56 
57 	*handle_p = handle;
58 	return 0;
59 }
60 
61 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
62 				struct drm_device *dev,
63 				struct drm_mode_create_dumb *args)
64 {
65 	struct drm_gem_object *gobj;
66 	struct virtio_gpu_object_params params = { 0 };
67 	int ret;
68 	uint32_t pitch;
69 
70 	if (args->bpp != 32)
71 		return -EINVAL;
72 
73 	pitch = args->width * 4;
74 	args->size = pitch * args->height;
75 	args->size = ALIGN(args->size, PAGE_SIZE);
76 
77 	params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888);
78 	params.width = args->width;
79 	params.height = args->height;
80 	params.size = args->size;
81 	params.dumb = true;
82 	ret = virtio_gpu_gem_create(file_priv, dev, &params, &gobj,
83 				    &args->handle);
84 	if (ret)
85 		goto fail;
86 
87 	args->pitch = pitch;
88 	return ret;
89 
90 fail:
91 	return ret;
92 }
93 
94 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
95 			      struct drm_device *dev,
96 			      uint32_t handle, uint64_t *offset_p)
97 {
98 	struct drm_gem_object *gobj;
99 
100 	BUG_ON(!offset_p);
101 	gobj = drm_gem_object_lookup(file_priv, handle);
102 	if (gobj == NULL)
103 		return -ENOENT;
104 	*offset_p = drm_vma_node_offset_addr(&gobj->vma_node);
105 	drm_gem_object_put(gobj);
106 	return 0;
107 }
108 
109 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
110 			       struct drm_file *file)
111 {
112 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
113 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
114 	struct virtio_gpu_object_array *objs;
115 
116 	if (!vgdev->has_virgl_3d)
117 		goto out_notify;
118 
119 	/* the context might still be missing when the first ioctl is
120 	 * DRM_IOCTL_MODE_CREATE_DUMB or DRM_IOCTL_PRIME_FD_TO_HANDLE
121 	 */
122 	virtio_gpu_create_context(obj->dev, file);
123 
124 	objs = virtio_gpu_array_alloc(1);
125 	if (!objs)
126 		return -ENOMEM;
127 	virtio_gpu_array_add_obj(objs, obj);
128 
129 	virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id,
130 					       objs);
131 out_notify:
132 	virtio_gpu_notify(vgdev);
133 	return 0;
134 }
135 
136 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
137 				 struct drm_file *file)
138 {
139 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
140 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
141 	struct virtio_gpu_object_array *objs;
142 
143 	if (!vgdev->has_virgl_3d)
144 		return;
145 
146 	objs = virtio_gpu_array_alloc(1);
147 	if (!objs)
148 		return;
149 	virtio_gpu_array_add_obj(objs, obj);
150 
151 	virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id,
152 					       objs);
153 	virtio_gpu_notify(vgdev);
154 }
155 
156 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)
157 {
158 	struct virtio_gpu_object_array *objs;
159 
160 	objs = kmalloc(struct_size(objs, objs, nents), GFP_KERNEL);
161 	if (!objs)
162 		return NULL;
163 
164 	objs->nents = 0;
165 	objs->total = nents;
166 	return objs;
167 }
168 
169 static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs)
170 {
171 	kfree(objs);
172 }
173 
174 struct virtio_gpu_object_array*
175 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents)
176 {
177 	struct virtio_gpu_object_array *objs;
178 	u32 i;
179 
180 	objs = virtio_gpu_array_alloc(nents);
181 	if (!objs)
182 		return NULL;
183 
184 	for (i = 0; i < nents; i++) {
185 		objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]);
186 		if (!objs->objs[i]) {
187 			objs->nents = i;
188 			virtio_gpu_array_put_free(objs);
189 			return NULL;
190 		}
191 	}
192 	objs->nents = i;
193 	return objs;
194 }
195 
196 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
197 			      struct drm_gem_object *obj)
198 {
199 	if (WARN_ON_ONCE(objs->nents == objs->total))
200 		return;
201 
202 	drm_gem_object_get(obj);
203 	objs->objs[objs->nents] = obj;
204 	objs->nents++;
205 }
206 
207 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs)
208 {
209 	int ret;
210 
211 	if (objs->nents == 1) {
212 		ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL);
213 	} else {
214 		ret = drm_gem_lock_reservations(objs->objs, objs->nents,
215 						&objs->ticket);
216 	}
217 	return ret;
218 }
219 
220 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs)
221 {
222 	if (objs->nents == 1) {
223 		dma_resv_unlock(objs->objs[0]->resv);
224 	} else {
225 		drm_gem_unlock_reservations(objs->objs, objs->nents,
226 					    &objs->ticket);
227 	}
228 }
229 
230 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
231 				struct dma_fence *fence)
232 {
233 	int i;
234 
235 	for (i = 0; i < objs->nents; i++)
236 		dma_resv_add_excl_fence(objs->objs[i]->resv, fence);
237 }
238 
239 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs)
240 {
241 	u32 i;
242 
243 	for (i = 0; i < objs->nents; i++)
244 		drm_gem_object_put(objs->objs[i]);
245 	virtio_gpu_array_free(objs);
246 }
247 
248 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
249 				       struct virtio_gpu_object_array *objs)
250 {
251 	spin_lock(&vgdev->obj_free_lock);
252 	list_add_tail(&objs->next, &vgdev->obj_free_list);
253 	spin_unlock(&vgdev->obj_free_lock);
254 	schedule_work(&vgdev->obj_free_work);
255 }
256 
257 void virtio_gpu_array_put_free_work(struct work_struct *work)
258 {
259 	struct virtio_gpu_device *vgdev =
260 		container_of(work, struct virtio_gpu_device, obj_free_work);
261 	struct virtio_gpu_object_array *objs;
262 
263 	spin_lock(&vgdev->obj_free_lock);
264 	while (!list_empty(&vgdev->obj_free_list)) {
265 		objs = list_first_entry(&vgdev->obj_free_list,
266 					struct virtio_gpu_object_array, next);
267 		list_del(&objs->next);
268 		spin_unlock(&vgdev->obj_free_lock);
269 		virtio_gpu_array_put_free(objs);
270 		spin_lock(&vgdev->obj_free_lock);
271 	}
272 	spin_unlock(&vgdev->obj_free_lock);
273 }
274