1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <drm/drm_file.h> 27 #include <drm/drm_fourcc.h> 28 29 #include "virtgpu_drv.h" 30 31 static int virtio_gpu_gem_create(struct drm_file *file, 32 struct drm_device *dev, 33 struct virtio_gpu_object_params *params, 34 struct drm_gem_object **obj_p, 35 uint32_t *handle_p) 36 { 37 struct virtio_gpu_device *vgdev = dev->dev_private; 38 struct virtio_gpu_object *obj; 39 int ret; 40 u32 handle; 41 42 ret = virtio_gpu_object_create(vgdev, params, &obj, NULL); 43 if (ret < 0) 44 return ret; 45 46 ret = drm_gem_handle_create(file, &obj->base.base, &handle); 47 if (ret) { 48 drm_gem_object_release(&obj->base.base); 49 return ret; 50 } 51 52 *obj_p = &obj->base.base; 53 54 /* drop reference from allocate - handle holds it now */ 55 drm_gem_object_put(&obj->base.base); 56 57 *handle_p = handle; 58 return 0; 59 } 60 61 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 62 struct drm_device *dev, 63 struct drm_mode_create_dumb *args) 64 { 65 struct drm_gem_object *gobj; 66 struct virtio_gpu_object_params params = { 0 }; 67 int ret; 68 uint32_t pitch; 69 70 if (args->bpp != 32) 71 return -EINVAL; 72 73 pitch = args->width * 4; 74 args->size = pitch * args->height; 75 args->size = ALIGN(args->size, PAGE_SIZE); 76 77 params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888); 78 params.width = args->width; 79 params.height = args->height; 80 params.size = args->size; 81 params.dumb = true; 82 ret = virtio_gpu_gem_create(file_priv, dev, ¶ms, &gobj, 83 &args->handle); 84 if (ret) 85 goto fail; 86 87 args->pitch = pitch; 88 return ret; 89 90 fail: 91 return ret; 92 } 93 94 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 95 struct drm_device *dev, 96 uint32_t handle, uint64_t *offset_p) 97 { 98 struct drm_gem_object *gobj; 99 100 BUG_ON(!offset_p); 101 gobj = drm_gem_object_lookup(file_priv, handle); 102 if (gobj == NULL) 103 return -ENOENT; 104 *offset_p = drm_vma_node_offset_addr(&gobj->vma_node); 105 drm_gem_object_put(gobj); 106 return 0; 107 } 108 109 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 110 struct drm_file *file) 111 { 112 struct virtio_gpu_device *vgdev = obj->dev->dev_private; 113 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 114 struct virtio_gpu_object_array *objs; 115 116 if (!vgdev->has_virgl_3d) 117 goto out_notify; 118 119 objs = virtio_gpu_array_alloc(1); 120 if (!objs) 121 return -ENOMEM; 122 virtio_gpu_array_add_obj(objs, obj); 123 124 virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id, 125 objs); 126 out_notify: 127 virtio_gpu_notify(vgdev); 128 return 0; 129 } 130 131 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 132 struct drm_file *file) 133 { 134 struct virtio_gpu_device *vgdev = obj->dev->dev_private; 135 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 136 struct virtio_gpu_object_array *objs; 137 138 if (!vgdev->has_virgl_3d) 139 return; 140 141 objs = virtio_gpu_array_alloc(1); 142 if (!objs) 143 return; 144 virtio_gpu_array_add_obj(objs, obj); 145 146 virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id, 147 objs); 148 virtio_gpu_notify(vgdev); 149 } 150 151 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents) 152 { 153 struct virtio_gpu_object_array *objs; 154 size_t size = sizeof(*objs) + sizeof(objs->objs[0]) * nents; 155 156 objs = kmalloc(size, GFP_KERNEL); 157 if (!objs) 158 return NULL; 159 160 objs->nents = 0; 161 objs->total = nents; 162 return objs; 163 } 164 165 static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs) 166 { 167 kfree(objs); 168 } 169 170 struct virtio_gpu_object_array* 171 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents) 172 { 173 struct virtio_gpu_object_array *objs; 174 u32 i; 175 176 objs = virtio_gpu_array_alloc(nents); 177 if (!objs) 178 return NULL; 179 180 for (i = 0; i < nents; i++) { 181 objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]); 182 if (!objs->objs[i]) { 183 objs->nents = i; 184 virtio_gpu_array_put_free(objs); 185 return NULL; 186 } 187 } 188 objs->nents = i; 189 return objs; 190 } 191 192 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 193 struct drm_gem_object *obj) 194 { 195 if (WARN_ON_ONCE(objs->nents == objs->total)) 196 return; 197 198 drm_gem_object_get(obj); 199 objs->objs[objs->nents] = obj; 200 objs->nents++; 201 } 202 203 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs) 204 { 205 int ret; 206 207 if (objs->nents == 1) { 208 ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL); 209 } else { 210 ret = drm_gem_lock_reservations(objs->objs, objs->nents, 211 &objs->ticket); 212 } 213 return ret; 214 } 215 216 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs) 217 { 218 if (objs->nents == 1) { 219 dma_resv_unlock(objs->objs[0]->resv); 220 } else { 221 drm_gem_unlock_reservations(objs->objs, objs->nents, 222 &objs->ticket); 223 } 224 } 225 226 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 227 struct dma_fence *fence) 228 { 229 int i; 230 231 for (i = 0; i < objs->nents; i++) 232 dma_resv_add_excl_fence(objs->objs[i]->resv, fence); 233 } 234 235 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs) 236 { 237 u32 i; 238 239 for (i = 0; i < objs->nents; i++) 240 drm_gem_object_put(objs->objs[i]); 241 virtio_gpu_array_free(objs); 242 } 243 244 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 245 struct virtio_gpu_object_array *objs) 246 { 247 spin_lock(&vgdev->obj_free_lock); 248 list_add_tail(&objs->next, &vgdev->obj_free_list); 249 spin_unlock(&vgdev->obj_free_lock); 250 schedule_work(&vgdev->obj_free_work); 251 } 252 253 void virtio_gpu_array_put_free_work(struct work_struct *work) 254 { 255 struct virtio_gpu_device *vgdev = 256 container_of(work, struct virtio_gpu_device, obj_free_work); 257 struct virtio_gpu_object_array *objs; 258 259 spin_lock(&vgdev->obj_free_lock); 260 while (!list_empty(&vgdev->obj_free_list)) { 261 objs = list_first_entry(&vgdev->obj_free_list, 262 struct virtio_gpu_object_array, next); 263 list_del(&objs->next); 264 spin_unlock(&vgdev->obj_free_lock); 265 virtio_gpu_array_put_free(objs); 266 spin_lock(&vgdev->obj_free_lock); 267 } 268 spin_unlock(&vgdev->obj_free_lock); 269 } 270