1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #include <trace/events/dma_fence.h>
27 
28 #include "virtgpu_drv.h"
29 
30 #define to_virtio_gpu_fence(x) \
31 	container_of(x, struct virtio_gpu_fence, f)
32 
33 static const char *virtio_gpu_get_driver_name(struct dma_fence *f)
34 {
35 	return "virtio_gpu";
36 }
37 
38 static const char *virtio_gpu_get_timeline_name(struct dma_fence *f)
39 {
40 	return "controlq";
41 }
42 
43 static bool virtio_gpu_fence_signaled(struct dma_fence *f)
44 {
45 	/* leaked fence outside driver before completing
46 	 * initialization with virtio_gpu_fence_emit.
47 	 */
48 	WARN_ON_ONCE(f->seqno == 0);
49 	return false;
50 }
51 
52 static void virtio_gpu_fence_value_str(struct dma_fence *f, char *str, int size)
53 {
54 	snprintf(str, size, "[%llu, %llu]", f->context, f->seqno);
55 }
56 
57 static void virtio_gpu_timeline_value_str(struct dma_fence *f, char *str,
58 					  int size)
59 {
60 	struct virtio_gpu_fence *fence = to_virtio_gpu_fence(f);
61 
62 	snprintf(str, size, "%llu",
63 		 (u64)atomic64_read(&fence->drv->last_fence_id));
64 }
65 
66 static const struct dma_fence_ops virtio_gpu_fence_ops = {
67 	.get_driver_name     = virtio_gpu_get_driver_name,
68 	.get_timeline_name   = virtio_gpu_get_timeline_name,
69 	.signaled            = virtio_gpu_fence_signaled,
70 	.fence_value_str     = virtio_gpu_fence_value_str,
71 	.timeline_value_str  = virtio_gpu_timeline_value_str,
72 };
73 
74 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev)
75 {
76 	struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
77 	struct virtio_gpu_fence *fence = kzalloc(sizeof(struct virtio_gpu_fence),
78 							GFP_KERNEL);
79 	if (!fence)
80 		return fence;
81 
82 	fence->drv = drv;
83 
84 	/* This only partially initializes the fence because the seqno is
85 	 * unknown yet.  The fence must not be used outside of the driver
86 	 * until virtio_gpu_fence_emit is called.
87 	 */
88 	dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock, drv->context,
89 		       0);
90 
91 	return fence;
92 }
93 
94 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
95 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
96 			  struct virtio_gpu_fence *fence)
97 {
98 	struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
99 	unsigned long irq_flags;
100 
101 	spin_lock_irqsave(&drv->lock, irq_flags);
102 	fence->fence_id = fence->f.seqno = ++drv->current_fence_id;
103 	dma_fence_get(&fence->f);
104 	list_add_tail(&fence->node, &drv->fences);
105 	spin_unlock_irqrestore(&drv->lock, irq_flags);
106 
107 	trace_dma_fence_emit(&fence->f);
108 
109 	cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
110 	cmd_hdr->fence_id = cpu_to_le64(fence->fence_id);
111 }
112 
113 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
114 				    u64 fence_id)
115 {
116 	struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
117 	struct virtio_gpu_fence *signaled, *curr, *tmp;
118 	unsigned long irq_flags;
119 
120 	spin_lock_irqsave(&drv->lock, irq_flags);
121 	atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id);
122 	list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
123 		if (fence_id != curr->fence_id)
124 			continue;
125 
126 		signaled = curr;
127 
128 		/*
129 		 * Signal any fences with a strictly smaller sequence number
130 		 * than the current signaled fence.
131 		 */
132 		list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
133 			/* dma-fence contexts must match */
134 			if (signaled->f.context != curr->f.context)
135 				continue;
136 
137 			if (!dma_fence_is_later(&signaled->f, &curr->f))
138 				continue;
139 
140 			dma_fence_signal_locked(&curr->f);
141 			list_del(&curr->node);
142 			dma_fence_put(&curr->f);
143 		}
144 
145 		dma_fence_signal_locked(&signaled->f);
146 		list_del(&signaled->node);
147 		dma_fence_put(&signaled->f);
148 		break;
149 	}
150 	spin_unlock_irqrestore(&drv->lock, irq_flags);
151 }
152