1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_fb_helper.h>
40 #include <drm/ttm/ttm_bo_api.h>
41 #include <drm/ttm/ttm_bo_driver.h>
42 #include <drm/ttm/ttm_placement.h>
43 #include <drm/ttm/ttm_module.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 0
51 #define DRIVER_PATCHLEVEL 1
52 
53 /* virtgpu_drm_bus.c */
54 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
55 
56 struct virtio_gpu_object {
57 	struct drm_gem_object gem_base;
58 	uint32_t hw_res_handle;
59 
60 	struct sg_table *pages;
61 	uint32_t mapped;
62 	void *vmap;
63 	bool dumb;
64 	struct ttm_place                placement_code;
65 	struct ttm_placement		placement;
66 	struct ttm_buffer_object	tbo;
67 	struct ttm_bo_kmap_obj		kmap;
68 };
69 #define gem_to_virtio_gpu_obj(gobj) \
70 	container_of((gobj), struct virtio_gpu_object, gem_base)
71 
72 struct virtio_gpu_vbuffer;
73 struct virtio_gpu_device;
74 
75 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
76 				   struct virtio_gpu_vbuffer *vbuf);
77 
78 struct virtio_gpu_fence_driver {
79 	atomic64_t       last_seq;
80 	uint64_t         sync_seq;
81 	uint64_t         context;
82 	struct list_head fences;
83 	spinlock_t       lock;
84 };
85 
86 struct virtio_gpu_fence {
87 	struct dma_fence f;
88 	struct virtio_gpu_fence_driver *drv;
89 	struct list_head node;
90 	uint64_t seq;
91 };
92 #define to_virtio_fence(x) \
93 	container_of(x, struct virtio_gpu_fence, f)
94 
95 struct virtio_gpu_vbuffer {
96 	char *buf;
97 	int size;
98 
99 	void *data_buf;
100 	uint32_t data_size;
101 
102 	char *resp_buf;
103 	int resp_size;
104 
105 	virtio_gpu_resp_cb resp_cb;
106 
107 	struct list_head list;
108 };
109 
110 struct virtio_gpu_output {
111 	int index;
112 	struct drm_crtc crtc;
113 	struct drm_connector conn;
114 	struct drm_encoder enc;
115 	struct virtio_gpu_display_one info;
116 	struct virtio_gpu_update_cursor cursor;
117 	int cur_x;
118 	int cur_y;
119 	bool enabled;
120 };
121 #define drm_crtc_to_virtio_gpu_output(x) \
122 	container_of(x, struct virtio_gpu_output, crtc)
123 #define drm_connector_to_virtio_gpu_output(x) \
124 	container_of(x, struct virtio_gpu_output, conn)
125 #define drm_encoder_to_virtio_gpu_output(x) \
126 	container_of(x, struct virtio_gpu_output, enc)
127 
128 struct virtio_gpu_framebuffer {
129 	struct drm_framebuffer base;
130 	int x1, y1, x2, y2; /* dirty rect */
131 	spinlock_t dirty_lock;
132 	uint32_t hw_res_handle;
133 };
134 #define to_virtio_gpu_framebuffer(x) \
135 	container_of(x, struct virtio_gpu_framebuffer, base)
136 
137 struct virtio_gpu_fbdev {
138 	struct drm_fb_helper           helper;
139 	struct virtio_gpu_framebuffer  vgfb;
140 	struct virtio_gpu_device       *vgdev;
141 	struct delayed_work            work;
142 };
143 
144 struct virtio_gpu_mman {
145 	struct ttm_bo_global_ref        bo_global_ref;
146 	struct drm_global_reference	mem_global_ref;
147 	bool				mem_global_referenced;
148 	struct ttm_bo_device		bdev;
149 };
150 
151 struct virtio_gpu_fbdev;
152 
153 struct virtio_gpu_queue {
154 	struct virtqueue *vq;
155 	spinlock_t qlock;
156 	wait_queue_head_t ack_queue;
157 	struct work_struct dequeue_work;
158 };
159 
160 struct virtio_gpu_drv_capset {
161 	uint32_t id;
162 	uint32_t max_version;
163 	uint32_t max_size;
164 };
165 
166 struct virtio_gpu_drv_cap_cache {
167 	struct list_head head;
168 	void *caps_cache;
169 	uint32_t id;
170 	uint32_t version;
171 	uint32_t size;
172 	atomic_t is_valid;
173 };
174 
175 struct virtio_gpu_device {
176 	struct device *dev;
177 	struct drm_device *ddev;
178 
179 	struct virtio_device *vdev;
180 
181 	struct virtio_gpu_mman mman;
182 
183 	/* pointer to fbdev info structure */
184 	struct virtio_gpu_fbdev *vgfbdev;
185 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
186 	uint32_t num_scanouts;
187 
188 	struct virtio_gpu_queue ctrlq;
189 	struct virtio_gpu_queue cursorq;
190 	struct kmem_cache *vbufs;
191 	bool vqs_ready;
192 
193 	struct idr	resource_idr;
194 	spinlock_t resource_idr_lock;
195 
196 	wait_queue_head_t resp_wq;
197 	/* current display info */
198 	spinlock_t display_info_lock;
199 	bool display_info_pending;
200 
201 	struct virtio_gpu_fence_driver fence_drv;
202 
203 	struct idr	ctx_id_idr;
204 	spinlock_t ctx_id_idr_lock;
205 
206 	bool has_virgl_3d;
207 
208 	struct work_struct config_changed_work;
209 
210 	struct virtio_gpu_drv_capset *capsets;
211 	uint32_t num_capsets;
212 	struct list_head cap_cache;
213 };
214 
215 struct virtio_gpu_fpriv {
216 	uint32_t ctx_id;
217 };
218 
219 /* virtio_ioctl.c */
220 #define DRM_VIRTIO_NUM_IOCTLS 10
221 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
222 
223 /* virtio_kms.c */
224 int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
225 void virtio_gpu_driver_unload(struct drm_device *dev);
226 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
227 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
228 
229 /* virtio_gem.c */
230 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
231 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
232 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
233 int virtio_gpu_gem_create(struct drm_file *file,
234 			  struct drm_device *dev,
235 			  uint64_t size,
236 			  struct drm_gem_object **obj_p,
237 			  uint32_t *handle_p);
238 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
239 			       struct drm_file *file);
240 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
241 				 struct drm_file *file);
242 struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
243 						  size_t size, bool kernel,
244 						  bool pinned);
245 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
246 				struct drm_device *dev,
247 				struct drm_mode_create_dumb *args);
248 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
249 			      struct drm_device *dev,
250 			      uint32_t handle, uint64_t *offset_p);
251 
252 /* virtio_fb */
253 #define VIRTIO_GPUFB_CONN_LIMIT 1
254 int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
255 void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
256 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
257 			     struct drm_clip_rect *clips,
258 			     unsigned int num_clips);
259 /* virtio vg */
260 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
261 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
262 void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
263 			       uint32_t *resid);
264 void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
265 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
266 				    uint32_t resource_id,
267 				    uint32_t format,
268 				    uint32_t width,
269 				    uint32_t height);
270 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
271 				   uint32_t resource_id);
272 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
273 					uint32_t resource_id, uint64_t offset,
274 					__le32 width, __le32 height,
275 					__le32 x, __le32 y,
276 					struct virtio_gpu_fence **fence);
277 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
278 				   uint32_t resource_id,
279 				   uint32_t x, uint32_t y,
280 				   uint32_t width, uint32_t height);
281 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
282 				uint32_t scanout_id, uint32_t resource_id,
283 				uint32_t width, uint32_t height,
284 				uint32_t x, uint32_t y);
285 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
286 			     struct virtio_gpu_object *obj,
287 			     uint32_t resource_id,
288 			     struct virtio_gpu_fence **fence);
289 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
290 			      struct virtio_gpu_object *obj);
291 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
292 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
293 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
294 			    struct virtio_gpu_output *output);
295 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
296 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
297 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
298 			      int idx, int version,
299 			      struct virtio_gpu_drv_cap_cache **cache_p);
300 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
301 				   uint32_t nlen, const char *name);
302 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
303 				    uint32_t id);
304 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
305 					    uint32_t ctx_id,
306 					    uint32_t resource_id);
307 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
308 					    uint32_t ctx_id,
309 					    uint32_t resource_id);
310 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
311 			   void *data, uint32_t data_size,
312 			   uint32_t ctx_id, struct virtio_gpu_fence **fence);
313 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
314 					  uint32_t resource_id, uint32_t ctx_id,
315 					  uint64_t offset, uint32_t level,
316 					  struct virtio_gpu_box *box,
317 					  struct virtio_gpu_fence **fence);
318 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
319 					uint32_t resource_id, uint32_t ctx_id,
320 					uint64_t offset, uint32_t level,
321 					struct virtio_gpu_box *box,
322 					struct virtio_gpu_fence **fence);
323 void
324 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
325 				  struct virtio_gpu_resource_create_3d *rc_3d,
326 				  struct virtio_gpu_fence **fence);
327 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
328 void virtio_gpu_cursor_ack(struct virtqueue *vq);
329 void virtio_gpu_fence_ack(struct virtqueue *vq);
330 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
331 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
332 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
333 
334 /* virtio_gpu_display.c */
335 int virtio_gpu_framebuffer_init(struct drm_device *dev,
336 				struct virtio_gpu_framebuffer *vgfb,
337 				const struct drm_mode_fb_cmd2 *mode_cmd,
338 				struct drm_gem_object *obj);
339 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
340 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
341 
342 /* virtio_gpu_plane.c */
343 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
344 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
345 					enum drm_plane_type type,
346 					int index);
347 
348 /* virtio_gpu_ttm.c */
349 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
350 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
351 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
352 
353 /* virtio_gpu_fence.c */
354 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
355 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
356 			  struct virtio_gpu_fence **fence);
357 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
358 				    u64 last_seq);
359 
360 /* virtio_gpu_object */
361 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
362 			     unsigned long size, bool kernel, bool pinned,
363 			     struct virtio_gpu_object **bo_ptr);
364 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
365 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
366 				   struct virtio_gpu_object *bo);
367 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
368 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
369 
370 /* virtgpu_prime.c */
371 int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
372 void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
373 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
374 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
375 	struct drm_device *dev, struct dma_buf_attachment *attach,
376 	struct sg_table *sgt);
377 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
378 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
379 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
380 			   struct vm_area_struct *vma);
381 
382 static inline struct virtio_gpu_object*
383 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
384 {
385 	ttm_bo_get(&bo->tbo);
386 	return bo;
387 }
388 
389 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
390 {
391 	struct ttm_buffer_object *tbo;
392 
393 	if ((*bo) == NULL)
394 		return;
395 	tbo = &((*bo)->tbo);
396 	ttm_bo_put(tbo);
397 	*bo = NULL;
398 }
399 
400 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
401 {
402 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
403 }
404 
405 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
406 					 bool no_wait)
407 {
408 	int r;
409 
410 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
411 	if (unlikely(r != 0)) {
412 		if (r != -ERESTARTSYS) {
413 			struct virtio_gpu_device *qdev =
414 				bo->gem_base.dev->dev_private;
415 			dev_err(qdev->dev, "%p reserve failed\n", bo);
416 		}
417 		return r;
418 	}
419 	return 0;
420 }
421 
422 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
423 {
424 	ttm_bo_unreserve(&bo->tbo);
425 }
426 
427 /* virgl debufs */
428 int virtio_gpu_debugfs_init(struct drm_minor *minor);
429 
430 #endif
431