1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/dma-direction.h>
30 #include <linux/virtio.h>
31 #include <linux/virtio_ids.h>
32 #include <linux/virtio_config.h>
33 #include <linux/virtio_gpu.h>
34 
35 #include <drm/drm_atomic.h>
36 #include <drm/drm_drv.h>
37 #include <drm/drm_encoder.h>
38 #include <drm/drm_fb_helper.h>
39 #include <drm/drm_fourcc.h>
40 #include <drm/drm_gem.h>
41 #include <drm/drm_gem_shmem_helper.h>
42 #include <drm/drm_ioctl.h>
43 #include <drm/drm_probe_helper.h>
44 #include <drm/virtgpu_drm.h>
45 
46 #define DRIVER_NAME "virtio_gpu"
47 #define DRIVER_DESC "virtio GPU"
48 #define DRIVER_DATE "0"
49 
50 #define DRIVER_MAJOR 0
51 #define DRIVER_MINOR 1
52 #define DRIVER_PATCHLEVEL 0
53 
54 #define STATE_INITIALIZING 0
55 #define STATE_OK 1
56 #define STATE_ERR 2
57 
58 #define MAX_CAPSET_ID 63
59 #define MAX_RINGS 64
60 
61 struct virtio_gpu_object_params {
62 	unsigned long size;
63 	bool dumb;
64 	/* 3d */
65 	bool virgl;
66 	bool blob;
67 
68 	/* classic resources only */
69 	uint32_t format;
70 	uint32_t width;
71 	uint32_t height;
72 	uint32_t target;
73 	uint32_t bind;
74 	uint32_t depth;
75 	uint32_t array_size;
76 	uint32_t last_level;
77 	uint32_t nr_samples;
78 	uint32_t flags;
79 
80 	/* blob resources only */
81 	uint32_t ctx_id;
82 	uint32_t blob_mem;
83 	uint32_t blob_flags;
84 	uint64_t blob_id;
85 };
86 
87 struct virtio_gpu_object {
88 	struct drm_gem_shmem_object base;
89 	uint32_t hw_res_handle;
90 	bool dumb;
91 	bool created;
92 	bool host3d_blob, guest_blob;
93 	uint32_t blob_mem, blob_flags;
94 
95 	int uuid_state;
96 	uuid_t uuid;
97 };
98 #define gem_to_virtio_gpu_obj(gobj) \
99 	container_of((gobj), struct virtio_gpu_object, base.base)
100 
101 struct virtio_gpu_object_shmem {
102 	struct virtio_gpu_object base;
103 	struct sg_table *pages;
104 	uint32_t mapped;
105 };
106 
107 struct virtio_gpu_object_vram {
108 	struct virtio_gpu_object base;
109 	uint32_t map_state;
110 	uint32_t map_info;
111 	struct drm_mm_node vram_node;
112 };
113 
114 #define to_virtio_gpu_shmem(virtio_gpu_object) \
115 	container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
116 
117 #define to_virtio_gpu_vram(virtio_gpu_object) \
118 	container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
119 
120 struct virtio_gpu_object_array {
121 	struct ww_acquire_ctx ticket;
122 	struct list_head next;
123 	u32 nents, total;
124 	struct drm_gem_object *objs[];
125 };
126 
127 struct virtio_gpu_vbuffer;
128 struct virtio_gpu_device;
129 
130 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
131 				   struct virtio_gpu_vbuffer *vbuf);
132 
133 struct virtio_gpu_fence_driver {
134 	atomic64_t       last_fence_id;
135 	uint64_t         current_fence_id;
136 	uint64_t         context;
137 	struct list_head fences;
138 	spinlock_t       lock;
139 };
140 
141 #define VIRTGPU_EVENT_FENCE_SIGNALED_INTERNAL 0x10000000
142 struct virtio_gpu_fence_event {
143 	struct drm_pending_event base;
144 	struct drm_event event;
145 };
146 
147 struct virtio_gpu_fence {
148 	struct dma_fence f;
149 	uint32_t ring_idx;
150 	uint64_t fence_id;
151 	bool emit_fence_info;
152 	struct virtio_gpu_fence_event *e;
153 	struct virtio_gpu_fence_driver *drv;
154 	struct list_head node;
155 };
156 
157 struct virtio_gpu_vbuffer {
158 	char *buf;
159 	int size;
160 
161 	void *data_buf;
162 	uint32_t data_size;
163 
164 	char *resp_buf;
165 	int resp_size;
166 	virtio_gpu_resp_cb resp_cb;
167 	void *resp_cb_data;
168 
169 	struct virtio_gpu_object_array *objs;
170 	struct list_head list;
171 };
172 
173 struct virtio_gpu_output {
174 	int index;
175 	struct drm_crtc crtc;
176 	struct drm_connector conn;
177 	struct drm_encoder enc;
178 	struct virtio_gpu_display_one info;
179 	struct virtio_gpu_update_cursor cursor;
180 	struct edid *edid;
181 	int cur_x;
182 	int cur_y;
183 	bool needs_modeset;
184 };
185 #define drm_crtc_to_virtio_gpu_output(x) \
186 	container_of(x, struct virtio_gpu_output, crtc)
187 
188 struct virtio_gpu_framebuffer {
189 	struct drm_framebuffer base;
190 	struct virtio_gpu_fence *fence;
191 };
192 #define to_virtio_gpu_framebuffer(x) \
193 	container_of(x, struct virtio_gpu_framebuffer, base)
194 
195 struct virtio_gpu_queue {
196 	struct virtqueue *vq;
197 	spinlock_t qlock;
198 	wait_queue_head_t ack_queue;
199 	struct work_struct dequeue_work;
200 };
201 
202 struct virtio_gpu_drv_capset {
203 	uint32_t id;
204 	uint32_t max_version;
205 	uint32_t max_size;
206 };
207 
208 struct virtio_gpu_drv_cap_cache {
209 	struct list_head head;
210 	void *caps_cache;
211 	uint32_t id;
212 	uint32_t version;
213 	uint32_t size;
214 	atomic_t is_valid;
215 };
216 
217 struct virtio_gpu_device {
218 	struct device *dev;
219 	struct drm_device *ddev;
220 
221 	struct virtio_device *vdev;
222 
223 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
224 	uint32_t num_scanouts;
225 
226 	struct virtio_gpu_queue ctrlq;
227 	struct virtio_gpu_queue cursorq;
228 	struct kmem_cache *vbufs;
229 
230 	atomic_t pending_commands;
231 
232 	struct ida	resource_ida;
233 
234 	wait_queue_head_t resp_wq;
235 	/* current display info */
236 	spinlock_t display_info_lock;
237 	bool display_info_pending;
238 
239 	struct virtio_gpu_fence_driver fence_drv;
240 
241 	struct ida	ctx_id_ida;
242 
243 	bool has_virgl_3d;
244 	bool has_edid;
245 	bool has_indirect;
246 	bool has_resource_assign_uuid;
247 	bool has_resource_blob;
248 	bool has_host_visible;
249 	bool has_context_init;
250 	struct virtio_shm_region host_visible_region;
251 	struct drm_mm host_visible_mm;
252 
253 	struct work_struct config_changed_work;
254 
255 	struct work_struct obj_free_work;
256 	spinlock_t obj_free_lock;
257 	struct list_head obj_free_list;
258 
259 	struct virtio_gpu_drv_capset *capsets;
260 	uint32_t num_capsets;
261 	uint64_t capset_id_mask;
262 	struct list_head cap_cache;
263 
264 	/* protects uuid state when exporting */
265 	spinlock_t resource_export_lock;
266 	/* protects map state and host_visible_mm */
267 	spinlock_t host_visible_lock;
268 };
269 
270 struct virtio_gpu_fpriv {
271 	uint32_t ctx_id;
272 	uint32_t context_init;
273 	bool context_created;
274 	uint32_t num_rings;
275 	uint64_t base_fence_ctx;
276 	uint64_t ring_idx_mask;
277 	struct mutex context_lock;
278 };
279 
280 /* virtgpu_ioctl.c */
281 #define DRM_VIRTIO_NUM_IOCTLS 12
282 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
283 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
284 
285 /* virtgpu_kms.c */
286 int virtio_gpu_init(struct drm_device *dev);
287 void virtio_gpu_deinit(struct drm_device *dev);
288 void virtio_gpu_release(struct drm_device *dev);
289 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
290 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
291 
292 /* virtgpu_gem.c */
293 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
294 			       struct drm_file *file);
295 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
296 				 struct drm_file *file);
297 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
298 				struct drm_device *dev,
299 				struct drm_mode_create_dumb *args);
300 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
301 			      struct drm_device *dev,
302 			      uint32_t handle, uint64_t *offset_p);
303 
304 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
305 struct virtio_gpu_object_array*
306 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
307 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
308 			      struct drm_gem_object *obj);
309 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
310 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
311 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
312 				struct dma_fence *fence);
313 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
314 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
315 				       struct virtio_gpu_object_array *objs);
316 void virtio_gpu_array_put_free_work(struct work_struct *work);
317 
318 /* virtgpu_vq.c */
319 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
320 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
321 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
322 				    struct virtio_gpu_object *bo,
323 				    struct virtio_gpu_object_params *params,
324 				    struct virtio_gpu_object_array *objs,
325 				    struct virtio_gpu_fence *fence);
326 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
327 				   struct virtio_gpu_object *bo);
328 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
329 					uint64_t offset,
330 					uint32_t width, uint32_t height,
331 					uint32_t x, uint32_t y,
332 					struct virtio_gpu_object_array *objs,
333 					struct virtio_gpu_fence *fence);
334 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
335 				   uint32_t resource_id,
336 				   uint32_t x, uint32_t y,
337 				   uint32_t width, uint32_t height,
338 				   struct virtio_gpu_object_array *objs,
339 				   struct virtio_gpu_fence *fence);
340 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
341 				uint32_t scanout_id, uint32_t resource_id,
342 				uint32_t width, uint32_t height,
343 				uint32_t x, uint32_t y);
344 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
345 			      struct virtio_gpu_object *obj,
346 			      struct virtio_gpu_mem_entry *ents,
347 			      unsigned int nents);
348 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
349 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
350 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
351 			    struct virtio_gpu_output *output);
352 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
353 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
354 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
355 			      int idx, int version,
356 			      struct virtio_gpu_drv_cap_cache **cache_p);
357 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
358 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
359 				   uint32_t context_init, uint32_t nlen,
360 				   const char *name);
361 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
362 				    uint32_t id);
363 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
364 					    uint32_t ctx_id,
365 					    struct virtio_gpu_object_array *objs);
366 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
367 					    uint32_t ctx_id,
368 					    struct virtio_gpu_object_array *objs);
369 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
370 			   void *data, uint32_t data_size,
371 			   uint32_t ctx_id,
372 			   struct virtio_gpu_object_array *objs,
373 			   struct virtio_gpu_fence *fence);
374 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
375 					  uint32_t ctx_id,
376 					  uint64_t offset, uint32_t level,
377 					  uint32_t stride,
378 					  uint32_t layer_stride,
379 					  struct drm_virtgpu_3d_box *box,
380 					  struct virtio_gpu_object_array *objs,
381 					  struct virtio_gpu_fence *fence);
382 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
383 					uint32_t ctx_id,
384 					uint64_t offset, uint32_t level,
385 					uint32_t stride,
386 					uint32_t layer_stride,
387 					struct drm_virtgpu_3d_box *box,
388 					struct virtio_gpu_object_array *objs,
389 					struct virtio_gpu_fence *fence);
390 void
391 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
392 				  struct virtio_gpu_object *bo,
393 				  struct virtio_gpu_object_params *params,
394 				  struct virtio_gpu_object_array *objs,
395 				  struct virtio_gpu_fence *fence);
396 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
397 void virtio_gpu_cursor_ack(struct virtqueue *vq);
398 void virtio_gpu_fence_ack(struct virtqueue *vq);
399 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
400 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
401 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
402 
403 void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
404 
405 int
406 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
407 				    struct virtio_gpu_object_array *objs);
408 
409 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
410 		       struct virtio_gpu_object_array *objs, uint64_t offset);
411 
412 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
413 			  struct virtio_gpu_object *bo);
414 
415 void
416 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
417 				    struct virtio_gpu_object *bo,
418 				    struct virtio_gpu_object_params *params,
419 				    struct virtio_gpu_mem_entry *ents,
420 				    uint32_t nents);
421 void
422 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
423 				uint32_t scanout_id,
424 				struct virtio_gpu_object *bo,
425 				struct drm_framebuffer *fb,
426 				uint32_t width, uint32_t height,
427 				uint32_t x, uint32_t y);
428 
429 /* virtgpu_display.c */
430 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
431 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
432 
433 /* virtgpu_plane.c */
434 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
435 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
436 					enum drm_plane_type type,
437 					int index);
438 
439 /* virtgpu_fence.c */
440 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
441 						uint64_t base_fence_ctx,
442 						uint32_t ring_idx);
443 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
444 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
445 			  struct virtio_gpu_fence *fence);
446 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
447 				    u64 fence_id);
448 
449 /* virtgpu_object.c */
450 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
451 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
452 						size_t size);
453 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
454 			     struct virtio_gpu_object_params *params,
455 			     struct virtio_gpu_object **bo_ptr,
456 			     struct virtio_gpu_fence *fence);
457 
458 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
459 
460 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
461 			       uint32_t *resid);
462 /* virtgpu_prime.c */
463 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
464 				    struct virtio_gpu_object *bo);
465 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
466 					 int flags);
467 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
468 						struct dma_buf *buf);
469 int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj,
470 			       uuid_t *uuid);
471 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
472 	struct drm_device *dev, struct dma_buf_attachment *attach,
473 	struct sg_table *sgt);
474 
475 /* virtgpu_debugfs.c */
476 void virtio_gpu_debugfs_init(struct drm_minor *minor);
477 
478 /* virtgpu_vram.c */
479 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
480 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
481 			   struct virtio_gpu_object_params *params,
482 			   struct virtio_gpu_object **bo_ptr);
483 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo,
484 					     struct device *dev,
485 					     enum dma_data_direction dir);
486 void virtio_gpu_vram_unmap_dma_buf(struct device *dev,
487 				   struct sg_table *sgt,
488 				   enum dma_data_direction dir);
489 
490 #endif
491