1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/virtio.h> 30 #include <linux/virtio_ids.h> 31 #include <linux/virtio_config.h> 32 #include <linux/virtio_gpu.h> 33 34 #include <drm/drm_atomic.h> 35 #include <drm/drm_drv.h> 36 #include <drm/drm_encoder.h> 37 #include <drm/drm_fb_helper.h> 38 #include <drm/drm_gem.h> 39 #include <drm/drm_gem_shmem_helper.h> 40 #include <drm/drm_ioctl.h> 41 #include <drm/drm_probe_helper.h> 42 #include <drm/virtgpu_drm.h> 43 44 #define DRIVER_NAME "virtio_gpu" 45 #define DRIVER_DESC "virtio GPU" 46 #define DRIVER_DATE "0" 47 48 #define DRIVER_MAJOR 0 49 #define DRIVER_MINOR 1 50 #define DRIVER_PATCHLEVEL 0 51 52 struct virtio_gpu_object_params { 53 uint32_t format; 54 uint32_t width; 55 uint32_t height; 56 unsigned long size; 57 bool dumb; 58 /* 3d */ 59 bool virgl; 60 uint32_t target; 61 uint32_t bind; 62 uint32_t depth; 63 uint32_t array_size; 64 uint32_t last_level; 65 uint32_t nr_samples; 66 uint32_t flags; 67 }; 68 69 struct virtio_gpu_object { 70 struct drm_gem_shmem_object base; 71 uint32_t hw_res_handle; 72 bool dumb; 73 bool created; 74 }; 75 #define gem_to_virtio_gpu_obj(gobj) \ 76 container_of((gobj), struct virtio_gpu_object, base.base) 77 78 struct virtio_gpu_object_shmem { 79 struct virtio_gpu_object base; 80 struct sg_table *pages; 81 uint32_t mapped; 82 }; 83 84 #define to_virtio_gpu_shmem(virtio_gpu_object) \ 85 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 86 87 struct virtio_gpu_object_array { 88 struct ww_acquire_ctx ticket; 89 struct list_head next; 90 u32 nents, total; 91 struct drm_gem_object *objs[]; 92 }; 93 94 struct virtio_gpu_vbuffer; 95 struct virtio_gpu_device; 96 97 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 98 struct virtio_gpu_vbuffer *vbuf); 99 100 struct virtio_gpu_fence_driver { 101 atomic64_t last_seq; 102 uint64_t sync_seq; 103 uint64_t context; 104 struct list_head fences; 105 spinlock_t lock; 106 }; 107 108 struct virtio_gpu_fence { 109 struct dma_fence f; 110 struct virtio_gpu_fence_driver *drv; 111 struct list_head node; 112 }; 113 114 struct virtio_gpu_vbuffer { 115 char *buf; 116 int size; 117 118 void *data_buf; 119 uint32_t data_size; 120 121 char *resp_buf; 122 int resp_size; 123 virtio_gpu_resp_cb resp_cb; 124 void *resp_cb_data; 125 126 struct virtio_gpu_object_array *objs; 127 struct list_head list; 128 }; 129 130 struct virtio_gpu_output { 131 int index; 132 struct drm_crtc crtc; 133 struct drm_connector conn; 134 struct drm_encoder enc; 135 struct virtio_gpu_display_one info; 136 struct virtio_gpu_update_cursor cursor; 137 struct edid *edid; 138 int cur_x; 139 int cur_y; 140 bool enabled; 141 }; 142 #define drm_crtc_to_virtio_gpu_output(x) \ 143 container_of(x, struct virtio_gpu_output, crtc) 144 145 struct virtio_gpu_framebuffer { 146 struct drm_framebuffer base; 147 struct virtio_gpu_fence *fence; 148 }; 149 #define to_virtio_gpu_framebuffer(x) \ 150 container_of(x, struct virtio_gpu_framebuffer, base) 151 152 struct virtio_gpu_queue { 153 struct virtqueue *vq; 154 spinlock_t qlock; 155 wait_queue_head_t ack_queue; 156 struct work_struct dequeue_work; 157 }; 158 159 struct virtio_gpu_drv_capset { 160 uint32_t id; 161 uint32_t max_version; 162 uint32_t max_size; 163 }; 164 165 struct virtio_gpu_drv_cap_cache { 166 struct list_head head; 167 void *caps_cache; 168 uint32_t id; 169 uint32_t version; 170 uint32_t size; 171 atomic_t is_valid; 172 }; 173 174 struct virtio_gpu_device { 175 struct device *dev; 176 struct drm_device *ddev; 177 178 struct virtio_device *vdev; 179 180 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 181 uint32_t num_scanouts; 182 183 struct virtio_gpu_queue ctrlq; 184 struct virtio_gpu_queue cursorq; 185 struct kmem_cache *vbufs; 186 187 atomic_t pending_commands; 188 189 struct ida resource_ida; 190 191 wait_queue_head_t resp_wq; 192 /* current display info */ 193 spinlock_t display_info_lock; 194 bool display_info_pending; 195 196 struct virtio_gpu_fence_driver fence_drv; 197 198 struct ida ctx_id_ida; 199 200 bool has_virgl_3d; 201 bool has_edid; 202 bool has_indirect; 203 204 struct work_struct config_changed_work; 205 206 struct work_struct obj_free_work; 207 spinlock_t obj_free_lock; 208 struct list_head obj_free_list; 209 210 struct virtio_gpu_drv_capset *capsets; 211 uint32_t num_capsets; 212 struct list_head cap_cache; 213 }; 214 215 struct virtio_gpu_fpriv { 216 uint32_t ctx_id; 217 bool context_created; 218 struct mutex context_lock; 219 }; 220 221 /* virtio_ioctl.c */ 222 #define DRM_VIRTIO_NUM_IOCTLS 10 223 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 224 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 225 226 /* virtio_kms.c */ 227 int virtio_gpu_init(struct drm_device *dev); 228 void virtio_gpu_deinit(struct drm_device *dev); 229 void virtio_gpu_release(struct drm_device *dev); 230 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 231 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 232 233 /* virtio_gem.c */ 234 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj); 235 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev); 236 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev); 237 int virtio_gpu_gem_create(struct drm_file *file, 238 struct drm_device *dev, 239 struct virtio_gpu_object_params *params, 240 struct drm_gem_object **obj_p, 241 uint32_t *handle_p); 242 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 243 struct drm_file *file); 244 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 245 struct drm_file *file); 246 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 247 struct drm_device *dev, 248 struct drm_mode_create_dumb *args); 249 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 250 struct drm_device *dev, 251 uint32_t handle, uint64_t *offset_p); 252 253 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 254 struct virtio_gpu_object_array* 255 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 256 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 257 struct drm_gem_object *obj); 258 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 259 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 260 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 261 struct dma_fence *fence); 262 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 263 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 264 struct virtio_gpu_object_array *objs); 265 void virtio_gpu_array_put_free_work(struct work_struct *work); 266 267 /* virtio vg */ 268 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 269 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 270 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 271 struct virtio_gpu_object *bo, 272 struct virtio_gpu_object_params *params, 273 struct virtio_gpu_object_array *objs, 274 struct virtio_gpu_fence *fence); 275 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 276 struct virtio_gpu_object *bo); 277 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 278 uint64_t offset, 279 uint32_t width, uint32_t height, 280 uint32_t x, uint32_t y, 281 struct virtio_gpu_object_array *objs, 282 struct virtio_gpu_fence *fence); 283 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 284 uint32_t resource_id, 285 uint32_t x, uint32_t y, 286 uint32_t width, uint32_t height); 287 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 288 uint32_t scanout_id, uint32_t resource_id, 289 uint32_t width, uint32_t height, 290 uint32_t x, uint32_t y); 291 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 292 struct virtio_gpu_object *obj, 293 struct virtio_gpu_mem_entry *ents, 294 unsigned int nents); 295 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 296 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 297 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 298 struct virtio_gpu_output *output); 299 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 300 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 301 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 302 int idx, int version, 303 struct virtio_gpu_drv_cap_cache **cache_p); 304 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 305 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 306 uint32_t nlen, const char *name); 307 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 308 uint32_t id); 309 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 310 uint32_t ctx_id, 311 struct virtio_gpu_object_array *objs); 312 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 313 uint32_t ctx_id, 314 struct virtio_gpu_object_array *objs); 315 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 316 void *data, uint32_t data_size, 317 uint32_t ctx_id, 318 struct virtio_gpu_object_array *objs, 319 struct virtio_gpu_fence *fence); 320 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 321 uint32_t ctx_id, 322 uint64_t offset, uint32_t level, 323 struct drm_virtgpu_3d_box *box, 324 struct virtio_gpu_object_array *objs, 325 struct virtio_gpu_fence *fence); 326 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 327 uint32_t ctx_id, 328 uint64_t offset, uint32_t level, 329 struct drm_virtgpu_3d_box *box, 330 struct virtio_gpu_object_array *objs, 331 struct virtio_gpu_fence *fence); 332 void 333 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 334 struct virtio_gpu_object *bo, 335 struct virtio_gpu_object_params *params, 336 struct virtio_gpu_object_array *objs, 337 struct virtio_gpu_fence *fence); 338 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 339 void virtio_gpu_cursor_ack(struct virtqueue *vq); 340 void virtio_gpu_fence_ack(struct virtqueue *vq); 341 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 342 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 343 void virtio_gpu_dequeue_fence_func(struct work_struct *work); 344 345 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 346 347 /* virtio_gpu_display.c */ 348 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 349 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 350 351 /* virtio_gpu_plane.c */ 352 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 353 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 354 enum drm_plane_type type, 355 int index); 356 357 /* virtio_gpu_fence.c */ 358 struct virtio_gpu_fence *virtio_gpu_fence_alloc( 359 struct virtio_gpu_device *vgdev); 360 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 361 struct virtio_gpu_ctrl_hdr *cmd_hdr, 362 struct virtio_gpu_fence *fence); 363 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 364 u64 last_seq); 365 366 /* virtio_gpu_object */ 367 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 368 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 369 size_t size); 370 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 371 struct virtio_gpu_object_params *params, 372 struct virtio_gpu_object **bo_ptr, 373 struct virtio_gpu_fence *fence); 374 375 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 376 377 /* virtgpu_prime.c */ 378 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 379 struct drm_device *dev, struct dma_buf_attachment *attach, 380 struct sg_table *sgt); 381 382 /* virgl debugfs */ 383 int virtio_gpu_debugfs_init(struct drm_minor *minor); 384 385 #endif 386