1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/dma-direction.h> 30 #include <linux/virtio.h> 31 #include <linux/virtio_ids.h> 32 #include <linux/virtio_config.h> 33 #include <linux/virtio_gpu.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_encoder.h> 38 #include <drm/drm_fb_helper.h> 39 #include <drm/drm_fourcc.h> 40 #include <drm/drm_gem.h> 41 #include <drm/drm_gem_shmem_helper.h> 42 #include <drm/drm_ioctl.h> 43 #include <drm/drm_probe_helper.h> 44 #include <drm/virtgpu_drm.h> 45 46 #define DRIVER_NAME "virtio_gpu" 47 #define DRIVER_DESC "virtio GPU" 48 #define DRIVER_DATE "0" 49 50 #define DRIVER_MAJOR 0 51 #define DRIVER_MINOR 1 52 #define DRIVER_PATCHLEVEL 0 53 54 #define STATE_INITIALIZING 0 55 #define STATE_OK 1 56 #define STATE_ERR 2 57 58 struct virtio_gpu_object_params { 59 unsigned long size; 60 bool dumb; 61 /* 3d */ 62 bool virgl; 63 bool blob; 64 65 /* classic resources only */ 66 uint32_t format; 67 uint32_t width; 68 uint32_t height; 69 uint32_t target; 70 uint32_t bind; 71 uint32_t depth; 72 uint32_t array_size; 73 uint32_t last_level; 74 uint32_t nr_samples; 75 uint32_t flags; 76 77 /* blob resources only */ 78 uint32_t ctx_id; 79 uint32_t blob_mem; 80 uint32_t blob_flags; 81 uint64_t blob_id; 82 }; 83 84 struct virtio_gpu_object { 85 struct drm_gem_shmem_object base; 86 uint32_t hw_res_handle; 87 bool dumb; 88 bool created; 89 bool host3d_blob, guest_blob; 90 uint32_t blob_mem, blob_flags; 91 92 int uuid_state; 93 uuid_t uuid; 94 }; 95 #define gem_to_virtio_gpu_obj(gobj) \ 96 container_of((gobj), struct virtio_gpu_object, base.base) 97 98 struct virtio_gpu_object_shmem { 99 struct virtio_gpu_object base; 100 struct sg_table *pages; 101 uint32_t mapped; 102 }; 103 104 struct virtio_gpu_object_vram { 105 struct virtio_gpu_object base; 106 uint32_t map_state; 107 uint32_t map_info; 108 struct drm_mm_node vram_node; 109 }; 110 111 #define to_virtio_gpu_shmem(virtio_gpu_object) \ 112 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 113 114 #define to_virtio_gpu_vram(virtio_gpu_object) \ 115 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base) 116 117 struct virtio_gpu_object_array { 118 struct ww_acquire_ctx ticket; 119 struct list_head next; 120 u32 nents, total; 121 struct drm_gem_object *objs[]; 122 }; 123 124 struct virtio_gpu_vbuffer; 125 struct virtio_gpu_device; 126 127 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 128 struct virtio_gpu_vbuffer *vbuf); 129 130 struct virtio_gpu_fence_driver { 131 atomic64_t last_fence_id; 132 uint64_t current_fence_id; 133 uint64_t context; 134 struct list_head fences; 135 spinlock_t lock; 136 }; 137 138 struct virtio_gpu_fence { 139 struct dma_fence f; 140 uint64_t fence_id; 141 struct virtio_gpu_fence_driver *drv; 142 struct list_head node; 143 }; 144 145 struct virtio_gpu_vbuffer { 146 char *buf; 147 int size; 148 149 void *data_buf; 150 uint32_t data_size; 151 152 char *resp_buf; 153 int resp_size; 154 virtio_gpu_resp_cb resp_cb; 155 void *resp_cb_data; 156 157 struct virtio_gpu_object_array *objs; 158 struct list_head list; 159 }; 160 161 struct virtio_gpu_output { 162 int index; 163 struct drm_crtc crtc; 164 struct drm_connector conn; 165 struct drm_encoder enc; 166 struct virtio_gpu_display_one info; 167 struct virtio_gpu_update_cursor cursor; 168 struct edid *edid; 169 int cur_x; 170 int cur_y; 171 bool needs_modeset; 172 }; 173 #define drm_crtc_to_virtio_gpu_output(x) \ 174 container_of(x, struct virtio_gpu_output, crtc) 175 176 struct virtio_gpu_framebuffer { 177 struct drm_framebuffer base; 178 struct virtio_gpu_fence *fence; 179 }; 180 #define to_virtio_gpu_framebuffer(x) \ 181 container_of(x, struct virtio_gpu_framebuffer, base) 182 183 struct virtio_gpu_queue { 184 struct virtqueue *vq; 185 spinlock_t qlock; 186 wait_queue_head_t ack_queue; 187 struct work_struct dequeue_work; 188 }; 189 190 struct virtio_gpu_drv_capset { 191 uint32_t id; 192 uint32_t max_version; 193 uint32_t max_size; 194 }; 195 196 struct virtio_gpu_drv_cap_cache { 197 struct list_head head; 198 void *caps_cache; 199 uint32_t id; 200 uint32_t version; 201 uint32_t size; 202 atomic_t is_valid; 203 }; 204 205 struct virtio_gpu_device { 206 struct device *dev; 207 struct drm_device *ddev; 208 209 struct virtio_device *vdev; 210 211 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 212 uint32_t num_scanouts; 213 214 struct virtio_gpu_queue ctrlq; 215 struct virtio_gpu_queue cursorq; 216 struct kmem_cache *vbufs; 217 218 atomic_t pending_commands; 219 220 struct ida resource_ida; 221 222 wait_queue_head_t resp_wq; 223 /* current display info */ 224 spinlock_t display_info_lock; 225 bool display_info_pending; 226 227 struct virtio_gpu_fence_driver fence_drv; 228 229 struct ida ctx_id_ida; 230 231 bool has_virgl_3d; 232 bool has_edid; 233 bool has_indirect; 234 bool has_resource_assign_uuid; 235 bool has_resource_blob; 236 bool has_host_visible; 237 struct virtio_shm_region host_visible_region; 238 struct drm_mm host_visible_mm; 239 240 struct work_struct config_changed_work; 241 242 struct work_struct obj_free_work; 243 spinlock_t obj_free_lock; 244 struct list_head obj_free_list; 245 246 struct virtio_gpu_drv_capset *capsets; 247 uint32_t num_capsets; 248 struct list_head cap_cache; 249 250 /* protects uuid state when exporting */ 251 spinlock_t resource_export_lock; 252 /* protects map state and host_visible_mm */ 253 spinlock_t host_visible_lock; 254 }; 255 256 struct virtio_gpu_fpriv { 257 uint32_t ctx_id; 258 bool context_created; 259 struct mutex context_lock; 260 }; 261 262 /* virtgpu_ioctl.c */ 263 #define DRM_VIRTIO_NUM_IOCTLS 11 264 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 265 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 266 267 /* virtgpu_kms.c */ 268 int virtio_gpu_init(struct drm_device *dev); 269 void virtio_gpu_deinit(struct drm_device *dev); 270 void virtio_gpu_release(struct drm_device *dev); 271 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 272 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 273 274 /* virtgpu_gem.c */ 275 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 276 struct drm_file *file); 277 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 278 struct drm_file *file); 279 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 280 struct drm_device *dev, 281 struct drm_mode_create_dumb *args); 282 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 283 struct drm_device *dev, 284 uint32_t handle, uint64_t *offset_p); 285 286 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 287 struct virtio_gpu_object_array* 288 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 289 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 290 struct drm_gem_object *obj); 291 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 292 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 293 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 294 struct dma_fence *fence); 295 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 296 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 297 struct virtio_gpu_object_array *objs); 298 void virtio_gpu_array_put_free_work(struct work_struct *work); 299 300 /* virtgpu_vq.c */ 301 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 302 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 303 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 304 struct virtio_gpu_object *bo, 305 struct virtio_gpu_object_params *params, 306 struct virtio_gpu_object_array *objs, 307 struct virtio_gpu_fence *fence); 308 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 309 struct virtio_gpu_object *bo); 310 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 311 uint64_t offset, 312 uint32_t width, uint32_t height, 313 uint32_t x, uint32_t y, 314 struct virtio_gpu_object_array *objs, 315 struct virtio_gpu_fence *fence); 316 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 317 uint32_t resource_id, 318 uint32_t x, uint32_t y, 319 uint32_t width, uint32_t height, 320 struct virtio_gpu_object_array *objs, 321 struct virtio_gpu_fence *fence); 322 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 323 uint32_t scanout_id, uint32_t resource_id, 324 uint32_t width, uint32_t height, 325 uint32_t x, uint32_t y); 326 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 327 struct virtio_gpu_object *obj, 328 struct virtio_gpu_mem_entry *ents, 329 unsigned int nents); 330 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 331 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 332 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 333 struct virtio_gpu_output *output); 334 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 335 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 336 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 337 int idx, int version, 338 struct virtio_gpu_drv_cap_cache **cache_p); 339 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 340 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 341 uint32_t nlen, const char *name); 342 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 343 uint32_t id); 344 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 345 uint32_t ctx_id, 346 struct virtio_gpu_object_array *objs); 347 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 348 uint32_t ctx_id, 349 struct virtio_gpu_object_array *objs); 350 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 351 void *data, uint32_t data_size, 352 uint32_t ctx_id, 353 struct virtio_gpu_object_array *objs, 354 struct virtio_gpu_fence *fence); 355 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 356 uint32_t ctx_id, 357 uint64_t offset, uint32_t level, 358 uint32_t stride, 359 uint32_t layer_stride, 360 struct drm_virtgpu_3d_box *box, 361 struct virtio_gpu_object_array *objs, 362 struct virtio_gpu_fence *fence); 363 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 364 uint32_t ctx_id, 365 uint64_t offset, uint32_t level, 366 uint32_t stride, 367 uint32_t layer_stride, 368 struct drm_virtgpu_3d_box *box, 369 struct virtio_gpu_object_array *objs, 370 struct virtio_gpu_fence *fence); 371 void 372 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 373 struct virtio_gpu_object *bo, 374 struct virtio_gpu_object_params *params, 375 struct virtio_gpu_object_array *objs, 376 struct virtio_gpu_fence *fence); 377 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 378 void virtio_gpu_cursor_ack(struct virtqueue *vq); 379 void virtio_gpu_fence_ack(struct virtqueue *vq); 380 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 381 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 382 void virtio_gpu_dequeue_fence_func(struct work_struct *work); 383 384 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 385 386 int 387 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev, 388 struct virtio_gpu_object_array *objs); 389 390 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev, 391 struct virtio_gpu_object_array *objs, uint64_t offset); 392 393 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev, 394 struct virtio_gpu_object *bo); 395 396 void 397 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev, 398 struct virtio_gpu_object *bo, 399 struct virtio_gpu_object_params *params, 400 struct virtio_gpu_mem_entry *ents, 401 uint32_t nents); 402 void 403 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev, 404 uint32_t scanout_id, 405 struct virtio_gpu_object *bo, 406 struct drm_framebuffer *fb, 407 uint32_t width, uint32_t height, 408 uint32_t x, uint32_t y); 409 410 /* virtgpu_display.c */ 411 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 412 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 413 414 /* virtgpu_plane.c */ 415 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 416 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 417 enum drm_plane_type type, 418 int index); 419 420 /* virtgpu_fence.c */ 421 struct virtio_gpu_fence *virtio_gpu_fence_alloc( 422 struct virtio_gpu_device *vgdev); 423 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 424 struct virtio_gpu_ctrl_hdr *cmd_hdr, 425 struct virtio_gpu_fence *fence); 426 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 427 u64 fence_id); 428 429 /* virtgpu_object.c */ 430 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 431 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 432 size_t size); 433 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 434 struct virtio_gpu_object_params *params, 435 struct virtio_gpu_object **bo_ptr, 436 struct virtio_gpu_fence *fence); 437 438 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 439 440 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, 441 uint32_t *resid); 442 /* virtgpu_prime.c */ 443 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev, 444 struct virtio_gpu_object *bo); 445 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, 446 int flags); 447 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, 448 struct dma_buf *buf); 449 int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj, 450 uuid_t *uuid); 451 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 452 struct drm_device *dev, struct dma_buf_attachment *attach, 453 struct sg_table *sgt); 454 455 /* virtgpu_debugfs.c */ 456 void virtio_gpu_debugfs_init(struct drm_minor *minor); 457 458 /* virtgpu_vram.c */ 459 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo); 460 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev, 461 struct virtio_gpu_object_params *params, 462 struct virtio_gpu_object **bo_ptr); 463 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo, 464 struct device *dev, 465 enum dma_data_direction dir); 466 void virtio_gpu_vram_unmap_dma_buf(struct device *dev, 467 struct sg_table *sgt, 468 enum dma_data_direction dir); 469 470 #endif 471