1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_encoder.h>
38 #include <drm/drm_fb_helper.h>
39 #include <drm/drm_probe_helper.h>
40 #include <drm/ttm/ttm_bo_api.h>
41 #include <drm/ttm/ttm_bo_driver.h>
42 #include <drm/ttm/ttm_placement.h>
43 #include <drm/ttm/ttm_module.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
52 
53 struct virtio_gpu_object {
54 	struct drm_gem_object gem_base;
55 	uint32_t hw_res_handle;
56 
57 	struct sg_table *pages;
58 	uint32_t mapped;
59 	void *vmap;
60 	bool dumb;
61 	struct ttm_place                placement_code;
62 	struct ttm_placement		placement;
63 	struct ttm_buffer_object	tbo;
64 	struct ttm_bo_kmap_obj		kmap;
65 	bool created;
66 };
67 #define gem_to_virtio_gpu_obj(gobj) \
68 	container_of((gobj), struct virtio_gpu_object, gem_base)
69 
70 struct virtio_gpu_vbuffer;
71 struct virtio_gpu_device;
72 
73 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
74 				   struct virtio_gpu_vbuffer *vbuf);
75 
76 struct virtio_gpu_fence_driver {
77 	atomic64_t       last_seq;
78 	uint64_t         sync_seq;
79 	uint64_t         context;
80 	struct list_head fences;
81 	spinlock_t       lock;
82 };
83 
84 struct virtio_gpu_fence {
85 	struct dma_fence f;
86 	struct virtio_gpu_fence_driver *drv;
87 	struct list_head node;
88 	uint64_t seq;
89 };
90 #define to_virtio_fence(x) \
91 	container_of(x, struct virtio_gpu_fence, f)
92 
93 struct virtio_gpu_vbuffer {
94 	char *buf;
95 	int size;
96 
97 	void *data_buf;
98 	uint32_t data_size;
99 
100 	char *resp_buf;
101 	int resp_size;
102 
103 	virtio_gpu_resp_cb resp_cb;
104 
105 	struct list_head list;
106 };
107 
108 struct virtio_gpu_output {
109 	int index;
110 	struct drm_crtc crtc;
111 	struct drm_connector conn;
112 	struct drm_encoder enc;
113 	struct virtio_gpu_display_one info;
114 	struct virtio_gpu_update_cursor cursor;
115 	struct edid *edid;
116 	int cur_x;
117 	int cur_y;
118 	bool enabled;
119 };
120 #define drm_crtc_to_virtio_gpu_output(x) \
121 	container_of(x, struct virtio_gpu_output, crtc)
122 #define drm_connector_to_virtio_gpu_output(x) \
123 	container_of(x, struct virtio_gpu_output, conn)
124 #define drm_encoder_to_virtio_gpu_output(x) \
125 	container_of(x, struct virtio_gpu_output, enc)
126 
127 struct virtio_gpu_framebuffer {
128 	struct drm_framebuffer base;
129 	int x1, y1, x2, y2; /* dirty rect */
130 	spinlock_t dirty_lock;
131 	uint32_t hw_res_handle;
132 	struct virtio_gpu_fence *fence;
133 };
134 #define to_virtio_gpu_framebuffer(x) \
135 	container_of(x, struct virtio_gpu_framebuffer, base)
136 
137 struct virtio_gpu_mman {
138 	struct ttm_bo_device		bdev;
139 };
140 
141 struct virtio_gpu_queue {
142 	struct virtqueue *vq;
143 	spinlock_t qlock;
144 	wait_queue_head_t ack_queue;
145 	struct work_struct dequeue_work;
146 };
147 
148 struct virtio_gpu_drv_capset {
149 	uint32_t id;
150 	uint32_t max_version;
151 	uint32_t max_size;
152 };
153 
154 struct virtio_gpu_drv_cap_cache {
155 	struct list_head head;
156 	void *caps_cache;
157 	uint32_t id;
158 	uint32_t version;
159 	uint32_t size;
160 	atomic_t is_valid;
161 };
162 
163 struct virtio_gpu_device {
164 	struct device *dev;
165 	struct drm_device *ddev;
166 
167 	struct virtio_device *vdev;
168 
169 	struct virtio_gpu_mman mman;
170 
171 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
172 	uint32_t num_scanouts;
173 
174 	struct virtio_gpu_queue ctrlq;
175 	struct virtio_gpu_queue cursorq;
176 	struct kmem_cache *vbufs;
177 	bool vqs_ready;
178 
179 	struct ida	resource_ida;
180 
181 	wait_queue_head_t resp_wq;
182 	/* current display info */
183 	spinlock_t display_info_lock;
184 	bool display_info_pending;
185 
186 	struct virtio_gpu_fence_driver fence_drv;
187 
188 	struct ida	ctx_id_ida;
189 
190 	bool has_virgl_3d;
191 	bool has_edid;
192 
193 	struct work_struct config_changed_work;
194 
195 	struct virtio_gpu_drv_capset *capsets;
196 	uint32_t num_capsets;
197 	struct list_head cap_cache;
198 };
199 
200 struct virtio_gpu_fpriv {
201 	uint32_t ctx_id;
202 };
203 
204 /* virtio_ioctl.c */
205 #define DRM_VIRTIO_NUM_IOCTLS 10
206 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
207 
208 /* virtio_kms.c */
209 int virtio_gpu_init(struct drm_device *dev);
210 void virtio_gpu_deinit(struct drm_device *dev);
211 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
212 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
213 
214 /* virtio_gem.c */
215 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
216 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
217 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
218 int virtio_gpu_gem_create(struct drm_file *file,
219 			  struct drm_device *dev,
220 			  uint64_t size,
221 			  struct drm_gem_object **obj_p,
222 			  uint32_t *handle_p);
223 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
224 			       struct drm_file *file);
225 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
226 				 struct drm_file *file);
227 struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
228 						  size_t size, bool kernel,
229 						  bool pinned);
230 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
231 				struct drm_device *dev,
232 				struct drm_mode_create_dumb *args);
233 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
234 			      struct drm_device *dev,
235 			      uint32_t handle, uint64_t *offset_p);
236 
237 /* virtio_fb */
238 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
239 			     struct drm_clip_rect *clips,
240 			     unsigned int num_clips);
241 /* virtio vg */
242 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
243 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
244 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
245 				    struct virtio_gpu_object *bo,
246 				    uint32_t format,
247 				    uint32_t width,
248 				    uint32_t height);
249 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
250 				   uint32_t resource_id);
251 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
252 					struct virtio_gpu_object *bo,
253 					uint64_t offset,
254 					__le32 width, __le32 height,
255 					__le32 x, __le32 y,
256 					struct virtio_gpu_fence *fence);
257 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
258 				   uint32_t resource_id,
259 				   uint32_t x, uint32_t y,
260 				   uint32_t width, uint32_t height);
261 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
262 				uint32_t scanout_id, uint32_t resource_id,
263 				uint32_t width, uint32_t height,
264 				uint32_t x, uint32_t y);
265 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
266 			     struct virtio_gpu_object *obj,
267 			     struct virtio_gpu_fence *fence);
268 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
269 			      struct virtio_gpu_object *obj);
270 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
271 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
272 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
273 			    struct virtio_gpu_output *output);
274 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
275 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
276 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
277 			      int idx, int version,
278 			      struct virtio_gpu_drv_cap_cache **cache_p);
279 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
280 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
281 				   uint32_t nlen, const char *name);
282 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
283 				    uint32_t id);
284 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
285 					    uint32_t ctx_id,
286 					    uint32_t resource_id);
287 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
288 					    uint32_t ctx_id,
289 					    uint32_t resource_id);
290 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
291 			   void *data, uint32_t data_size,
292 			   uint32_t ctx_id, struct virtio_gpu_fence *fence);
293 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
294 					  uint32_t resource_id, uint32_t ctx_id,
295 					  uint64_t offset, uint32_t level,
296 					  struct virtio_gpu_box *box,
297 					  struct virtio_gpu_fence *fence);
298 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
299 					struct virtio_gpu_object *bo,
300 					uint32_t ctx_id,
301 					uint64_t offset, uint32_t level,
302 					struct virtio_gpu_box *box,
303 					struct virtio_gpu_fence *fence);
304 void
305 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
306 				  struct virtio_gpu_object *bo,
307 				  struct virtio_gpu_resource_create_3d *rc_3d);
308 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
309 void virtio_gpu_cursor_ack(struct virtqueue *vq);
310 void virtio_gpu_fence_ack(struct virtqueue *vq);
311 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
312 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
313 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
314 
315 /* virtio_gpu_display.c */
316 int virtio_gpu_framebuffer_init(struct drm_device *dev,
317 				struct virtio_gpu_framebuffer *vgfb,
318 				const struct drm_mode_fb_cmd2 *mode_cmd,
319 				struct drm_gem_object *obj);
320 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
321 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
322 
323 /* virtio_gpu_plane.c */
324 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
325 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
326 					enum drm_plane_type type,
327 					int index);
328 
329 /* virtio_gpu_ttm.c */
330 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
331 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
332 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
333 
334 /* virtio_gpu_fence.c */
335 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
336 	struct virtio_gpu_device *vgdev);
337 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
338 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
339 			  struct virtio_gpu_fence *fence);
340 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
341 				    u64 last_seq);
342 
343 /* virtio_gpu_object */
344 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
345 			     unsigned long size, bool kernel, bool pinned,
346 			     struct virtio_gpu_object **bo_ptr);
347 void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo);
348 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo);
349 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
350 				   struct virtio_gpu_object *bo);
351 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
352 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
353 
354 /* virtgpu_prime.c */
355 int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
356 void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
357 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
358 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
359 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
360 			   struct vm_area_struct *vma);
361 
362 static inline struct virtio_gpu_object*
363 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
364 {
365 	ttm_bo_get(&bo->tbo);
366 	return bo;
367 }
368 
369 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
370 {
371 	struct ttm_buffer_object *tbo;
372 
373 	if ((*bo) == NULL)
374 		return;
375 	tbo = &((*bo)->tbo);
376 	ttm_bo_put(tbo);
377 	*bo = NULL;
378 }
379 
380 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
381 {
382 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
383 }
384 
385 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
386 					 bool no_wait)
387 {
388 	int r;
389 
390 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
391 	if (unlikely(r != 0)) {
392 		if (r != -ERESTARTSYS) {
393 			struct virtio_gpu_device *qdev =
394 				bo->gem_base.dev->dev_private;
395 			dev_err(qdev->dev, "%p reserve failed\n", bo);
396 		}
397 		return r;
398 	}
399 	return 0;
400 }
401 
402 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
403 {
404 	ttm_bo_unreserve(&bo->tbo);
405 }
406 
407 /* virgl debufs */
408 int virtio_gpu_debugfs_init(struct drm_minor *minor);
409 
410 #endif
411