xref: /openbmc/linux/drivers/gpu/drm/virtio/virtgpu_drv.h (revision 4984dd069f2995f239f075199ee8c0d9f020bcd9)
1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_encoder.h>
38 #include <drm/drm_fb_helper.h>
39 #include <drm/drm_probe_helper.h>
40 #include <drm/ttm/ttm_bo_api.h>
41 #include <drm/ttm/ttm_bo_driver.h>
42 #include <drm/ttm/ttm_placement.h>
43 #include <drm/ttm/ttm_module.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
52 
53 struct virtio_gpu_object_params {
54 	uint32_t format;
55 	uint32_t width;
56 	uint32_t height;
57 	unsigned long size;
58 	bool dumb;
59 	/* 3d */
60 	bool virgl;
61 	uint32_t target;
62 	uint32_t bind;
63 	uint32_t depth;
64 	uint32_t array_size;
65 	uint32_t last_level;
66 	uint32_t nr_samples;
67 	uint32_t flags;
68 };
69 
70 struct virtio_gpu_object {
71 	struct drm_gem_object gem_base;
72 	uint32_t hw_res_handle;
73 
74 	struct sg_table *pages;
75 	uint32_t mapped;
76 	void *vmap;
77 	bool dumb;
78 	struct ttm_place                placement_code;
79 	struct ttm_placement		placement;
80 	struct ttm_buffer_object	tbo;
81 	struct ttm_bo_kmap_obj		kmap;
82 	bool created;
83 };
84 #define gem_to_virtio_gpu_obj(gobj) \
85 	container_of((gobj), struct virtio_gpu_object, gem_base)
86 
87 struct virtio_gpu_vbuffer;
88 struct virtio_gpu_device;
89 
90 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
91 				   struct virtio_gpu_vbuffer *vbuf);
92 
93 struct virtio_gpu_fence_driver {
94 	atomic64_t       last_seq;
95 	uint64_t         sync_seq;
96 	uint64_t         context;
97 	struct list_head fences;
98 	spinlock_t       lock;
99 };
100 
101 struct virtio_gpu_fence {
102 	struct dma_fence f;
103 	struct virtio_gpu_fence_driver *drv;
104 	struct list_head node;
105 };
106 #define to_virtio_fence(x) \
107 	container_of(x, struct virtio_gpu_fence, f)
108 
109 struct virtio_gpu_vbuffer {
110 	char *buf;
111 	int size;
112 
113 	void *data_buf;
114 	uint32_t data_size;
115 
116 	char *resp_buf;
117 	int resp_size;
118 
119 	virtio_gpu_resp_cb resp_cb;
120 
121 	struct list_head list;
122 };
123 
124 struct virtio_gpu_output {
125 	int index;
126 	struct drm_crtc crtc;
127 	struct drm_connector conn;
128 	struct drm_encoder enc;
129 	struct virtio_gpu_display_one info;
130 	struct virtio_gpu_update_cursor cursor;
131 	struct edid *edid;
132 	int cur_x;
133 	int cur_y;
134 	bool enabled;
135 };
136 #define drm_crtc_to_virtio_gpu_output(x) \
137 	container_of(x, struct virtio_gpu_output, crtc)
138 #define drm_connector_to_virtio_gpu_output(x) \
139 	container_of(x, struct virtio_gpu_output, conn)
140 #define drm_encoder_to_virtio_gpu_output(x) \
141 	container_of(x, struct virtio_gpu_output, enc)
142 
143 struct virtio_gpu_framebuffer {
144 	struct drm_framebuffer base;
145 	int x1, y1, x2, y2; /* dirty rect */
146 	spinlock_t dirty_lock;
147 	uint32_t hw_res_handle;
148 	struct virtio_gpu_fence *fence;
149 };
150 #define to_virtio_gpu_framebuffer(x) \
151 	container_of(x, struct virtio_gpu_framebuffer, base)
152 
153 struct virtio_gpu_mman {
154 	struct ttm_bo_device		bdev;
155 };
156 
157 struct virtio_gpu_queue {
158 	struct virtqueue *vq;
159 	spinlock_t qlock;
160 	wait_queue_head_t ack_queue;
161 	struct work_struct dequeue_work;
162 };
163 
164 struct virtio_gpu_drv_capset {
165 	uint32_t id;
166 	uint32_t max_version;
167 	uint32_t max_size;
168 };
169 
170 struct virtio_gpu_drv_cap_cache {
171 	struct list_head head;
172 	void *caps_cache;
173 	uint32_t id;
174 	uint32_t version;
175 	uint32_t size;
176 	atomic_t is_valid;
177 };
178 
179 struct virtio_gpu_device {
180 	struct device *dev;
181 	struct drm_device *ddev;
182 
183 	struct virtio_device *vdev;
184 
185 	struct virtio_gpu_mman mman;
186 
187 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
188 	uint32_t num_scanouts;
189 
190 	struct virtio_gpu_queue ctrlq;
191 	struct virtio_gpu_queue cursorq;
192 	struct kmem_cache *vbufs;
193 	bool vqs_ready;
194 
195 	struct ida	resource_ida;
196 
197 	wait_queue_head_t resp_wq;
198 	/* current display info */
199 	spinlock_t display_info_lock;
200 	bool display_info_pending;
201 
202 	struct virtio_gpu_fence_driver fence_drv;
203 
204 	struct ida	ctx_id_ida;
205 
206 	bool has_virgl_3d;
207 	bool has_edid;
208 
209 	struct work_struct config_changed_work;
210 
211 	struct virtio_gpu_drv_capset *capsets;
212 	uint32_t num_capsets;
213 	struct list_head cap_cache;
214 };
215 
216 struct virtio_gpu_fpriv {
217 	uint32_t ctx_id;
218 };
219 
220 /* virtio_ioctl.c */
221 #define DRM_VIRTIO_NUM_IOCTLS 10
222 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
223 int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
224 				    struct list_head *head);
225 void virtio_gpu_unref_list(struct list_head *head);
226 
227 /* virtio_kms.c */
228 int virtio_gpu_init(struct drm_device *dev);
229 void virtio_gpu_deinit(struct drm_device *dev);
230 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
231 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
232 
233 /* virtio_gem.c */
234 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
235 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
236 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
237 int virtio_gpu_gem_create(struct drm_file *file,
238 			  struct drm_device *dev,
239 			  struct virtio_gpu_object_params *params,
240 			  struct drm_gem_object **obj_p,
241 			  uint32_t *handle_p);
242 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
243 			       struct drm_file *file);
244 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
245 				 struct drm_file *file);
246 struct virtio_gpu_object*
247 virtio_gpu_alloc_object(struct drm_device *dev,
248 			struct virtio_gpu_object_params *params,
249 			struct virtio_gpu_fence *fence);
250 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
251 				struct drm_device *dev,
252 				struct drm_mode_create_dumb *args);
253 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
254 			      struct drm_device *dev,
255 			      uint32_t handle, uint64_t *offset_p);
256 
257 /* virtio_fb */
258 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
259 			     struct drm_clip_rect *clips,
260 			     unsigned int num_clips);
261 /* virtio vg */
262 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
263 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
264 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
265 				    struct virtio_gpu_object *bo,
266 				    struct virtio_gpu_object_params *params,
267 				    struct virtio_gpu_fence *fence);
268 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
269 				   uint32_t resource_id);
270 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
271 					struct virtio_gpu_object *bo,
272 					uint64_t offset,
273 					__le32 width, __le32 height,
274 					__le32 x, __le32 y,
275 					struct virtio_gpu_fence *fence);
276 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
277 				   uint32_t resource_id,
278 				   uint32_t x, uint32_t y,
279 				   uint32_t width, uint32_t height);
280 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
281 				uint32_t scanout_id, uint32_t resource_id,
282 				uint32_t width, uint32_t height,
283 				uint32_t x, uint32_t y);
284 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
285 			     struct virtio_gpu_object *obj,
286 			     struct virtio_gpu_fence *fence);
287 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
288 			      struct virtio_gpu_object *obj);
289 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
290 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
291 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
292 			    struct virtio_gpu_output *output);
293 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
294 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
295 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
296 			      int idx, int version,
297 			      struct virtio_gpu_drv_cap_cache **cache_p);
298 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
299 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
300 				   uint32_t nlen, const char *name);
301 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
302 				    uint32_t id);
303 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
304 					    uint32_t ctx_id,
305 					    uint32_t resource_id);
306 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
307 					    uint32_t ctx_id,
308 					    uint32_t resource_id);
309 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
310 			   void *data, uint32_t data_size,
311 			   uint32_t ctx_id, struct virtio_gpu_fence *fence);
312 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
313 					  uint32_t resource_id, uint32_t ctx_id,
314 					  uint64_t offset, uint32_t level,
315 					  struct virtio_gpu_box *box,
316 					  struct virtio_gpu_fence *fence);
317 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
318 					struct virtio_gpu_object *bo,
319 					uint32_t ctx_id,
320 					uint64_t offset, uint32_t level,
321 					struct virtio_gpu_box *box,
322 					struct virtio_gpu_fence *fence);
323 void
324 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
325 				  struct virtio_gpu_object *bo,
326 				  struct virtio_gpu_object_params *params,
327 				  struct virtio_gpu_fence *fence);
328 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
329 void virtio_gpu_cursor_ack(struct virtqueue *vq);
330 void virtio_gpu_fence_ack(struct virtqueue *vq);
331 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
332 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
333 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
334 
335 /* virtio_gpu_display.c */
336 int virtio_gpu_framebuffer_init(struct drm_device *dev,
337 				struct virtio_gpu_framebuffer *vgfb,
338 				const struct drm_mode_fb_cmd2 *mode_cmd,
339 				struct drm_gem_object *obj);
340 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
341 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
342 
343 /* virtio_gpu_plane.c */
344 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
345 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
346 					enum drm_plane_type type,
347 					int index);
348 
349 /* virtio_gpu_ttm.c */
350 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
351 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
352 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
353 
354 /* virtio_gpu_fence.c */
355 bool virtio_fence_signaled(struct dma_fence *f);
356 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
357 	struct virtio_gpu_device *vgdev);
358 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
359 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
360 			  struct virtio_gpu_fence *fence);
361 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
362 				    u64 last_seq);
363 
364 /* virtio_gpu_object */
365 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
366 			     struct virtio_gpu_object_params *params,
367 			     struct virtio_gpu_object **bo_ptr,
368 			     struct virtio_gpu_fence *fence);
369 void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo);
370 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo);
371 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
372 				   struct virtio_gpu_object *bo);
373 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
374 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
375 
376 /* virtgpu_prime.c */
377 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
378 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
379 	struct drm_device *dev, struct dma_buf_attachment *attach,
380 	struct sg_table *sgt);
381 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
382 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
383 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
384 			   struct vm_area_struct *vma);
385 
386 static inline struct virtio_gpu_object*
387 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
388 {
389 	ttm_bo_get(&bo->tbo);
390 	return bo;
391 }
392 
393 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
394 {
395 	struct ttm_buffer_object *tbo;
396 
397 	if ((*bo) == NULL)
398 		return;
399 	tbo = &((*bo)->tbo);
400 	ttm_bo_put(tbo);
401 	*bo = NULL;
402 }
403 
404 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
405 {
406 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
407 }
408 
409 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
410 					 bool no_wait)
411 {
412 	int r;
413 
414 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
415 	if (unlikely(r != 0)) {
416 		if (r != -ERESTARTSYS) {
417 			struct virtio_gpu_device *qdev =
418 				bo->gem_base.dev->dev_private;
419 			dev_err(qdev->dev, "%p reserve failed\n", bo);
420 		}
421 		return r;
422 	}
423 	return 0;
424 }
425 
426 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
427 {
428 	ttm_bo_unreserve(&bo->tbo);
429 }
430 
431 /* virgl debufs */
432 int virtio_gpu_debugfs_init(struct drm_minor *minor);
433 
434 #endif
435