1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_encoder.h>
38 #include <drm/drm_fb_helper.h>
39 #include <drm/drm_probe_helper.h>
40 #include <drm/ttm/ttm_bo_api.h>
41 #include <drm/ttm/ttm_bo_driver.h>
42 #include <drm/ttm/ttm_placement.h>
43 #include <drm/ttm/ttm_module.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
52 
53 struct virtio_gpu_object_params {
54 	uint32_t format;
55 	uint32_t width;
56 	uint32_t height;
57 	unsigned long size;
58 	bool dumb;
59 	/* 3d */
60 	bool virgl;
61 	uint32_t target;
62 	uint32_t bind;
63 	uint32_t depth;
64 	uint32_t array_size;
65 	uint32_t last_level;
66 	uint32_t nr_samples;
67 	uint32_t flags;
68 };
69 
70 struct virtio_gpu_object {
71 	struct drm_gem_object gem_base;
72 	uint32_t hw_res_handle;
73 
74 	struct sg_table *pages;
75 	uint32_t mapped;
76 	void *vmap;
77 	bool dumb;
78 	struct ttm_place                placement_code;
79 	struct ttm_placement		placement;
80 	struct ttm_buffer_object	tbo;
81 	struct ttm_bo_kmap_obj		kmap;
82 	bool created;
83 };
84 #define gem_to_virtio_gpu_obj(gobj) \
85 	container_of((gobj), struct virtio_gpu_object, gem_base)
86 
87 struct virtio_gpu_vbuffer;
88 struct virtio_gpu_device;
89 
90 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
91 				   struct virtio_gpu_vbuffer *vbuf);
92 
93 struct virtio_gpu_fence_driver {
94 	atomic64_t       last_seq;
95 	uint64_t         sync_seq;
96 	uint64_t         context;
97 	struct list_head fences;
98 	spinlock_t       lock;
99 };
100 
101 struct virtio_gpu_fence {
102 	struct dma_fence f;
103 	struct virtio_gpu_fence_driver *drv;
104 	struct list_head node;
105 	uint64_t seq;
106 };
107 #define to_virtio_fence(x) \
108 	container_of(x, struct virtio_gpu_fence, f)
109 
110 struct virtio_gpu_vbuffer {
111 	char *buf;
112 	int size;
113 
114 	void *data_buf;
115 	uint32_t data_size;
116 
117 	char *resp_buf;
118 	int resp_size;
119 
120 	virtio_gpu_resp_cb resp_cb;
121 
122 	struct list_head list;
123 };
124 
125 struct virtio_gpu_output {
126 	int index;
127 	struct drm_crtc crtc;
128 	struct drm_connector conn;
129 	struct drm_encoder enc;
130 	struct virtio_gpu_display_one info;
131 	struct virtio_gpu_update_cursor cursor;
132 	struct edid *edid;
133 	int cur_x;
134 	int cur_y;
135 	bool enabled;
136 };
137 #define drm_crtc_to_virtio_gpu_output(x) \
138 	container_of(x, struct virtio_gpu_output, crtc)
139 #define drm_connector_to_virtio_gpu_output(x) \
140 	container_of(x, struct virtio_gpu_output, conn)
141 #define drm_encoder_to_virtio_gpu_output(x) \
142 	container_of(x, struct virtio_gpu_output, enc)
143 
144 struct virtio_gpu_framebuffer {
145 	struct drm_framebuffer base;
146 	int x1, y1, x2, y2; /* dirty rect */
147 	spinlock_t dirty_lock;
148 	uint32_t hw_res_handle;
149 	struct virtio_gpu_fence *fence;
150 };
151 #define to_virtio_gpu_framebuffer(x) \
152 	container_of(x, struct virtio_gpu_framebuffer, base)
153 
154 struct virtio_gpu_mman {
155 	struct ttm_bo_device		bdev;
156 };
157 
158 struct virtio_gpu_queue {
159 	struct virtqueue *vq;
160 	spinlock_t qlock;
161 	wait_queue_head_t ack_queue;
162 	struct work_struct dequeue_work;
163 };
164 
165 struct virtio_gpu_drv_capset {
166 	uint32_t id;
167 	uint32_t max_version;
168 	uint32_t max_size;
169 };
170 
171 struct virtio_gpu_drv_cap_cache {
172 	struct list_head head;
173 	void *caps_cache;
174 	uint32_t id;
175 	uint32_t version;
176 	uint32_t size;
177 	atomic_t is_valid;
178 };
179 
180 struct virtio_gpu_device {
181 	struct device *dev;
182 	struct drm_device *ddev;
183 
184 	struct virtio_device *vdev;
185 
186 	struct virtio_gpu_mman mman;
187 
188 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
189 	uint32_t num_scanouts;
190 
191 	struct virtio_gpu_queue ctrlq;
192 	struct virtio_gpu_queue cursorq;
193 	struct kmem_cache *vbufs;
194 	bool vqs_ready;
195 
196 	struct ida	resource_ida;
197 
198 	wait_queue_head_t resp_wq;
199 	/* current display info */
200 	spinlock_t display_info_lock;
201 	bool display_info_pending;
202 
203 	struct virtio_gpu_fence_driver fence_drv;
204 
205 	struct ida	ctx_id_ida;
206 
207 	bool has_virgl_3d;
208 	bool has_edid;
209 
210 	struct work_struct config_changed_work;
211 
212 	struct virtio_gpu_drv_capset *capsets;
213 	uint32_t num_capsets;
214 	struct list_head cap_cache;
215 };
216 
217 struct virtio_gpu_fpriv {
218 	uint32_t ctx_id;
219 };
220 
221 /* virtio_ioctl.c */
222 #define DRM_VIRTIO_NUM_IOCTLS 10
223 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
224 int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
225 				    struct list_head *head);
226 void virtio_gpu_unref_list(struct list_head *head);
227 
228 /* virtio_kms.c */
229 int virtio_gpu_init(struct drm_device *dev);
230 void virtio_gpu_deinit(struct drm_device *dev);
231 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
232 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
233 
234 /* virtio_gem.c */
235 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
236 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
237 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
238 int virtio_gpu_gem_create(struct drm_file *file,
239 			  struct drm_device *dev,
240 			  struct virtio_gpu_object_params *params,
241 			  struct drm_gem_object **obj_p,
242 			  uint32_t *handle_p);
243 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
244 			       struct drm_file *file);
245 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
246 				 struct drm_file *file);
247 struct virtio_gpu_object*
248 virtio_gpu_alloc_object(struct drm_device *dev,
249 			struct virtio_gpu_object_params *params,
250 			struct virtio_gpu_fence *fence);
251 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
252 				struct drm_device *dev,
253 				struct drm_mode_create_dumb *args);
254 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
255 			      struct drm_device *dev,
256 			      uint32_t handle, uint64_t *offset_p);
257 
258 /* virtio_fb */
259 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
260 			     struct drm_clip_rect *clips,
261 			     unsigned int num_clips);
262 /* virtio vg */
263 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
264 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
265 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
266 				    struct virtio_gpu_object *bo,
267 				    struct virtio_gpu_object_params *params,
268 				    struct virtio_gpu_fence *fence);
269 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
270 				   uint32_t resource_id);
271 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
272 					struct virtio_gpu_object *bo,
273 					uint64_t offset,
274 					__le32 width, __le32 height,
275 					__le32 x, __le32 y,
276 					struct virtio_gpu_fence *fence);
277 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
278 				   uint32_t resource_id,
279 				   uint32_t x, uint32_t y,
280 				   uint32_t width, uint32_t height);
281 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
282 				uint32_t scanout_id, uint32_t resource_id,
283 				uint32_t width, uint32_t height,
284 				uint32_t x, uint32_t y);
285 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
286 			     struct virtio_gpu_object *obj,
287 			     struct virtio_gpu_fence *fence);
288 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
289 			      struct virtio_gpu_object *obj);
290 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
291 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
292 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
293 			    struct virtio_gpu_output *output);
294 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
295 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
296 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
297 			      int idx, int version,
298 			      struct virtio_gpu_drv_cap_cache **cache_p);
299 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
300 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
301 				   uint32_t nlen, const char *name);
302 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
303 				    uint32_t id);
304 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
305 					    uint32_t ctx_id,
306 					    uint32_t resource_id);
307 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
308 					    uint32_t ctx_id,
309 					    uint32_t resource_id);
310 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
311 			   void *data, uint32_t data_size,
312 			   uint32_t ctx_id, struct virtio_gpu_fence *fence);
313 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
314 					  uint32_t resource_id, uint32_t ctx_id,
315 					  uint64_t offset, uint32_t level,
316 					  struct virtio_gpu_box *box,
317 					  struct virtio_gpu_fence *fence);
318 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
319 					struct virtio_gpu_object *bo,
320 					uint32_t ctx_id,
321 					uint64_t offset, uint32_t level,
322 					struct virtio_gpu_box *box,
323 					struct virtio_gpu_fence *fence);
324 void
325 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
326 				  struct virtio_gpu_object *bo,
327 				  struct virtio_gpu_object_params *params,
328 				  struct virtio_gpu_fence *fence);
329 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
330 void virtio_gpu_cursor_ack(struct virtqueue *vq);
331 void virtio_gpu_fence_ack(struct virtqueue *vq);
332 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
333 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
334 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
335 
336 /* virtio_gpu_display.c */
337 int virtio_gpu_framebuffer_init(struct drm_device *dev,
338 				struct virtio_gpu_framebuffer *vgfb,
339 				const struct drm_mode_fb_cmd2 *mode_cmd,
340 				struct drm_gem_object *obj);
341 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
342 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
343 
344 /* virtio_gpu_plane.c */
345 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
346 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
347 					enum drm_plane_type type,
348 					int index);
349 
350 /* virtio_gpu_ttm.c */
351 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
352 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
353 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
354 
355 /* virtio_gpu_fence.c */
356 bool virtio_fence_signaled(struct dma_fence *f);
357 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
358 	struct virtio_gpu_device *vgdev);
359 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
360 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
361 			  struct virtio_gpu_fence *fence);
362 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
363 				    u64 last_seq);
364 
365 /* virtio_gpu_object */
366 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
367 			     struct virtio_gpu_object_params *params,
368 			     struct virtio_gpu_object **bo_ptr,
369 			     struct virtio_gpu_fence *fence);
370 void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo);
371 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo);
372 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
373 				   struct virtio_gpu_object *bo);
374 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
375 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
376 
377 /* virtgpu_prime.c */
378 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
379 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
380 	struct drm_device *dev, struct dma_buf_attachment *attach,
381 	struct sg_table *sgt);
382 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
383 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
384 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
385 			   struct vm_area_struct *vma);
386 
387 static inline struct virtio_gpu_object*
388 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
389 {
390 	ttm_bo_get(&bo->tbo);
391 	return bo;
392 }
393 
394 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
395 {
396 	struct ttm_buffer_object *tbo;
397 
398 	if ((*bo) == NULL)
399 		return;
400 	tbo = &((*bo)->tbo);
401 	ttm_bo_put(tbo);
402 	*bo = NULL;
403 }
404 
405 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
406 {
407 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
408 }
409 
410 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
411 					 bool no_wait)
412 {
413 	int r;
414 
415 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
416 	if (unlikely(r != 0)) {
417 		if (r != -ERESTARTSYS) {
418 			struct virtio_gpu_device *qdev =
419 				bo->gem_base.dev->dev_private;
420 			dev_err(qdev->dev, "%p reserve failed\n", bo);
421 		}
422 		return r;
423 	}
424 	return 0;
425 }
426 
427 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
428 {
429 	ttm_bo_unreserve(&bo->tbo);
430 }
431 
432 /* virgl debufs */
433 int virtio_gpu_debugfs_init(struct drm_minor *minor);
434 
435 #endif
436