1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_fb_helper.h>
40 #include <drm/ttm/ttm_bo_api.h>
41 #include <drm/ttm/ttm_bo_driver.h>
42 #include <drm/ttm/ttm_placement.h>
43 #include <drm/ttm/ttm_module.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
52 
53 /* virtgpu_drm_bus.c */
54 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
55 
56 struct virtio_gpu_object {
57 	struct drm_gem_object gem_base;
58 	uint32_t hw_res_handle;
59 
60 	struct sg_table *pages;
61 	uint32_t mapped;
62 	void *vmap;
63 	bool dumb;
64 	struct ttm_place                placement_code;
65 	struct ttm_placement		placement;
66 	struct ttm_buffer_object	tbo;
67 	struct ttm_bo_kmap_obj		kmap;
68 	bool created;
69 };
70 #define gem_to_virtio_gpu_obj(gobj) \
71 	container_of((gobj), struct virtio_gpu_object, gem_base)
72 
73 struct virtio_gpu_vbuffer;
74 struct virtio_gpu_device;
75 
76 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
77 				   struct virtio_gpu_vbuffer *vbuf);
78 
79 struct virtio_gpu_fence_driver {
80 	atomic64_t       last_seq;
81 	uint64_t         sync_seq;
82 	uint64_t         context;
83 	struct list_head fences;
84 	spinlock_t       lock;
85 };
86 
87 struct virtio_gpu_fence {
88 	struct dma_fence f;
89 	struct virtio_gpu_fence_driver *drv;
90 	struct list_head node;
91 	uint64_t seq;
92 };
93 #define to_virtio_fence(x) \
94 	container_of(x, struct virtio_gpu_fence, f)
95 
96 struct virtio_gpu_vbuffer {
97 	char *buf;
98 	int size;
99 
100 	void *data_buf;
101 	uint32_t data_size;
102 
103 	char *resp_buf;
104 	int resp_size;
105 
106 	virtio_gpu_resp_cb resp_cb;
107 
108 	struct list_head list;
109 };
110 
111 struct virtio_gpu_output {
112 	int index;
113 	struct drm_crtc crtc;
114 	struct drm_connector conn;
115 	struct drm_encoder enc;
116 	struct virtio_gpu_display_one info;
117 	struct virtio_gpu_update_cursor cursor;
118 	struct edid *edid;
119 	int cur_x;
120 	int cur_y;
121 	bool enabled;
122 };
123 #define drm_crtc_to_virtio_gpu_output(x) \
124 	container_of(x, struct virtio_gpu_output, crtc)
125 #define drm_connector_to_virtio_gpu_output(x) \
126 	container_of(x, struct virtio_gpu_output, conn)
127 #define drm_encoder_to_virtio_gpu_output(x) \
128 	container_of(x, struct virtio_gpu_output, enc)
129 
130 struct virtio_gpu_framebuffer {
131 	struct drm_framebuffer base;
132 	int x1, y1, x2, y2; /* dirty rect */
133 	spinlock_t dirty_lock;
134 	uint32_t hw_res_handle;
135 	struct virtio_gpu_fence *fence;
136 };
137 #define to_virtio_gpu_framebuffer(x) \
138 	container_of(x, struct virtio_gpu_framebuffer, base)
139 
140 struct virtio_gpu_mman {
141 	struct ttm_bo_device		bdev;
142 };
143 
144 struct virtio_gpu_queue {
145 	struct virtqueue *vq;
146 	spinlock_t qlock;
147 	wait_queue_head_t ack_queue;
148 	struct work_struct dequeue_work;
149 };
150 
151 struct virtio_gpu_drv_capset {
152 	uint32_t id;
153 	uint32_t max_version;
154 	uint32_t max_size;
155 };
156 
157 struct virtio_gpu_drv_cap_cache {
158 	struct list_head head;
159 	void *caps_cache;
160 	uint32_t id;
161 	uint32_t version;
162 	uint32_t size;
163 	atomic_t is_valid;
164 };
165 
166 struct virtio_gpu_device {
167 	struct device *dev;
168 	struct drm_device *ddev;
169 
170 	struct virtio_device *vdev;
171 
172 	struct virtio_gpu_mman mman;
173 
174 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
175 	uint32_t num_scanouts;
176 
177 	struct virtio_gpu_queue ctrlq;
178 	struct virtio_gpu_queue cursorq;
179 	struct kmem_cache *vbufs;
180 	bool vqs_ready;
181 
182 	struct ida	resource_ida;
183 
184 	wait_queue_head_t resp_wq;
185 	/* current display info */
186 	spinlock_t display_info_lock;
187 	bool display_info_pending;
188 
189 	struct virtio_gpu_fence_driver fence_drv;
190 
191 	struct ida	ctx_id_ida;
192 
193 	bool has_virgl_3d;
194 	bool has_edid;
195 
196 	struct work_struct config_changed_work;
197 
198 	struct virtio_gpu_drv_capset *capsets;
199 	uint32_t num_capsets;
200 	struct list_head cap_cache;
201 };
202 
203 struct virtio_gpu_fpriv {
204 	uint32_t ctx_id;
205 };
206 
207 /* virtio_ioctl.c */
208 #define DRM_VIRTIO_NUM_IOCTLS 10
209 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
210 
211 /* virtio_kms.c */
212 int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
213 void virtio_gpu_driver_unload(struct drm_device *dev);
214 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
215 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
216 
217 /* virtio_gem.c */
218 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
219 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
220 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
221 int virtio_gpu_gem_create(struct drm_file *file,
222 			  struct drm_device *dev,
223 			  uint64_t size,
224 			  struct drm_gem_object **obj_p,
225 			  uint32_t *handle_p);
226 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
227 			       struct drm_file *file);
228 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
229 				 struct drm_file *file);
230 struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
231 						  size_t size, bool kernel,
232 						  bool pinned);
233 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
234 				struct drm_device *dev,
235 				struct drm_mode_create_dumb *args);
236 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
237 			      struct drm_device *dev,
238 			      uint32_t handle, uint64_t *offset_p);
239 
240 /* virtio_fb */
241 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
242 			     struct drm_clip_rect *clips,
243 			     unsigned int num_clips);
244 /* virtio vg */
245 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
246 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
247 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
248 				    struct virtio_gpu_object *bo,
249 				    uint32_t format,
250 				    uint32_t width,
251 				    uint32_t height);
252 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
253 				   uint32_t resource_id);
254 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
255 					struct virtio_gpu_object *bo,
256 					uint64_t offset,
257 					__le32 width, __le32 height,
258 					__le32 x, __le32 y,
259 					struct virtio_gpu_fence *fence);
260 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
261 				   uint32_t resource_id,
262 				   uint32_t x, uint32_t y,
263 				   uint32_t width, uint32_t height);
264 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
265 				uint32_t scanout_id, uint32_t resource_id,
266 				uint32_t width, uint32_t height,
267 				uint32_t x, uint32_t y);
268 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
269 			     struct virtio_gpu_object *obj,
270 			     struct virtio_gpu_fence *fence);
271 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
272 			      struct virtio_gpu_object *obj);
273 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
274 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
275 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
276 			    struct virtio_gpu_output *output);
277 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
278 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
279 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
280 			      int idx, int version,
281 			      struct virtio_gpu_drv_cap_cache **cache_p);
282 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
283 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
284 				   uint32_t nlen, const char *name);
285 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
286 				    uint32_t id);
287 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
288 					    uint32_t ctx_id,
289 					    uint32_t resource_id);
290 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
291 					    uint32_t ctx_id,
292 					    uint32_t resource_id);
293 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
294 			   void *data, uint32_t data_size,
295 			   uint32_t ctx_id, struct virtio_gpu_fence *fence);
296 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
297 					  uint32_t resource_id, uint32_t ctx_id,
298 					  uint64_t offset, uint32_t level,
299 					  struct virtio_gpu_box *box,
300 					  struct virtio_gpu_fence *fence);
301 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
302 					struct virtio_gpu_object *bo,
303 					uint32_t ctx_id,
304 					uint64_t offset, uint32_t level,
305 					struct virtio_gpu_box *box,
306 					struct virtio_gpu_fence *fence);
307 void
308 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
309 				  struct virtio_gpu_object *bo,
310 				  struct virtio_gpu_resource_create_3d *rc_3d);
311 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
312 void virtio_gpu_cursor_ack(struct virtqueue *vq);
313 void virtio_gpu_fence_ack(struct virtqueue *vq);
314 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
315 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
316 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
317 
318 /* virtio_gpu_display.c */
319 int virtio_gpu_framebuffer_init(struct drm_device *dev,
320 				struct virtio_gpu_framebuffer *vgfb,
321 				const struct drm_mode_fb_cmd2 *mode_cmd,
322 				struct drm_gem_object *obj);
323 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
324 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
325 
326 /* virtio_gpu_plane.c */
327 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
328 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
329 					enum drm_plane_type type,
330 					int index);
331 
332 /* virtio_gpu_ttm.c */
333 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
334 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
335 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
336 
337 /* virtio_gpu_fence.c */
338 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
339 	struct virtio_gpu_device *vgdev);
340 void virtio_gpu_fence_cleanup(struct virtio_gpu_fence *fence);
341 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
342 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
343 			  struct virtio_gpu_fence *fence);
344 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
345 				    u64 last_seq);
346 
347 /* virtio_gpu_object */
348 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
349 			     unsigned long size, bool kernel, bool pinned,
350 			     struct virtio_gpu_object **bo_ptr);
351 void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo);
352 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo);
353 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
354 				   struct virtio_gpu_object *bo);
355 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
356 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
357 
358 /* virtgpu_prime.c */
359 int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
360 void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
361 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
362 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
363 	struct drm_device *dev, struct dma_buf_attachment *attach,
364 	struct sg_table *sgt);
365 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
366 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
367 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
368 			   struct vm_area_struct *vma);
369 
370 static inline struct virtio_gpu_object*
371 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
372 {
373 	ttm_bo_get(&bo->tbo);
374 	return bo;
375 }
376 
377 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
378 {
379 	struct ttm_buffer_object *tbo;
380 
381 	if ((*bo) == NULL)
382 		return;
383 	tbo = &((*bo)->tbo);
384 	ttm_bo_put(tbo);
385 	*bo = NULL;
386 }
387 
388 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
389 {
390 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
391 }
392 
393 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
394 					 bool no_wait)
395 {
396 	int r;
397 
398 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
399 	if (unlikely(r != 0)) {
400 		if (r != -ERESTARTSYS) {
401 			struct virtio_gpu_device *qdev =
402 				bo->gem_base.dev->dev_private;
403 			dev_err(qdev->dev, "%p reserve failed\n", bo);
404 		}
405 		return r;
406 	}
407 	return 0;
408 }
409 
410 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
411 {
412 	ttm_bo_unreserve(&bo->tbo);
413 }
414 
415 /* virgl debufs */
416 int virtio_gpu_debugfs_init(struct drm_minor *minor);
417 
418 #endif
419