1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/virtio.h> 30 #include <linux/virtio_ids.h> 31 #include <linux/virtio_config.h> 32 #include <linux/virtio_gpu.h> 33 34 #include <drm/drm_atomic.h> 35 #include <drm/drm_drv.h> 36 #include <drm/drm_encoder.h> 37 #include <drm/drm_fb_helper.h> 38 #include <drm/drm_gem.h> 39 #include <drm/drm_gem_shmem_helper.h> 40 #include <drm/drm_ioctl.h> 41 #include <drm/drm_probe_helper.h> 42 #include <drm/virtgpu_drm.h> 43 44 #define DRIVER_NAME "virtio_gpu" 45 #define DRIVER_DESC "virtio GPU" 46 #define DRIVER_DATE "0" 47 48 #define DRIVER_MAJOR 0 49 #define DRIVER_MINOR 1 50 #define DRIVER_PATCHLEVEL 0 51 52 struct virtio_gpu_object_params { 53 uint32_t format; 54 uint32_t width; 55 uint32_t height; 56 unsigned long size; 57 bool dumb; 58 /* 3d */ 59 bool virgl; 60 uint32_t target; 61 uint32_t bind; 62 uint32_t depth; 63 uint32_t array_size; 64 uint32_t last_level; 65 uint32_t nr_samples; 66 uint32_t flags; 67 }; 68 69 struct virtio_gpu_object { 70 struct drm_gem_shmem_object base; 71 uint32_t hw_res_handle; 72 73 struct sg_table *pages; 74 uint32_t mapped; 75 76 bool dumb; 77 bool created; 78 }; 79 #define gem_to_virtio_gpu_obj(gobj) \ 80 container_of((gobj), struct virtio_gpu_object, base.base) 81 82 struct virtio_gpu_object_array { 83 struct ww_acquire_ctx ticket; 84 struct list_head next; 85 u32 nents, total; 86 struct drm_gem_object *objs[]; 87 }; 88 89 struct virtio_gpu_vbuffer; 90 struct virtio_gpu_device; 91 92 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 93 struct virtio_gpu_vbuffer *vbuf); 94 95 struct virtio_gpu_fence_driver { 96 atomic64_t last_seq; 97 uint64_t sync_seq; 98 uint64_t context; 99 struct list_head fences; 100 spinlock_t lock; 101 }; 102 103 struct virtio_gpu_fence { 104 struct dma_fence f; 105 struct virtio_gpu_fence_driver *drv; 106 struct list_head node; 107 }; 108 109 struct virtio_gpu_vbuffer { 110 char *buf; 111 int size; 112 113 void *data_buf; 114 uint32_t data_size; 115 116 char *resp_buf; 117 int resp_size; 118 virtio_gpu_resp_cb resp_cb; 119 void *resp_cb_data; 120 121 struct virtio_gpu_object_array *objs; 122 struct list_head list; 123 }; 124 125 struct virtio_gpu_output { 126 int index; 127 struct drm_crtc crtc; 128 struct drm_connector conn; 129 struct drm_encoder enc; 130 struct virtio_gpu_display_one info; 131 struct virtio_gpu_update_cursor cursor; 132 struct edid *edid; 133 int cur_x; 134 int cur_y; 135 bool enabled; 136 }; 137 #define drm_crtc_to_virtio_gpu_output(x) \ 138 container_of(x, struct virtio_gpu_output, crtc) 139 140 struct virtio_gpu_framebuffer { 141 struct drm_framebuffer base; 142 struct virtio_gpu_fence *fence; 143 }; 144 #define to_virtio_gpu_framebuffer(x) \ 145 container_of(x, struct virtio_gpu_framebuffer, base) 146 147 struct virtio_gpu_queue { 148 struct virtqueue *vq; 149 spinlock_t qlock; 150 wait_queue_head_t ack_queue; 151 struct work_struct dequeue_work; 152 }; 153 154 struct virtio_gpu_drv_capset { 155 uint32_t id; 156 uint32_t max_version; 157 uint32_t max_size; 158 }; 159 160 struct virtio_gpu_drv_cap_cache { 161 struct list_head head; 162 void *caps_cache; 163 uint32_t id; 164 uint32_t version; 165 uint32_t size; 166 atomic_t is_valid; 167 }; 168 169 struct virtio_gpu_device { 170 struct device *dev; 171 struct drm_device *ddev; 172 173 struct virtio_device *vdev; 174 175 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 176 uint32_t num_scanouts; 177 178 struct virtio_gpu_queue ctrlq; 179 struct virtio_gpu_queue cursorq; 180 struct kmem_cache *vbufs; 181 182 atomic_t pending_commands; 183 184 struct ida resource_ida; 185 186 wait_queue_head_t resp_wq; 187 /* current display info */ 188 spinlock_t display_info_lock; 189 bool display_info_pending; 190 191 struct virtio_gpu_fence_driver fence_drv; 192 193 struct ida ctx_id_ida; 194 195 bool has_virgl_3d; 196 bool has_edid; 197 bool has_indirect; 198 199 struct work_struct config_changed_work; 200 201 struct work_struct obj_free_work; 202 spinlock_t obj_free_lock; 203 struct list_head obj_free_list; 204 205 struct virtio_gpu_drv_capset *capsets; 206 uint32_t num_capsets; 207 struct list_head cap_cache; 208 }; 209 210 struct virtio_gpu_fpriv { 211 uint32_t ctx_id; 212 bool context_created; 213 struct mutex context_lock; 214 }; 215 216 /* virtio_ioctl.c */ 217 #define DRM_VIRTIO_NUM_IOCTLS 10 218 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 219 220 /* virtio_kms.c */ 221 int virtio_gpu_init(struct drm_device *dev); 222 void virtio_gpu_deinit(struct drm_device *dev); 223 void virtio_gpu_release(struct drm_device *dev); 224 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 225 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 226 227 /* virtio_gem.c */ 228 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj); 229 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev); 230 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev); 231 int virtio_gpu_gem_create(struct drm_file *file, 232 struct drm_device *dev, 233 struct virtio_gpu_object_params *params, 234 struct drm_gem_object **obj_p, 235 uint32_t *handle_p); 236 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 237 struct drm_file *file); 238 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 239 struct drm_file *file); 240 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 241 struct drm_device *dev, 242 struct drm_mode_create_dumb *args); 243 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 244 struct drm_device *dev, 245 uint32_t handle, uint64_t *offset_p); 246 247 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 248 struct virtio_gpu_object_array* 249 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 250 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 251 struct drm_gem_object *obj); 252 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 253 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 254 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 255 struct dma_fence *fence); 256 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 257 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 258 struct virtio_gpu_object_array *objs); 259 void virtio_gpu_array_put_free_work(struct work_struct *work); 260 261 /* virtio vg */ 262 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 263 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 264 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 265 struct virtio_gpu_object *bo, 266 struct virtio_gpu_object_params *params, 267 struct virtio_gpu_object_array *objs, 268 struct virtio_gpu_fence *fence); 269 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 270 struct virtio_gpu_object *bo); 271 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 272 uint64_t offset, 273 uint32_t width, uint32_t height, 274 uint32_t x, uint32_t y, 275 struct virtio_gpu_object_array *objs, 276 struct virtio_gpu_fence *fence); 277 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 278 uint32_t resource_id, 279 uint32_t x, uint32_t y, 280 uint32_t width, uint32_t height); 281 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 282 uint32_t scanout_id, uint32_t resource_id, 283 uint32_t width, uint32_t height, 284 uint32_t x, uint32_t y); 285 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 286 struct virtio_gpu_object *obj, 287 struct virtio_gpu_mem_entry *ents, 288 unsigned int nents); 289 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 290 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 291 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 292 struct virtio_gpu_output *output); 293 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 294 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 295 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 296 int idx, int version, 297 struct virtio_gpu_drv_cap_cache **cache_p); 298 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 299 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 300 uint32_t nlen, const char *name); 301 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 302 uint32_t id); 303 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 304 uint32_t ctx_id, 305 struct virtio_gpu_object_array *objs); 306 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 307 uint32_t ctx_id, 308 struct virtio_gpu_object_array *objs); 309 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 310 void *data, uint32_t data_size, 311 uint32_t ctx_id, 312 struct virtio_gpu_object_array *objs, 313 struct virtio_gpu_fence *fence); 314 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 315 uint32_t ctx_id, 316 uint64_t offset, uint32_t level, 317 struct drm_virtgpu_3d_box *box, 318 struct virtio_gpu_object_array *objs, 319 struct virtio_gpu_fence *fence); 320 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 321 uint32_t ctx_id, 322 uint64_t offset, uint32_t level, 323 struct drm_virtgpu_3d_box *box, 324 struct virtio_gpu_object_array *objs, 325 struct virtio_gpu_fence *fence); 326 void 327 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 328 struct virtio_gpu_object *bo, 329 struct virtio_gpu_object_params *params, 330 struct virtio_gpu_object_array *objs, 331 struct virtio_gpu_fence *fence); 332 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 333 void virtio_gpu_cursor_ack(struct virtqueue *vq); 334 void virtio_gpu_fence_ack(struct virtqueue *vq); 335 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 336 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 337 void virtio_gpu_dequeue_fence_func(struct work_struct *work); 338 339 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 340 341 /* virtio_gpu_display.c */ 342 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 343 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 344 345 /* virtio_gpu_plane.c */ 346 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 347 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 348 enum drm_plane_type type, 349 int index); 350 351 /* virtio_gpu_fence.c */ 352 struct virtio_gpu_fence *virtio_gpu_fence_alloc( 353 struct virtio_gpu_device *vgdev); 354 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 355 struct virtio_gpu_ctrl_hdr *cmd_hdr, 356 struct virtio_gpu_fence *fence); 357 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 358 u64 last_seq); 359 360 /* virtio_gpu_object */ 361 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 362 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 363 size_t size); 364 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 365 struct virtio_gpu_object_params *params, 366 struct virtio_gpu_object **bo_ptr, 367 struct virtio_gpu_fence *fence); 368 369 bool virtio_gpu_is_shmem(struct drm_gem_object *obj); 370 371 /* virtgpu_prime.c */ 372 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 373 struct drm_device *dev, struct dma_buf_attachment *attach, 374 struct sg_table *sgt); 375 376 /* virgl debugfs */ 377 int virtio_gpu_debugfs_init(struct drm_minor *minor); 378 379 #endif 380