1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_crtc_helper.h>
37 #include <ttm/ttm_bo_api.h>
38 #include <ttm/ttm_bo_driver.h>
39 #include <ttm/ttm_placement.h>
40 #include <ttm/ttm_module.h>
41 
42 #define DRIVER_NAME "virtio_gpu"
43 #define DRIVER_DESC "virtio GPU"
44 #define DRIVER_DATE "0"
45 
46 #define DRIVER_MAJOR 0
47 #define DRIVER_MINOR 0
48 #define DRIVER_PATCHLEVEL 1
49 
50 /* virtgpu_drm_bus.c */
51 int drm_virtio_set_busid(struct drm_device *dev, struct drm_master *master);
52 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
53 
54 struct virtio_gpu_object {
55 	struct drm_gem_object gem_base;
56 	uint32_t hw_res_handle;
57 
58 	struct sg_table *pages;
59 	void *vmap;
60 	bool dumb;
61 	struct ttm_place                placement_code;
62 	struct ttm_placement		placement;
63 	struct ttm_buffer_object	tbo;
64 	struct ttm_bo_kmap_obj		kmap;
65 };
66 #define gem_to_virtio_gpu_obj(gobj) \
67 	container_of((gobj), struct virtio_gpu_object, gem_base)
68 
69 struct virtio_gpu_vbuffer;
70 struct virtio_gpu_device;
71 
72 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
73 				   struct virtio_gpu_vbuffer *vbuf);
74 
75 struct virtio_gpu_fence_driver {
76 	atomic64_t       last_seq;
77 	uint64_t         sync_seq;
78 	struct list_head fences;
79 	spinlock_t       lock;
80 };
81 
82 struct virtio_gpu_fence {
83 	struct fence f;
84 	struct virtio_gpu_fence_driver *drv;
85 	struct list_head node;
86 	uint64_t seq;
87 };
88 #define to_virtio_fence(x) \
89 	container_of(x, struct virtio_gpu_fence, f)
90 
91 struct virtio_gpu_vbuffer {
92 	char *buf;
93 	int size;
94 
95 	void *data_buf;
96 	uint32_t data_size;
97 
98 	char *resp_buf;
99 	int resp_size;
100 
101 	virtio_gpu_resp_cb resp_cb;
102 
103 	struct list_head list;
104 };
105 
106 struct virtio_gpu_output {
107 	int index;
108 	struct drm_crtc crtc;
109 	struct drm_connector conn;
110 	struct drm_encoder enc;
111 	struct virtio_gpu_display_one info;
112 	struct virtio_gpu_update_cursor cursor;
113 	int cur_x;
114 	int cur_y;
115 };
116 #define drm_crtc_to_virtio_gpu_output(x) \
117 	container_of(x, struct virtio_gpu_output, crtc)
118 #define drm_connector_to_virtio_gpu_output(x) \
119 	container_of(x, struct virtio_gpu_output, conn)
120 #define drm_encoder_to_virtio_gpu_output(x) \
121 	container_of(x, struct virtio_gpu_output, enc)
122 
123 struct virtio_gpu_framebuffer {
124 	struct drm_framebuffer base;
125 	struct drm_gem_object *obj;
126 	int x1, y1, x2, y2; /* dirty rect */
127 	spinlock_t dirty_lock;
128 	uint32_t hw_res_handle;
129 };
130 #define to_virtio_gpu_framebuffer(x) \
131 	container_of(x, struct virtio_gpu_framebuffer, base)
132 
133 struct virtio_gpu_mman {
134 	struct ttm_bo_global_ref        bo_global_ref;
135 	struct drm_global_reference	mem_global_ref;
136 	bool				mem_global_referenced;
137 	struct ttm_bo_device		bdev;
138 };
139 
140 struct virtio_gpu_fbdev;
141 
142 struct virtio_gpu_queue {
143 	struct virtqueue *vq;
144 	spinlock_t qlock;
145 	wait_queue_head_t ack_queue;
146 	struct work_struct dequeue_work;
147 };
148 
149 struct virtio_gpu_drv_capset {
150 	uint32_t id;
151 	uint32_t max_version;
152 	uint32_t max_size;
153 };
154 
155 struct virtio_gpu_drv_cap_cache {
156 	struct list_head head;
157 	void *caps_cache;
158 	uint32_t id;
159 	uint32_t version;
160 	uint32_t size;
161 	atomic_t is_valid;
162 };
163 
164 struct virtio_gpu_device {
165 	struct device *dev;
166 	struct drm_device *ddev;
167 
168 	struct virtio_device *vdev;
169 
170 	struct virtio_gpu_mman mman;
171 
172 	/* pointer to fbdev info structure */
173 	struct virtio_gpu_fbdev *vgfbdev;
174 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
175 	uint32_t num_scanouts;
176 
177 	struct virtio_gpu_queue ctrlq;
178 	struct virtio_gpu_queue cursorq;
179 	struct list_head free_vbufs;
180 	spinlock_t free_vbufs_lock;
181 	void *vbufs;
182 	bool vqs_ready;
183 
184 	struct idr	resource_idr;
185 	spinlock_t resource_idr_lock;
186 
187 	wait_queue_head_t resp_wq;
188 	/* current display info */
189 	spinlock_t display_info_lock;
190 	bool display_info_pending;
191 
192 	struct virtio_gpu_fence_driver fence_drv;
193 
194 	struct idr	ctx_id_idr;
195 	spinlock_t ctx_id_idr_lock;
196 
197 	bool has_virgl_3d;
198 
199 	struct work_struct config_changed_work;
200 
201 	struct virtio_gpu_drv_capset *capsets;
202 	uint32_t num_capsets;
203 	struct list_head cap_cache;
204 };
205 
206 struct virtio_gpu_fpriv {
207 	uint32_t ctx_id;
208 };
209 
210 /* virtio_ioctl.c */
211 #define DRM_VIRTIO_NUM_IOCTLS 10
212 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
213 
214 /* virtio_kms.c */
215 int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
216 int virtio_gpu_driver_unload(struct drm_device *dev);
217 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
218 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
219 
220 /* virtio_gem.c */
221 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
222 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
223 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
224 int virtio_gpu_gem_create(struct drm_file *file,
225 			  struct drm_device *dev,
226 			  uint64_t size,
227 			  struct drm_gem_object **obj_p,
228 			  uint32_t *handle_p);
229 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
230 			       struct drm_file *file);
231 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
232 				 struct drm_file *file);
233 struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
234 						  size_t size, bool kernel,
235 						  bool pinned);
236 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
237 				struct drm_device *dev,
238 				struct drm_mode_create_dumb *args);
239 int virtio_gpu_mode_dumb_destroy(struct drm_file *file_priv,
240 				 struct drm_device *dev,
241 				 uint32_t handle);
242 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
243 			      struct drm_device *dev,
244 			      uint32_t handle, uint64_t *offset_p);
245 
246 /* virtio_fb */
247 #define VIRTIO_GPUFB_CONN_LIMIT 1
248 int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
249 void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
250 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
251 			     struct drm_clip_rect *clips,
252 			     unsigned num_clips);
253 /* virtio vg */
254 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
255 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
256 void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
257 			       uint32_t *resid);
258 void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
259 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
260 				    uint32_t resource_id,
261 				    uint32_t format,
262 				    uint32_t width,
263 				    uint32_t height);
264 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
265 				   uint32_t resource_id);
266 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
267 					uint32_t resource_id, uint64_t offset,
268 					__le32 width, __le32 height,
269 					__le32 x, __le32 y,
270 					struct virtio_gpu_fence **fence);
271 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
272 				   uint32_t resource_id,
273 				   uint32_t x, uint32_t y,
274 				   uint32_t width, uint32_t height);
275 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
276 				uint32_t scanout_id, uint32_t resource_id,
277 				uint32_t width, uint32_t height,
278 				uint32_t x, uint32_t y);
279 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
280 			     struct virtio_gpu_object *obj,
281 			     uint32_t resource_id,
282 			     struct virtio_gpu_fence **fence);
283 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
284 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
285 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
286 			    struct virtio_gpu_output *output);
287 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
288 void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
289 					   uint32_t resource_id);
290 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
291 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
292 			      int idx, int version,
293 			      struct virtio_gpu_drv_cap_cache **cache_p);
294 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
295 				   uint32_t nlen, const char *name);
296 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
297 				    uint32_t id);
298 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
299 					    uint32_t ctx_id,
300 					    uint32_t resource_id);
301 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
302 					    uint32_t ctx_id,
303 					    uint32_t resource_id);
304 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
305 			   void *data, uint32_t data_size,
306 			   uint32_t ctx_id, struct virtio_gpu_fence **fence);
307 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
308 					  uint32_t resource_id, uint32_t ctx_id,
309 					  uint64_t offset, uint32_t level,
310 					  struct virtio_gpu_box *box,
311 					  struct virtio_gpu_fence **fence);
312 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
313 					uint32_t resource_id, uint32_t ctx_id,
314 					uint64_t offset, uint32_t level,
315 					struct virtio_gpu_box *box,
316 					struct virtio_gpu_fence **fence);
317 void
318 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
319 				  struct virtio_gpu_resource_create_3d *rc_3d,
320 				  struct virtio_gpu_fence **fence);
321 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
322 void virtio_gpu_cursor_ack(struct virtqueue *vq);
323 void virtio_gpu_fence_ack(struct virtqueue *vq);
324 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
325 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
326 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
327 
328 /* virtio_gpu_display.c */
329 int virtio_gpu_framebuffer_init(struct drm_device *dev,
330 				struct virtio_gpu_framebuffer *vgfb,
331 				const struct drm_mode_fb_cmd2 *mode_cmd,
332 				struct drm_gem_object *obj);
333 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
334 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
335 
336 /* virtio_gpu_plane.c */
337 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
338 					int index);
339 
340 /* virtio_gpu_ttm.c */
341 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
342 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
343 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
344 
345 /* virtio_gpu_fence.c */
346 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
347 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
348 			  struct virtio_gpu_fence **fence);
349 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
350 				    u64 last_seq);
351 
352 /* virtio_gpu_object */
353 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
354 			     unsigned long size, bool kernel, bool pinned,
355 			     struct virtio_gpu_object **bo_ptr);
356 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
357 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
358 				   struct virtio_gpu_object *bo);
359 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
360 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
361 
362 /* virtgpu_prime.c */
363 int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
364 void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
365 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
366 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
367         struct drm_device *dev, struct dma_buf_attachment *attach,
368         struct sg_table *sgt);
369 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
370 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
371 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
372                                 struct vm_area_struct *vma);
373 
374 static inline struct virtio_gpu_object*
375 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
376 {
377 	ttm_bo_reference(&bo->tbo);
378 	return bo;
379 }
380 
381 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
382 {
383 	struct ttm_buffer_object *tbo;
384 
385 	if ((*bo) == NULL)
386 		return;
387 	tbo = &((*bo)->tbo);
388 	ttm_bo_unref(&tbo);
389 	if (tbo == NULL)
390 		*bo = NULL;
391 }
392 
393 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
394 {
395 	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
396 }
397 
398 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
399 					 bool no_wait)
400 {
401 	int r;
402 
403 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
404 	if (unlikely(r != 0)) {
405 		if (r != -ERESTARTSYS) {
406 			struct virtio_gpu_device *qdev =
407 				bo->gem_base.dev->dev_private;
408 			dev_err(qdev->dev, "%p reserve failed\n", bo);
409 		}
410 		return r;
411 	}
412 	return 0;
413 }
414 
415 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
416 {
417 	ttm_bo_unreserve(&bo->tbo);
418 }
419 
420 /* virgl debufs */
421 int virtio_gpu_debugfs_init(struct drm_minor *minor);
422 void virtio_gpu_debugfs_takedown(struct drm_minor *minor);
423 
424 #endif
425