1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28 
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33 
34 #include <drm/drm_atomic.h>
35 #include <drm/drm_drv.h>
36 #include <drm/drm_encoder.h>
37 #include <drm/drm_fb_helper.h>
38 #include <drm/drm_fourcc.h>
39 #include <drm/drm_gem.h>
40 #include <drm/drm_gem_shmem_helper.h>
41 #include <drm/drm_ioctl.h>
42 #include <drm/drm_probe_helper.h>
43 #include <drm/virtgpu_drm.h>
44 
45 #define DRIVER_NAME "virtio_gpu"
46 #define DRIVER_DESC "virtio GPU"
47 #define DRIVER_DATE "0"
48 
49 #define DRIVER_MAJOR 0
50 #define DRIVER_MINOR 1
51 #define DRIVER_PATCHLEVEL 0
52 
53 #define STATE_INITIALIZING 0
54 #define STATE_OK 1
55 #define STATE_ERR 2
56 
57 struct virtio_gpu_object_params {
58 	unsigned long size;
59 	bool dumb;
60 	/* 3d */
61 	bool virgl;
62 	bool blob;
63 
64 	/* classic resources only */
65 	uint32_t format;
66 	uint32_t width;
67 	uint32_t height;
68 	uint32_t target;
69 	uint32_t bind;
70 	uint32_t depth;
71 	uint32_t array_size;
72 	uint32_t last_level;
73 	uint32_t nr_samples;
74 	uint32_t flags;
75 
76 	/* blob resources only */
77 	uint32_t ctx_id;
78 	uint32_t blob_mem;
79 	uint32_t blob_flags;
80 	uint64_t blob_id;
81 };
82 
83 struct virtio_gpu_object {
84 	struct drm_gem_shmem_object base;
85 	uint32_t hw_res_handle;
86 	bool dumb;
87 	bool created;
88 	bool host3d_blob, guest_blob;
89 	uint32_t blob_mem, blob_flags;
90 
91 	int uuid_state;
92 	uuid_t uuid;
93 };
94 #define gem_to_virtio_gpu_obj(gobj) \
95 	container_of((gobj), struct virtio_gpu_object, base.base)
96 
97 struct virtio_gpu_object_shmem {
98 	struct virtio_gpu_object base;
99 	struct sg_table *pages;
100 	uint32_t mapped;
101 };
102 
103 struct virtio_gpu_object_vram {
104 	struct virtio_gpu_object base;
105 	uint32_t map_state;
106 	uint32_t map_info;
107 	struct drm_mm_node vram_node;
108 };
109 
110 #define to_virtio_gpu_shmem(virtio_gpu_object) \
111 	container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
112 
113 #define to_virtio_gpu_vram(virtio_gpu_object) \
114 	container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
115 
116 struct virtio_gpu_object_array {
117 	struct ww_acquire_ctx ticket;
118 	struct list_head next;
119 	u32 nents, total;
120 	struct drm_gem_object *objs[];
121 };
122 
123 struct virtio_gpu_vbuffer;
124 struct virtio_gpu_device;
125 
126 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
127 				   struct virtio_gpu_vbuffer *vbuf);
128 
129 struct virtio_gpu_fence_driver {
130 	atomic64_t       last_fence_id;
131 	uint64_t         current_fence_id;
132 	uint64_t         context;
133 	struct list_head fences;
134 	spinlock_t       lock;
135 };
136 
137 struct virtio_gpu_fence {
138 	struct dma_fence f;
139 	struct virtio_gpu_fence_driver *drv;
140 	struct list_head node;
141 };
142 
143 struct virtio_gpu_vbuffer {
144 	char *buf;
145 	int size;
146 
147 	void *data_buf;
148 	uint32_t data_size;
149 
150 	char *resp_buf;
151 	int resp_size;
152 	virtio_gpu_resp_cb resp_cb;
153 	void *resp_cb_data;
154 
155 	struct virtio_gpu_object_array *objs;
156 	struct list_head list;
157 };
158 
159 struct virtio_gpu_output {
160 	int index;
161 	struct drm_crtc crtc;
162 	struct drm_connector conn;
163 	struct drm_encoder enc;
164 	struct virtio_gpu_display_one info;
165 	struct virtio_gpu_update_cursor cursor;
166 	struct edid *edid;
167 	int cur_x;
168 	int cur_y;
169 	bool needs_modeset;
170 };
171 #define drm_crtc_to_virtio_gpu_output(x) \
172 	container_of(x, struct virtio_gpu_output, crtc)
173 
174 struct virtio_gpu_framebuffer {
175 	struct drm_framebuffer base;
176 	struct virtio_gpu_fence *fence;
177 };
178 #define to_virtio_gpu_framebuffer(x) \
179 	container_of(x, struct virtio_gpu_framebuffer, base)
180 
181 struct virtio_gpu_queue {
182 	struct virtqueue *vq;
183 	spinlock_t qlock;
184 	wait_queue_head_t ack_queue;
185 	struct work_struct dequeue_work;
186 };
187 
188 struct virtio_gpu_drv_capset {
189 	uint32_t id;
190 	uint32_t max_version;
191 	uint32_t max_size;
192 };
193 
194 struct virtio_gpu_drv_cap_cache {
195 	struct list_head head;
196 	void *caps_cache;
197 	uint32_t id;
198 	uint32_t version;
199 	uint32_t size;
200 	atomic_t is_valid;
201 };
202 
203 struct virtio_gpu_device {
204 	struct device *dev;
205 	struct drm_device *ddev;
206 
207 	struct virtio_device *vdev;
208 
209 	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
210 	uint32_t num_scanouts;
211 
212 	struct virtio_gpu_queue ctrlq;
213 	struct virtio_gpu_queue cursorq;
214 	struct kmem_cache *vbufs;
215 
216 	atomic_t pending_commands;
217 
218 	struct ida	resource_ida;
219 
220 	wait_queue_head_t resp_wq;
221 	/* current display info */
222 	spinlock_t display_info_lock;
223 	bool display_info_pending;
224 
225 	struct virtio_gpu_fence_driver fence_drv;
226 
227 	struct ida	ctx_id_ida;
228 
229 	bool has_virgl_3d;
230 	bool has_edid;
231 	bool has_indirect;
232 	bool has_resource_assign_uuid;
233 	bool has_resource_blob;
234 	bool has_host_visible;
235 	struct virtio_shm_region host_visible_region;
236 	struct drm_mm host_visible_mm;
237 
238 	struct work_struct config_changed_work;
239 
240 	struct work_struct obj_free_work;
241 	spinlock_t obj_free_lock;
242 	struct list_head obj_free_list;
243 
244 	struct virtio_gpu_drv_capset *capsets;
245 	uint32_t num_capsets;
246 	struct list_head cap_cache;
247 
248 	/* protects uuid state when exporting */
249 	spinlock_t resource_export_lock;
250 	/* protects map state and host_visible_mm */
251 	spinlock_t host_visible_lock;
252 };
253 
254 struct virtio_gpu_fpriv {
255 	uint32_t ctx_id;
256 	bool context_created;
257 	struct mutex context_lock;
258 };
259 
260 /* virtgpu_ioctl.c */
261 #define DRM_VIRTIO_NUM_IOCTLS 11
262 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
263 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
264 
265 /* virtgpu_kms.c */
266 int virtio_gpu_init(struct drm_device *dev);
267 void virtio_gpu_deinit(struct drm_device *dev);
268 void virtio_gpu_release(struct drm_device *dev);
269 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
270 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
271 
272 /* virtgpu_gem.c */
273 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
274 			       struct drm_file *file);
275 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
276 				 struct drm_file *file);
277 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
278 				struct drm_device *dev,
279 				struct drm_mode_create_dumb *args);
280 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
281 			      struct drm_device *dev,
282 			      uint32_t handle, uint64_t *offset_p);
283 
284 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
285 struct virtio_gpu_object_array*
286 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
287 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
288 			      struct drm_gem_object *obj);
289 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
290 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
291 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
292 				struct dma_fence *fence);
293 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
294 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
295 				       struct virtio_gpu_object_array *objs);
296 void virtio_gpu_array_put_free_work(struct work_struct *work);
297 
298 /* virtgpu_vq.c */
299 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
300 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
301 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
302 				    struct virtio_gpu_object *bo,
303 				    struct virtio_gpu_object_params *params,
304 				    struct virtio_gpu_object_array *objs,
305 				    struct virtio_gpu_fence *fence);
306 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
307 				   struct virtio_gpu_object *bo);
308 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
309 					uint64_t offset,
310 					uint32_t width, uint32_t height,
311 					uint32_t x, uint32_t y,
312 					struct virtio_gpu_object_array *objs,
313 					struct virtio_gpu_fence *fence);
314 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
315 				   uint32_t resource_id,
316 				   uint32_t x, uint32_t y,
317 				   uint32_t width, uint32_t height);
318 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
319 				uint32_t scanout_id, uint32_t resource_id,
320 				uint32_t width, uint32_t height,
321 				uint32_t x, uint32_t y);
322 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
323 			      struct virtio_gpu_object *obj,
324 			      struct virtio_gpu_mem_entry *ents,
325 			      unsigned int nents);
326 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
327 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
328 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
329 			    struct virtio_gpu_output *output);
330 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
331 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
332 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
333 			      int idx, int version,
334 			      struct virtio_gpu_drv_cap_cache **cache_p);
335 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
336 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
337 				   uint32_t nlen, const char *name);
338 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
339 				    uint32_t id);
340 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
341 					    uint32_t ctx_id,
342 					    struct virtio_gpu_object_array *objs);
343 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
344 					    uint32_t ctx_id,
345 					    struct virtio_gpu_object_array *objs);
346 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
347 			   void *data, uint32_t data_size,
348 			   uint32_t ctx_id,
349 			   struct virtio_gpu_object_array *objs,
350 			   struct virtio_gpu_fence *fence);
351 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
352 					  uint32_t ctx_id,
353 					  uint64_t offset, uint32_t level,
354 					  uint32_t stride,
355 					  uint32_t layer_stride,
356 					  struct drm_virtgpu_3d_box *box,
357 					  struct virtio_gpu_object_array *objs,
358 					  struct virtio_gpu_fence *fence);
359 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
360 					uint32_t ctx_id,
361 					uint64_t offset, uint32_t level,
362 					uint32_t stride,
363 					uint32_t layer_stride,
364 					struct drm_virtgpu_3d_box *box,
365 					struct virtio_gpu_object_array *objs,
366 					struct virtio_gpu_fence *fence);
367 void
368 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
369 				  struct virtio_gpu_object *bo,
370 				  struct virtio_gpu_object_params *params,
371 				  struct virtio_gpu_object_array *objs,
372 				  struct virtio_gpu_fence *fence);
373 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
374 void virtio_gpu_cursor_ack(struct virtqueue *vq);
375 void virtio_gpu_fence_ack(struct virtqueue *vq);
376 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
377 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
378 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
379 
380 void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
381 
382 int
383 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
384 				    struct virtio_gpu_object_array *objs);
385 
386 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
387 		       struct virtio_gpu_object_array *objs, uint64_t offset);
388 
389 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
390 			  struct virtio_gpu_object *bo);
391 
392 void
393 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
394 				    struct virtio_gpu_object *bo,
395 				    struct virtio_gpu_object_params *params,
396 				    struct virtio_gpu_mem_entry *ents,
397 				    uint32_t nents);
398 void
399 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
400 				uint32_t scanout_id,
401 				struct virtio_gpu_object *bo,
402 				struct drm_framebuffer *fb,
403 				uint32_t width, uint32_t height,
404 				uint32_t x, uint32_t y);
405 
406 /* virtgpu_display.c */
407 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
408 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
409 
410 /* virtgpu_plane.c */
411 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
412 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
413 					enum drm_plane_type type,
414 					int index);
415 
416 /* virtgpu_fence.c */
417 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
418 	struct virtio_gpu_device *vgdev);
419 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
420 			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
421 			  struct virtio_gpu_fence *fence);
422 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
423 				    u64 fence_id);
424 
425 /* virtgpu_object.c */
426 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
427 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
428 						size_t size);
429 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
430 			     struct virtio_gpu_object_params *params,
431 			     struct virtio_gpu_object **bo_ptr,
432 			     struct virtio_gpu_fence *fence);
433 
434 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
435 
436 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
437 			       uint32_t *resid);
438 /* virtgpu_prime.c */
439 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
440 				    struct virtio_gpu_object *bo);
441 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
442 					 int flags);
443 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
444 						struct dma_buf *buf);
445 int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj,
446 			       uuid_t *uuid);
447 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
448 	struct drm_device *dev, struct dma_buf_attachment *attach,
449 	struct sg_table *sgt);
450 
451 /* virtgpu_debugfs.c */
452 void virtio_gpu_debugfs_init(struct drm_minor *minor);
453 
454 /* virtgpu_vram.c */
455 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
456 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
457 			   struct virtio_gpu_object_params *params,
458 			   struct virtio_gpu_object **bo_ptr);
459 #endif
460