xref: /openbmc/linux/drivers/gpu/drm/vc4/vc4_trace.h (revision 044feb97)
1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2d5b1a78aSEric Anholt /*
3d5b1a78aSEric Anholt  * Copyright (C) 2015 Broadcom
4d5b1a78aSEric Anholt  */
5d5b1a78aSEric Anholt 
6d5b1a78aSEric Anholt #if !defined(_VC4_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
7d5b1a78aSEric Anholt #define _VC4_TRACE_H_
8d5b1a78aSEric Anholt 
9d5b1a78aSEric Anholt #include <linux/stringify.h>
10d5b1a78aSEric Anholt #include <linux/types.h>
11d5b1a78aSEric Anholt #include <linux/tracepoint.h>
12d5b1a78aSEric Anholt 
13d5b1a78aSEric Anholt #undef TRACE_SYSTEM
14d5b1a78aSEric Anholt #define TRACE_SYSTEM vc4
15d5b1a78aSEric Anholt #define TRACE_INCLUDE_FILE vc4_trace
16d5b1a78aSEric Anholt 
17d5b1a78aSEric Anholt TRACE_EVENT(vc4_wait_for_seqno_begin,
18d5b1a78aSEric Anholt 	    TP_PROTO(struct drm_device *dev, uint64_t seqno, uint64_t timeout),
19d5b1a78aSEric Anholt 	    TP_ARGS(dev, seqno, timeout),
20d5b1a78aSEric Anholt 
21d5b1a78aSEric Anholt 	    TP_STRUCT__entry(
22d5b1a78aSEric Anholt 			     __field(u32, dev)
23d5b1a78aSEric Anholt 			     __field(u64, seqno)
24d5b1a78aSEric Anholt 			     __field(u64, timeout)
25d5b1a78aSEric Anholt 			     ),
26d5b1a78aSEric Anholt 
27d5b1a78aSEric Anholt 	    TP_fast_assign(
28d5b1a78aSEric Anholt 			   __entry->dev = dev->primary->index;
29d5b1a78aSEric Anholt 			   __entry->seqno = seqno;
30d5b1a78aSEric Anholt 			   __entry->timeout = timeout;
31d5b1a78aSEric Anholt 			   ),
32d5b1a78aSEric Anholt 
33d5b1a78aSEric Anholt 	    TP_printk("dev=%u, seqno=%llu, timeout=%llu",
34d5b1a78aSEric Anholt 		      __entry->dev, __entry->seqno, __entry->timeout)
35d5b1a78aSEric Anholt );
36d5b1a78aSEric Anholt 
37d5b1a78aSEric Anholt TRACE_EVENT(vc4_wait_for_seqno_end,
38d5b1a78aSEric Anholt 	    TP_PROTO(struct drm_device *dev, uint64_t seqno),
39d5b1a78aSEric Anholt 	    TP_ARGS(dev, seqno),
40d5b1a78aSEric Anholt 
41d5b1a78aSEric Anholt 	    TP_STRUCT__entry(
42d5b1a78aSEric Anholt 			     __field(u32, dev)
43d5b1a78aSEric Anholt 			     __field(u64, seqno)
44d5b1a78aSEric Anholt 			     ),
45d5b1a78aSEric Anholt 
46d5b1a78aSEric Anholt 	    TP_fast_assign(
47d5b1a78aSEric Anholt 			   __entry->dev = dev->primary->index;
48d5b1a78aSEric Anholt 			   __entry->seqno = seqno;
49d5b1a78aSEric Anholt 			   ),
50d5b1a78aSEric Anholt 
51d5b1a78aSEric Anholt 	    TP_printk("dev=%u, seqno=%llu",
52d5b1a78aSEric Anholt 		      __entry->dev, __entry->seqno)
53d5b1a78aSEric Anholt );
54d5b1a78aSEric Anholt 
55*044feb97SMelissa Wen TRACE_EVENT(vc4_submit_cl_ioctl,
56*044feb97SMelissa Wen 	    TP_PROTO(struct drm_device *dev, u32 bin_cl_size, u32 shader_rec_size, u32 bo_count),
57*044feb97SMelissa Wen 	    TP_ARGS(dev, bin_cl_size, shader_rec_size, bo_count),
58*044feb97SMelissa Wen 
59*044feb97SMelissa Wen 	    TP_STRUCT__entry(
60*044feb97SMelissa Wen 			     __field(u32, dev)
61*044feb97SMelissa Wen 			     __field(u32, bin_cl_size)
62*044feb97SMelissa Wen 			     __field(u32, shader_rec_size)
63*044feb97SMelissa Wen 			     __field(u32, bo_count)
64*044feb97SMelissa Wen 			     ),
65*044feb97SMelissa Wen 
66*044feb97SMelissa Wen 	    TP_fast_assign(
67*044feb97SMelissa Wen 			   __entry->dev = dev->primary->index;
68*044feb97SMelissa Wen 			   __entry->bin_cl_size = bin_cl_size;
69*044feb97SMelissa Wen 			   __entry->shader_rec_size = shader_rec_size;
70*044feb97SMelissa Wen 			   __entry->bo_count = bo_count;
71*044feb97SMelissa Wen 			   ),
72*044feb97SMelissa Wen 
73*044feb97SMelissa Wen 	    TP_printk("dev=%u, bin_cl_size=%u, shader_rec_size=%u, bo_count=%u",
74*044feb97SMelissa Wen 		      __entry->dev,
75*044feb97SMelissa Wen 		      __entry->bin_cl_size,
76*044feb97SMelissa Wen 		      __entry->shader_rec_size,
77*044feb97SMelissa Wen 		      __entry->bo_count)
78*044feb97SMelissa Wen );
79*044feb97SMelissa Wen 
80*044feb97SMelissa Wen TRACE_EVENT(vc4_submit_cl,
81*044feb97SMelissa Wen 	    TP_PROTO(struct drm_device *dev, bool is_render,
82*044feb97SMelissa Wen 		     uint64_t seqno,
83*044feb97SMelissa Wen 		     u32 ctnqba, u32 ctnqea),
84*044feb97SMelissa Wen 	    TP_ARGS(dev, is_render, seqno, ctnqba, ctnqea),
85*044feb97SMelissa Wen 
86*044feb97SMelissa Wen 	    TP_STRUCT__entry(
87*044feb97SMelissa Wen 			     __field(u32, dev)
88*044feb97SMelissa Wen 			     __field(bool, is_render)
89*044feb97SMelissa Wen 			     __field(u64, seqno)
90*044feb97SMelissa Wen 			     __field(u32, ctnqba)
91*044feb97SMelissa Wen 			     __field(u32, ctnqea)
92*044feb97SMelissa Wen 			     ),
93*044feb97SMelissa Wen 
94*044feb97SMelissa Wen 	    TP_fast_assign(
95*044feb97SMelissa Wen 			   __entry->dev = dev->primary->index;
96*044feb97SMelissa Wen 			   __entry->is_render = is_render;
97*044feb97SMelissa Wen 			   __entry->seqno = seqno;
98*044feb97SMelissa Wen 			   __entry->ctnqba = ctnqba;
99*044feb97SMelissa Wen 			   __entry->ctnqea = ctnqea;
100*044feb97SMelissa Wen 			   ),
101*044feb97SMelissa Wen 
102*044feb97SMelissa Wen 	    TP_printk("dev=%u, %s, seqno=%llu, 0x%08x..0x%08x",
103*044feb97SMelissa Wen 		      __entry->dev,
104*044feb97SMelissa Wen 		      __entry->is_render ? "RCL" : "BCL",
105*044feb97SMelissa Wen 		      __entry->seqno,
106*044feb97SMelissa Wen 		      __entry->ctnqba,
107*044feb97SMelissa Wen 		      __entry->ctnqea)
108*044feb97SMelissa Wen );
109*044feb97SMelissa Wen 
110*044feb97SMelissa Wen TRACE_EVENT(vc4_bcl_end_irq,
111*044feb97SMelissa Wen 	    TP_PROTO(struct drm_device *dev,
112*044feb97SMelissa Wen 		     uint64_t seqno),
113*044feb97SMelissa Wen 	    TP_ARGS(dev, seqno),
114*044feb97SMelissa Wen 
115*044feb97SMelissa Wen 	    TP_STRUCT__entry(
116*044feb97SMelissa Wen 			     __field(u32, dev)
117*044feb97SMelissa Wen 			     __field(u64, seqno)
118*044feb97SMelissa Wen 			     ),
119*044feb97SMelissa Wen 
120*044feb97SMelissa Wen 	    TP_fast_assign(
121*044feb97SMelissa Wen 			   __entry->dev = dev->primary->index;
122*044feb97SMelissa Wen 			   __entry->seqno = seqno;
123*044feb97SMelissa Wen 			   ),
124*044feb97SMelissa Wen 
125*044feb97SMelissa Wen 	    TP_printk("dev=%u, seqno=%llu",
126*044feb97SMelissa Wen 		      __entry->dev,
127*044feb97SMelissa Wen 		      __entry->seqno)
128*044feb97SMelissa Wen );
129*044feb97SMelissa Wen 
130*044feb97SMelissa Wen TRACE_EVENT(vc4_rcl_end_irq,
131*044feb97SMelissa Wen 	    TP_PROTO(struct drm_device *dev,
132*044feb97SMelissa Wen 		     uint64_t seqno),
133*044feb97SMelissa Wen 	    TP_ARGS(dev, seqno),
134*044feb97SMelissa Wen 
135*044feb97SMelissa Wen 	    TP_STRUCT__entry(
136*044feb97SMelissa Wen 			     __field(u32, dev)
137*044feb97SMelissa Wen 			     __field(u64, seqno)
138*044feb97SMelissa Wen 			     ),
139*044feb97SMelissa Wen 
140*044feb97SMelissa Wen 	    TP_fast_assign(
141*044feb97SMelissa Wen 			   __entry->dev = dev->primary->index;
142*044feb97SMelissa Wen 			   __entry->seqno = seqno;
143*044feb97SMelissa Wen 			   ),
144*044feb97SMelissa Wen 
145*044feb97SMelissa Wen 	    TP_printk("dev=%u, seqno=%llu",
146*044feb97SMelissa Wen 		      __entry->dev,
147*044feb97SMelissa Wen 		      __entry->seqno)
148*044feb97SMelissa Wen );
149*044feb97SMelissa Wen 
150d5b1a78aSEric Anholt #endif /* _VC4_TRACE_H_ */
151d5b1a78aSEric Anholt 
152d5b1a78aSEric Anholt /* This part must be outside protection */
153d5b1a78aSEric Anholt #undef TRACE_INCLUDE_PATH
154ff58a15aSThierry Reding #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/vc4
155d5b1a78aSEric Anholt #include <trace/define_trace.h>
156