xref: /openbmc/linux/drivers/gpu/drm/vc4/vc4_kms.c (revision 965f22bc)
1 /*
2  * Copyright (C) 2015 Broadcom
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 /**
10  * DOC: VC4 KMS
11  *
12  * This is the general code for implementing KMS mode setting that
13  * doesn't clearly associate with any of the other objects (plane,
14  * crtc, HDMI encoder).
15  */
16 
17 #include <drm/drm_crtc.h>
18 #include <drm/drm_atomic.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_crtc_helper.h>
21 #include <drm/drm_plane_helper.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_fb_cma_helper.h>
24 #include <drm/drm_gem_framebuffer_helper.h>
25 #include "vc4_drv.h"
26 #include "vc4_regs.h"
27 
28 struct vc4_ctm_state {
29 	struct drm_private_state base;
30 	struct drm_color_ctm *ctm;
31 	int fifo;
32 };
33 
34 static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
35 {
36 	return container_of(priv, struct vc4_ctm_state, base);
37 }
38 
39 static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state,
40 					       struct drm_private_obj *manager)
41 {
42 	struct drm_device *dev = state->dev;
43 	struct vc4_dev *vc4 = dev->dev_private;
44 	struct drm_private_state *priv_state;
45 	int ret;
46 
47 	ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx);
48 	if (ret)
49 		return ERR_PTR(ret);
50 
51 	priv_state = drm_atomic_get_private_obj_state(state, manager);
52 	if (IS_ERR(priv_state))
53 		return ERR_CAST(priv_state);
54 
55 	return to_vc4_ctm_state(priv_state);
56 }
57 
58 static struct drm_private_state *
59 vc4_ctm_duplicate_state(struct drm_private_obj *obj)
60 {
61 	struct vc4_ctm_state *state;
62 
63 	state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
64 	if (!state)
65 		return NULL;
66 
67 	__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
68 
69 	return &state->base;
70 }
71 
72 static void vc4_ctm_destroy_state(struct drm_private_obj *obj,
73 				  struct drm_private_state *state)
74 {
75 	struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state);
76 
77 	kfree(ctm_state);
78 }
79 
80 static const struct drm_private_state_funcs vc4_ctm_state_funcs = {
81 	.atomic_duplicate_state = vc4_ctm_duplicate_state,
82 	.atomic_destroy_state = vc4_ctm_destroy_state,
83 };
84 
85 /* Converts a DRM S31.32 value to the HW S0.9 format. */
86 static u16 vc4_ctm_s31_32_to_s0_9(u64 in)
87 {
88 	u16 r;
89 
90 	/* Sign bit. */
91 	r = in & BIT_ULL(63) ? BIT(9) : 0;
92 
93 	if ((in & GENMASK_ULL(62, 32)) > 0) {
94 		/* We have zero integer bits so we can only saturate here. */
95 		r |= GENMASK(8, 0);
96 	} else {
97 		/* Otherwise take the 9 most important fractional bits. */
98 		r |= (in >> 23) & GENMASK(8, 0);
99 	}
100 
101 	return r;
102 }
103 
104 static void
105 vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state)
106 {
107 	struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state);
108 	struct drm_color_ctm *ctm = ctm_state->ctm;
109 
110 	if (ctm_state->fifo) {
111 		HVS_WRITE(SCALER_OLEDCOEF2,
112 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]),
113 					SCALER_OLEDCOEF2_R_TO_R) |
114 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]),
115 					SCALER_OLEDCOEF2_R_TO_G) |
116 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]),
117 					SCALER_OLEDCOEF2_R_TO_B));
118 		HVS_WRITE(SCALER_OLEDCOEF1,
119 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]),
120 					SCALER_OLEDCOEF1_G_TO_R) |
121 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]),
122 					SCALER_OLEDCOEF1_G_TO_G) |
123 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]),
124 					SCALER_OLEDCOEF1_G_TO_B));
125 		HVS_WRITE(SCALER_OLEDCOEF0,
126 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]),
127 					SCALER_OLEDCOEF0_B_TO_R) |
128 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]),
129 					SCALER_OLEDCOEF0_B_TO_G) |
130 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]),
131 					SCALER_OLEDCOEF0_B_TO_B));
132 	}
133 
134 	HVS_WRITE(SCALER_OLEDOFFS,
135 		  VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
136 }
137 
138 static void
139 vc4_atomic_complete_commit(struct drm_atomic_state *state)
140 {
141 	struct drm_device *dev = state->dev;
142 	struct vc4_dev *vc4 = to_vc4_dev(dev);
143 
144 	drm_atomic_helper_wait_for_fences(dev, state, false);
145 
146 	drm_atomic_helper_wait_for_dependencies(state);
147 
148 	drm_atomic_helper_commit_modeset_disables(dev, state);
149 
150 	vc4_ctm_commit(vc4, state);
151 
152 	drm_atomic_helper_commit_planes(dev, state, 0);
153 
154 	drm_atomic_helper_commit_modeset_enables(dev, state);
155 
156 	drm_atomic_helper_fake_vblank(state);
157 
158 	drm_atomic_helper_commit_hw_done(state);
159 
160 	drm_atomic_helper_wait_for_flip_done(dev, state);
161 
162 	drm_atomic_helper_cleanup_planes(dev, state);
163 
164 	drm_atomic_helper_commit_cleanup_done(state);
165 
166 	drm_atomic_state_put(state);
167 
168 	up(&vc4->async_modeset);
169 }
170 
171 static void commit_work(struct work_struct *work)
172 {
173 	struct drm_atomic_state *state = container_of(work,
174 						      struct drm_atomic_state,
175 						      commit_work);
176 	vc4_atomic_complete_commit(state);
177 }
178 
179 /**
180  * vc4_atomic_commit - commit validated state object
181  * @dev: DRM device
182  * @state: the driver state object
183  * @nonblock: nonblocking commit
184  *
185  * This function commits a with drm_atomic_helper_check() pre-validated state
186  * object. This can still fail when e.g. the framebuffer reservation fails. For
187  * now this doesn't implement asynchronous commits.
188  *
189  * RETURNS
190  * Zero for success or -errno.
191  */
192 static int vc4_atomic_commit(struct drm_device *dev,
193 			     struct drm_atomic_state *state,
194 			     bool nonblock)
195 {
196 	struct vc4_dev *vc4 = to_vc4_dev(dev);
197 	int ret;
198 
199 	if (state->async_update) {
200 		ret = down_interruptible(&vc4->async_modeset);
201 		if (ret)
202 			return ret;
203 
204 		ret = drm_atomic_helper_prepare_planes(dev, state);
205 		if (ret) {
206 			up(&vc4->async_modeset);
207 			return ret;
208 		}
209 
210 		drm_atomic_helper_async_commit(dev, state);
211 
212 		drm_atomic_helper_cleanup_planes(dev, state);
213 
214 		up(&vc4->async_modeset);
215 
216 		return 0;
217 	}
218 
219 	ret = drm_atomic_helper_setup_commit(state, nonblock);
220 	if (ret)
221 		return ret;
222 
223 	INIT_WORK(&state->commit_work, commit_work);
224 
225 	ret = down_interruptible(&vc4->async_modeset);
226 	if (ret)
227 		return ret;
228 
229 	ret = drm_atomic_helper_prepare_planes(dev, state);
230 	if (ret) {
231 		up(&vc4->async_modeset);
232 		return ret;
233 	}
234 
235 	if (!nonblock) {
236 		ret = drm_atomic_helper_wait_for_fences(dev, state, true);
237 		if (ret) {
238 			drm_atomic_helper_cleanup_planes(dev, state);
239 			up(&vc4->async_modeset);
240 			return ret;
241 		}
242 	}
243 
244 	/*
245 	 * This is the point of no return - everything below never fails except
246 	 * when the hw goes bonghits. Which means we can commit the new state on
247 	 * the software side now.
248 	 */
249 
250 	BUG_ON(drm_atomic_helper_swap_state(state, false) < 0);
251 
252 	/*
253 	 * Everything below can be run asynchronously without the need to grab
254 	 * any modeset locks at all under one condition: It must be guaranteed
255 	 * that the asynchronous work has either been cancelled (if the driver
256 	 * supports it, which at least requires that the framebuffers get
257 	 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
258 	 * before the new state gets committed on the software side with
259 	 * drm_atomic_helper_swap_state().
260 	 *
261 	 * This scheme allows new atomic state updates to be prepared and
262 	 * checked in parallel to the asynchronous completion of the previous
263 	 * update. Which is important since compositors need to figure out the
264 	 * composition of the next frame right after having submitted the
265 	 * current layout.
266 	 */
267 
268 	drm_atomic_state_get(state);
269 	if (nonblock)
270 		queue_work(system_unbound_wq, &state->commit_work);
271 	else
272 		vc4_atomic_complete_commit(state);
273 
274 	return 0;
275 }
276 
277 static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev,
278 					     struct drm_file *file_priv,
279 					     const struct drm_mode_fb_cmd2 *mode_cmd)
280 {
281 	struct drm_mode_fb_cmd2 mode_cmd_local;
282 
283 	/* If the user didn't specify a modifier, use the
284 	 * vc4_set_tiling_ioctl() state for the BO.
285 	 */
286 	if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
287 		struct drm_gem_object *gem_obj;
288 		struct vc4_bo *bo;
289 
290 		gem_obj = drm_gem_object_lookup(file_priv,
291 						mode_cmd->handles[0]);
292 		if (!gem_obj) {
293 			DRM_DEBUG("Failed to look up GEM BO %d\n",
294 				  mode_cmd->handles[0]);
295 			return ERR_PTR(-ENOENT);
296 		}
297 		bo = to_vc4_bo(gem_obj);
298 
299 		mode_cmd_local = *mode_cmd;
300 
301 		if (bo->t_format) {
302 			mode_cmd_local.modifier[0] =
303 				DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
304 		} else {
305 			mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE;
306 		}
307 
308 		drm_gem_object_put_unlocked(gem_obj);
309 
310 		mode_cmd = &mode_cmd_local;
311 	}
312 
313 	return drm_gem_fb_create(dev, file_priv, mode_cmd);
314 }
315 
316 /* Our CTM has some peculiar limitations: we can only enable it for one CRTC
317  * at a time and the HW only supports S0.9 scalars. To account for the latter,
318  * we don't allow userland to set a CTM that we have no hope of approximating.
319  */
320 static int
321 vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
322 {
323 	struct vc4_dev *vc4 = to_vc4_dev(dev);
324 	struct vc4_ctm_state *ctm_state = NULL;
325 	struct drm_crtc *crtc;
326 	struct drm_crtc_state *old_crtc_state, *new_crtc_state;
327 	struct drm_color_ctm *ctm;
328 	int i;
329 
330 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
331 		/* CTM is being disabled. */
332 		if (!new_crtc_state->ctm && old_crtc_state->ctm) {
333 			ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
334 			if (IS_ERR(ctm_state))
335 				return PTR_ERR(ctm_state);
336 			ctm_state->fifo = 0;
337 		}
338 	}
339 
340 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
341 		if (new_crtc_state->ctm == old_crtc_state->ctm)
342 			continue;
343 
344 		if (!ctm_state) {
345 			ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
346 			if (IS_ERR(ctm_state))
347 				return PTR_ERR(ctm_state);
348 		}
349 
350 		/* CTM is being enabled or the matrix changed. */
351 		if (new_crtc_state->ctm) {
352 			/* fifo is 1-based since 0 disables CTM. */
353 			int fifo = to_vc4_crtc(crtc)->channel + 1;
354 
355 			/* Check userland isn't trying to turn on CTM for more
356 			 * than one CRTC at a time.
357 			 */
358 			if (ctm_state->fifo && ctm_state->fifo != fifo) {
359 				DRM_DEBUG_DRIVER("Too many CTM configured\n");
360 				return -EINVAL;
361 			}
362 
363 			/* Check we can approximate the specified CTM.
364 			 * We disallow scalars |c| > 1.0 since the HW has
365 			 * no integer bits.
366 			 */
367 			ctm = new_crtc_state->ctm->data;
368 			for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) {
369 				u64 val = ctm->matrix[i];
370 
371 				val &= ~BIT_ULL(63);
372 				if (val > BIT_ULL(32))
373 					return -EINVAL;
374 			}
375 
376 			ctm_state->fifo = fifo;
377 			ctm_state->ctm = ctm;
378 		}
379 	}
380 
381 	return 0;
382 }
383 
384 static int
385 vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
386 {
387 	int ret;
388 
389 	ret = vc4_ctm_atomic_check(dev, state);
390 	if (ret < 0)
391 		return ret;
392 
393 	return drm_atomic_helper_check(dev, state);
394 }
395 
396 static const struct drm_mode_config_funcs vc4_mode_funcs = {
397 	.output_poll_changed = drm_fb_helper_output_poll_changed,
398 	.atomic_check = vc4_atomic_check,
399 	.atomic_commit = vc4_atomic_commit,
400 	.fb_create = vc4_fb_create,
401 };
402 
403 int vc4_kms_load(struct drm_device *dev)
404 {
405 	struct vc4_dev *vc4 = to_vc4_dev(dev);
406 	struct vc4_ctm_state *ctm_state;
407 	int ret;
408 
409 	sema_init(&vc4->async_modeset, 1);
410 
411 	/* Set support for vblank irq fast disable, before drm_vblank_init() */
412 	dev->vblank_disable_immediate = true;
413 
414 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
415 	if (ret < 0) {
416 		dev_err(dev->dev, "failed to initialize vblank\n");
417 		return ret;
418 	}
419 
420 	dev->mode_config.max_width = 2048;
421 	dev->mode_config.max_height = 2048;
422 	dev->mode_config.funcs = &vc4_mode_funcs;
423 	dev->mode_config.preferred_depth = 24;
424 	dev->mode_config.async_page_flip = true;
425 	dev->mode_config.allow_fb_modifiers = true;
426 
427 	drm_modeset_lock_init(&vc4->ctm_state_lock);
428 
429 	ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL);
430 	if (!ctm_state)
431 		return -ENOMEM;
432 	drm_atomic_private_obj_init(&vc4->ctm_manager, &ctm_state->base,
433 				    &vc4_ctm_state_funcs);
434 
435 	drm_mode_config_reset(dev);
436 
437 	if (dev->mode_config.num_connector)
438 		drm_fb_cma_fbdev_init(dev, 32, 0);
439 
440 	drm_kms_helper_poll_init(dev);
441 
442 	return 0;
443 }
444