1c8b75bcaSEric Anholt /* 2c8b75bcaSEric Anholt * Copyright (C) 2015 Broadcom 3c8b75bcaSEric Anholt * 4c8b75bcaSEric Anholt * This program is free software; you can redistribute it and/or modify 5c8b75bcaSEric Anholt * it under the terms of the GNU General Public License version 2 as 6c8b75bcaSEric Anholt * published by the Free Software Foundation. 7c8b75bcaSEric Anholt */ 8c8b75bcaSEric Anholt 9c8b75bcaSEric Anholt /** 10c8b75bcaSEric Anholt * DOC: VC4 KMS 11c8b75bcaSEric Anholt * 12c8b75bcaSEric Anholt * This is the general code for implementing KMS mode setting that 13c8b75bcaSEric Anholt * doesn't clearly associate with any of the other objects (plane, 14c8b75bcaSEric Anholt * crtc, HDMI encoder). 15c8b75bcaSEric Anholt */ 16c8b75bcaSEric Anholt 17b7e8e25bSMasahiro Yamada #include <drm/drm_crtc.h> 18b7e8e25bSMasahiro Yamada #include <drm/drm_atomic.h> 19b7e8e25bSMasahiro Yamada #include <drm/drm_atomic_helper.h> 209762477cSNoralf Trønnes #include <drm/drm_gem_framebuffer_helper.h> 21fcd70cd3SDaniel Vetter #include <drm/drm_plane_helper.h> 22fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 23c8b75bcaSEric Anholt #include "vc4_drv.h" 24766cc6b1SStefan Schake #include "vc4_regs.h" 25766cc6b1SStefan Schake 26766cc6b1SStefan Schake struct vc4_ctm_state { 27766cc6b1SStefan Schake struct drm_private_state base; 28766cc6b1SStefan Schake struct drm_color_ctm *ctm; 29766cc6b1SStefan Schake int fifo; 30766cc6b1SStefan Schake }; 31766cc6b1SStefan Schake 32766cc6b1SStefan Schake static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv) 33766cc6b1SStefan Schake { 34766cc6b1SStefan Schake return container_of(priv, struct vc4_ctm_state, base); 35766cc6b1SStefan Schake } 36766cc6b1SStefan Schake 37766cc6b1SStefan Schake static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state, 38766cc6b1SStefan Schake struct drm_private_obj *manager) 39766cc6b1SStefan Schake { 40766cc6b1SStefan Schake struct drm_device *dev = state->dev; 41766cc6b1SStefan Schake struct vc4_dev *vc4 = dev->dev_private; 42766cc6b1SStefan Schake struct drm_private_state *priv_state; 43766cc6b1SStefan Schake int ret; 44766cc6b1SStefan Schake 45766cc6b1SStefan Schake ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx); 46766cc6b1SStefan Schake if (ret) 47766cc6b1SStefan Schake return ERR_PTR(ret); 48766cc6b1SStefan Schake 49766cc6b1SStefan Schake priv_state = drm_atomic_get_private_obj_state(state, manager); 50766cc6b1SStefan Schake if (IS_ERR(priv_state)) 51766cc6b1SStefan Schake return ERR_CAST(priv_state); 52766cc6b1SStefan Schake 53766cc6b1SStefan Schake return to_vc4_ctm_state(priv_state); 54766cc6b1SStefan Schake } 55766cc6b1SStefan Schake 56766cc6b1SStefan Schake static struct drm_private_state * 57766cc6b1SStefan Schake vc4_ctm_duplicate_state(struct drm_private_obj *obj) 58766cc6b1SStefan Schake { 59766cc6b1SStefan Schake struct vc4_ctm_state *state; 60766cc6b1SStefan Schake 61766cc6b1SStefan Schake state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL); 62766cc6b1SStefan Schake if (!state) 63766cc6b1SStefan Schake return NULL; 64766cc6b1SStefan Schake 65766cc6b1SStefan Schake __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base); 66766cc6b1SStefan Schake 67766cc6b1SStefan Schake return &state->base; 68766cc6b1SStefan Schake } 69766cc6b1SStefan Schake 70766cc6b1SStefan Schake static void vc4_ctm_destroy_state(struct drm_private_obj *obj, 71766cc6b1SStefan Schake struct drm_private_state *state) 72766cc6b1SStefan Schake { 73766cc6b1SStefan Schake struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state); 74766cc6b1SStefan Schake 75766cc6b1SStefan Schake kfree(ctm_state); 76766cc6b1SStefan Schake } 77766cc6b1SStefan Schake 78766cc6b1SStefan Schake static const struct drm_private_state_funcs vc4_ctm_state_funcs = { 79766cc6b1SStefan Schake .atomic_duplicate_state = vc4_ctm_duplicate_state, 80766cc6b1SStefan Schake .atomic_destroy_state = vc4_ctm_destroy_state, 81766cc6b1SStefan Schake }; 82766cc6b1SStefan Schake 83766cc6b1SStefan Schake /* Converts a DRM S31.32 value to the HW S0.9 format. */ 84766cc6b1SStefan Schake static u16 vc4_ctm_s31_32_to_s0_9(u64 in) 85766cc6b1SStefan Schake { 86766cc6b1SStefan Schake u16 r; 87766cc6b1SStefan Schake 88766cc6b1SStefan Schake /* Sign bit. */ 89766cc6b1SStefan Schake r = in & BIT_ULL(63) ? BIT(9) : 0; 90766cc6b1SStefan Schake 91766cc6b1SStefan Schake if ((in & GENMASK_ULL(62, 32)) > 0) { 92766cc6b1SStefan Schake /* We have zero integer bits so we can only saturate here. */ 93766cc6b1SStefan Schake r |= GENMASK(8, 0); 94766cc6b1SStefan Schake } else { 95766cc6b1SStefan Schake /* Otherwise take the 9 most important fractional bits. */ 96766cc6b1SStefan Schake r |= (in >> 23) & GENMASK(8, 0); 97766cc6b1SStefan Schake } 98766cc6b1SStefan Schake 99766cc6b1SStefan Schake return r; 100766cc6b1SStefan Schake } 101766cc6b1SStefan Schake 102766cc6b1SStefan Schake static void 103766cc6b1SStefan Schake vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state) 104766cc6b1SStefan Schake { 105766cc6b1SStefan Schake struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state); 106766cc6b1SStefan Schake struct drm_color_ctm *ctm = ctm_state->ctm; 107766cc6b1SStefan Schake 108766cc6b1SStefan Schake if (ctm_state->fifo) { 109766cc6b1SStefan Schake HVS_WRITE(SCALER_OLEDCOEF2, 110766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), 111766cc6b1SStefan Schake SCALER_OLEDCOEF2_R_TO_R) | 112766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]), 113766cc6b1SStefan Schake SCALER_OLEDCOEF2_R_TO_G) | 114766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]), 115766cc6b1SStefan Schake SCALER_OLEDCOEF2_R_TO_B)); 116766cc6b1SStefan Schake HVS_WRITE(SCALER_OLEDCOEF1, 117766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]), 118766cc6b1SStefan Schake SCALER_OLEDCOEF1_G_TO_R) | 119766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]), 120766cc6b1SStefan Schake SCALER_OLEDCOEF1_G_TO_G) | 121766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]), 122766cc6b1SStefan Schake SCALER_OLEDCOEF1_G_TO_B)); 123766cc6b1SStefan Schake HVS_WRITE(SCALER_OLEDCOEF0, 124766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]), 125766cc6b1SStefan Schake SCALER_OLEDCOEF0_B_TO_R) | 126766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]), 127766cc6b1SStefan Schake SCALER_OLEDCOEF0_B_TO_G) | 128766cc6b1SStefan Schake VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]), 129766cc6b1SStefan Schake SCALER_OLEDCOEF0_B_TO_B)); 130766cc6b1SStefan Schake } 131766cc6b1SStefan Schake 132766cc6b1SStefan Schake HVS_WRITE(SCALER_OLEDOFFS, 133766cc6b1SStefan Schake VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO)); 134766cc6b1SStefan Schake } 135c8b75bcaSEric Anholt 136b501baccSEric Anholt static void 137cf1b372eSEric Anholt vc4_atomic_complete_commit(struct drm_atomic_state *state) 138b501baccSEric Anholt { 139b501baccSEric Anholt struct drm_device *dev = state->dev; 140b501baccSEric Anholt struct vc4_dev *vc4 = to_vc4_dev(dev); 141b501baccSEric Anholt 14234c8ea40SBoris Brezillon drm_atomic_helper_wait_for_fences(dev, state, false); 14334c8ea40SBoris Brezillon 14434c8ea40SBoris Brezillon drm_atomic_helper_wait_for_dependencies(state); 14534c8ea40SBoris Brezillon 146b501baccSEric Anholt drm_atomic_helper_commit_modeset_disables(dev, state); 147b501baccSEric Anholt 148766cc6b1SStefan Schake vc4_ctm_commit(vc4, state); 149766cc6b1SStefan Schake 1502b58e98dSLiu Ying drm_atomic_helper_commit_planes(dev, state, 0); 151b501baccSEric Anholt 152b501baccSEric Anholt drm_atomic_helper_commit_modeset_enables(dev, state); 153b501baccSEric Anholt 1541ebe99a7SBoris Brezillon drm_atomic_helper_fake_vblank(state); 1551ebe99a7SBoris Brezillon 15634c8ea40SBoris Brezillon drm_atomic_helper_commit_hw_done(state); 15734c8ea40SBoris Brezillon 158184d3cf4SBoris Brezillon drm_atomic_helper_wait_for_flip_done(dev, state); 159b501baccSEric Anholt 160b501baccSEric Anholt drm_atomic_helper_cleanup_planes(dev, state); 161b501baccSEric Anholt 16234c8ea40SBoris Brezillon drm_atomic_helper_commit_cleanup_done(state); 16334c8ea40SBoris Brezillon 1640853695cSChris Wilson drm_atomic_state_put(state); 165b501baccSEric Anholt 166b501baccSEric Anholt up(&vc4->async_modeset); 167b501baccSEric Anholt } 168b501baccSEric Anholt 169cf1b372eSEric Anholt static void commit_work(struct work_struct *work) 170b501baccSEric Anholt { 171cf1b372eSEric Anholt struct drm_atomic_state *state = container_of(work, 172cf1b372eSEric Anholt struct drm_atomic_state, 173cf1b372eSEric Anholt commit_work); 174cf1b372eSEric Anholt vc4_atomic_complete_commit(state); 175b501baccSEric Anholt } 176b501baccSEric Anholt 177b501baccSEric Anholt /** 178b501baccSEric Anholt * vc4_atomic_commit - commit validated state object 179b501baccSEric Anholt * @dev: DRM device 180b501baccSEric Anholt * @state: the driver state object 181eb63961bSMaarten Lankhorst * @nonblock: nonblocking commit 182b501baccSEric Anholt * 183b501baccSEric Anholt * This function commits a with drm_atomic_helper_check() pre-validated state 184b501baccSEric Anholt * object. This can still fail when e.g. the framebuffer reservation fails. For 185b501baccSEric Anholt * now this doesn't implement asynchronous commits. 186b501baccSEric Anholt * 187b501baccSEric Anholt * RETURNS 188b501baccSEric Anholt * Zero for success or -errno. 189b501baccSEric Anholt */ 190b501baccSEric Anholt static int vc4_atomic_commit(struct drm_device *dev, 191b501baccSEric Anholt struct drm_atomic_state *state, 192eb63961bSMaarten Lankhorst bool nonblock) 193b501baccSEric Anholt { 194b501baccSEric Anholt struct vc4_dev *vc4 = to_vc4_dev(dev); 195b501baccSEric Anholt int ret; 196b501baccSEric Anholt 197539c320bSGustavo Padovan if (state->async_update) { 198539c320bSGustavo Padovan ret = down_interruptible(&vc4->async_modeset); 199539c320bSGustavo Padovan if (ret) 200539c320bSGustavo Padovan return ret; 201539c320bSGustavo Padovan 202539c320bSGustavo Padovan ret = drm_atomic_helper_prepare_planes(dev, state); 203539c320bSGustavo Padovan if (ret) { 204539c320bSGustavo Padovan up(&vc4->async_modeset); 205539c320bSGustavo Padovan return ret; 206539c320bSGustavo Padovan } 207539c320bSGustavo Padovan 208539c320bSGustavo Padovan drm_atomic_helper_async_commit(dev, state); 209539c320bSGustavo Padovan 210539c320bSGustavo Padovan drm_atomic_helper_cleanup_planes(dev, state); 211539c320bSGustavo Padovan 212539c320bSGustavo Padovan up(&vc4->async_modeset); 213539c320bSGustavo Padovan 214539c320bSGustavo Padovan return 0; 215539c320bSGustavo Padovan } 216539c320bSGustavo Padovan 217fcc86cb4SBoris Brezillon /* We know for sure we don't want an async update here. Set 218fcc86cb4SBoris Brezillon * state->legacy_cursor_update to false to prevent 219fcc86cb4SBoris Brezillon * drm_atomic_helper_setup_commit() from auto-completing 220fcc86cb4SBoris Brezillon * commit->flip_done. 221fcc86cb4SBoris Brezillon */ 222fcc86cb4SBoris Brezillon state->legacy_cursor_update = false; 22334c8ea40SBoris Brezillon ret = drm_atomic_helper_setup_commit(state, nonblock); 22434c8ea40SBoris Brezillon if (ret) 22534c8ea40SBoris Brezillon return ret; 22626fc78f6SDerek Foreman 227cf1b372eSEric Anholt INIT_WORK(&state->commit_work, commit_work); 228cf1b372eSEric Anholt 229b501baccSEric Anholt ret = down_interruptible(&vc4->async_modeset); 230cf1b372eSEric Anholt if (ret) 231b501baccSEric Anholt return ret; 232b501baccSEric Anholt 233b501baccSEric Anholt ret = drm_atomic_helper_prepare_planes(dev, state); 234b501baccSEric Anholt if (ret) { 235b501baccSEric Anholt up(&vc4->async_modeset); 236b501baccSEric Anholt return ret; 237b501baccSEric Anholt } 238b501baccSEric Anholt 23953ad0694SEric Anholt if (!nonblock) { 24053ad0694SEric Anholt ret = drm_atomic_helper_wait_for_fences(dev, state, true); 24153ad0694SEric Anholt if (ret) { 24253ad0694SEric Anholt drm_atomic_helper_cleanup_planes(dev, state); 24353ad0694SEric Anholt up(&vc4->async_modeset); 24453ad0694SEric Anholt return ret; 24553ad0694SEric Anholt } 24653ad0694SEric Anholt } 24753ad0694SEric Anholt 248b501baccSEric Anholt /* 249b501baccSEric Anholt * This is the point of no return - everything below never fails except 250b501baccSEric Anholt * when the hw goes bonghits. Which means we can commit the new state on 251b501baccSEric Anholt * the software side now. 252b501baccSEric Anholt */ 253b501baccSEric Anholt 254d68bc0e7SMaarten Lankhorst BUG_ON(drm_atomic_helper_swap_state(state, false) < 0); 255b501baccSEric Anholt 256b501baccSEric Anholt /* 257b501baccSEric Anholt * Everything below can be run asynchronously without the need to grab 258b501baccSEric Anholt * any modeset locks at all under one condition: It must be guaranteed 259b501baccSEric Anholt * that the asynchronous work has either been cancelled (if the driver 260b501baccSEric Anholt * supports it, which at least requires that the framebuffers get 261b501baccSEric Anholt * cleaned up with drm_atomic_helper_cleanup_planes()) or completed 262b501baccSEric Anholt * before the new state gets committed on the software side with 263b501baccSEric Anholt * drm_atomic_helper_swap_state(). 264b501baccSEric Anholt * 265b501baccSEric Anholt * This scheme allows new atomic state updates to be prepared and 266b501baccSEric Anholt * checked in parallel to the asynchronous completion of the previous 267b501baccSEric Anholt * update. Which is important since compositors need to figure out the 268b501baccSEric Anholt * composition of the next frame right after having submitted the 269b501baccSEric Anholt * current layout. 270b501baccSEric Anholt */ 271b501baccSEric Anholt 2720853695cSChris Wilson drm_atomic_state_get(state); 273cf1b372eSEric Anholt if (nonblock) 274cf1b372eSEric Anholt queue_work(system_unbound_wq, &state->commit_work); 275cf1b372eSEric Anholt else 276cf1b372eSEric Anholt vc4_atomic_complete_commit(state); 277b501baccSEric Anholt 278b501baccSEric Anholt return 0; 279b501baccSEric Anholt } 280b501baccSEric Anholt 28183753117SEric Anholt static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev, 28283753117SEric Anholt struct drm_file *file_priv, 28383753117SEric Anholt const struct drm_mode_fb_cmd2 *mode_cmd) 28483753117SEric Anholt { 28583753117SEric Anholt struct drm_mode_fb_cmd2 mode_cmd_local; 28683753117SEric Anholt 28783753117SEric Anholt /* If the user didn't specify a modifier, use the 28883753117SEric Anholt * vc4_set_tiling_ioctl() state for the BO. 28983753117SEric Anholt */ 29083753117SEric Anholt if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) { 29183753117SEric Anholt struct drm_gem_object *gem_obj; 29283753117SEric Anholt struct vc4_bo *bo; 29383753117SEric Anholt 29483753117SEric Anholt gem_obj = drm_gem_object_lookup(file_priv, 29583753117SEric Anholt mode_cmd->handles[0]); 29683753117SEric Anholt if (!gem_obj) { 297fb95992aSEric Anholt DRM_DEBUG("Failed to look up GEM BO %d\n", 29883753117SEric Anholt mode_cmd->handles[0]); 29983753117SEric Anholt return ERR_PTR(-ENOENT); 30083753117SEric Anholt } 30183753117SEric Anholt bo = to_vc4_bo(gem_obj); 30283753117SEric Anholt 30383753117SEric Anholt mode_cmd_local = *mode_cmd; 30483753117SEric Anholt 30583753117SEric Anholt if (bo->t_format) { 30683753117SEric Anholt mode_cmd_local.modifier[0] = 30783753117SEric Anholt DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED; 30883753117SEric Anholt } else { 30983753117SEric Anholt mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE; 31083753117SEric Anholt } 31183753117SEric Anholt 3121d5494e9SCihangir Akturk drm_gem_object_put_unlocked(gem_obj); 31383753117SEric Anholt 31483753117SEric Anholt mode_cmd = &mode_cmd_local; 31583753117SEric Anholt } 31683753117SEric Anholt 3179762477cSNoralf Trønnes return drm_gem_fb_create(dev, file_priv, mode_cmd); 31883753117SEric Anholt } 31983753117SEric Anholt 320766cc6b1SStefan Schake /* Our CTM has some peculiar limitations: we can only enable it for one CRTC 321766cc6b1SStefan Schake * at a time and the HW only supports S0.9 scalars. To account for the latter, 322766cc6b1SStefan Schake * we don't allow userland to set a CTM that we have no hope of approximating. 323766cc6b1SStefan Schake */ 324766cc6b1SStefan Schake static int 325766cc6b1SStefan Schake vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) 326766cc6b1SStefan Schake { 327766cc6b1SStefan Schake struct vc4_dev *vc4 = to_vc4_dev(dev); 328766cc6b1SStefan Schake struct vc4_ctm_state *ctm_state = NULL; 329766cc6b1SStefan Schake struct drm_crtc *crtc; 330766cc6b1SStefan Schake struct drm_crtc_state *old_crtc_state, *new_crtc_state; 331766cc6b1SStefan Schake struct drm_color_ctm *ctm; 332766cc6b1SStefan Schake int i; 333766cc6b1SStefan Schake 334766cc6b1SStefan Schake for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { 335766cc6b1SStefan Schake /* CTM is being disabled. */ 336766cc6b1SStefan Schake if (!new_crtc_state->ctm && old_crtc_state->ctm) { 337766cc6b1SStefan Schake ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager); 338766cc6b1SStefan Schake if (IS_ERR(ctm_state)) 339766cc6b1SStefan Schake return PTR_ERR(ctm_state); 340766cc6b1SStefan Schake ctm_state->fifo = 0; 341766cc6b1SStefan Schake } 342766cc6b1SStefan Schake } 343766cc6b1SStefan Schake 344766cc6b1SStefan Schake for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { 345766cc6b1SStefan Schake if (new_crtc_state->ctm == old_crtc_state->ctm) 346766cc6b1SStefan Schake continue; 347766cc6b1SStefan Schake 348766cc6b1SStefan Schake if (!ctm_state) { 349766cc6b1SStefan Schake ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager); 350766cc6b1SStefan Schake if (IS_ERR(ctm_state)) 351766cc6b1SStefan Schake return PTR_ERR(ctm_state); 352766cc6b1SStefan Schake } 353766cc6b1SStefan Schake 354766cc6b1SStefan Schake /* CTM is being enabled or the matrix changed. */ 355766cc6b1SStefan Schake if (new_crtc_state->ctm) { 356766cc6b1SStefan Schake /* fifo is 1-based since 0 disables CTM. */ 357766cc6b1SStefan Schake int fifo = to_vc4_crtc(crtc)->channel + 1; 358766cc6b1SStefan Schake 359766cc6b1SStefan Schake /* Check userland isn't trying to turn on CTM for more 360766cc6b1SStefan Schake * than one CRTC at a time. 361766cc6b1SStefan Schake */ 362766cc6b1SStefan Schake if (ctm_state->fifo && ctm_state->fifo != fifo) { 363766cc6b1SStefan Schake DRM_DEBUG_DRIVER("Too many CTM configured\n"); 364766cc6b1SStefan Schake return -EINVAL; 365766cc6b1SStefan Schake } 366766cc6b1SStefan Schake 367766cc6b1SStefan Schake /* Check we can approximate the specified CTM. 368766cc6b1SStefan Schake * We disallow scalars |c| > 1.0 since the HW has 369766cc6b1SStefan Schake * no integer bits. 370766cc6b1SStefan Schake */ 371766cc6b1SStefan Schake ctm = new_crtc_state->ctm->data; 372766cc6b1SStefan Schake for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) { 373766cc6b1SStefan Schake u64 val = ctm->matrix[i]; 374766cc6b1SStefan Schake 375766cc6b1SStefan Schake val &= ~BIT_ULL(63); 376766cc6b1SStefan Schake if (val > BIT_ULL(32)) 377766cc6b1SStefan Schake return -EINVAL; 378766cc6b1SStefan Schake } 379766cc6b1SStefan Schake 380766cc6b1SStefan Schake ctm_state->fifo = fifo; 381766cc6b1SStefan Schake ctm_state->ctm = ctm; 382766cc6b1SStefan Schake } 383766cc6b1SStefan Schake } 384766cc6b1SStefan Schake 385766cc6b1SStefan Schake return 0; 386766cc6b1SStefan Schake } 387766cc6b1SStefan Schake 388766cc6b1SStefan Schake static int 389766cc6b1SStefan Schake vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) 390766cc6b1SStefan Schake { 391766cc6b1SStefan Schake int ret; 392766cc6b1SStefan Schake 393766cc6b1SStefan Schake ret = vc4_ctm_atomic_check(dev, state); 394766cc6b1SStefan Schake if (ret < 0) 395766cc6b1SStefan Schake return ret; 396766cc6b1SStefan Schake 397766cc6b1SStefan Schake return drm_atomic_helper_check(dev, state); 398766cc6b1SStefan Schake } 399766cc6b1SStefan Schake 400c8b75bcaSEric Anholt static const struct drm_mode_config_funcs vc4_mode_funcs = { 401766cc6b1SStefan Schake .atomic_check = vc4_atomic_check, 402b501baccSEric Anholt .atomic_commit = vc4_atomic_commit, 40383753117SEric Anholt .fb_create = vc4_fb_create, 404c8b75bcaSEric Anholt }; 405c8b75bcaSEric Anholt 406c8b75bcaSEric Anholt int vc4_kms_load(struct drm_device *dev) 407c8b75bcaSEric Anholt { 40848666d56SDerek Foreman struct vc4_dev *vc4 = to_vc4_dev(dev); 409766cc6b1SStefan Schake struct vc4_ctm_state *ctm_state; 410c8b75bcaSEric Anholt int ret; 411c8b75bcaSEric Anholt 412b501baccSEric Anholt sema_init(&vc4->async_modeset, 1); 413b501baccSEric Anholt 4147d2818f5SMario Kleiner /* Set support for vblank irq fast disable, before drm_vblank_init() */ 4157d2818f5SMario Kleiner dev->vblank_disable_immediate = true; 4167d2818f5SMario Kleiner 417c8b75bcaSEric Anholt ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 418c8b75bcaSEric Anholt if (ret < 0) { 419c8b75bcaSEric Anholt dev_err(dev->dev, "failed to initialize vblank\n"); 420c8b75bcaSEric Anholt return ret; 421c8b75bcaSEric Anholt } 422c8b75bcaSEric Anholt 423c8b75bcaSEric Anholt dev->mode_config.max_width = 2048; 424c8b75bcaSEric Anholt dev->mode_config.max_height = 2048; 425c8b75bcaSEric Anholt dev->mode_config.funcs = &vc4_mode_funcs; 426c8b75bcaSEric Anholt dev->mode_config.preferred_depth = 24; 427b501baccSEric Anholt dev->mode_config.async_page_flip = true; 428423ad7b3SDaniel Stone dev->mode_config.allow_fb_modifiers = true; 429b501baccSEric Anholt 430766cc6b1SStefan Schake drm_modeset_lock_init(&vc4->ctm_state_lock); 431766cc6b1SStefan Schake 432766cc6b1SStefan Schake ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL); 433766cc6b1SStefan Schake if (!ctm_state) 434766cc6b1SStefan Schake return -ENOMEM; 435b962a120SRob Clark 436b962a120SRob Clark drm_atomic_private_obj_init(dev, &vc4->ctm_manager, &ctm_state->base, 437766cc6b1SStefan Schake &vc4_ctm_state_funcs); 438766cc6b1SStefan Schake 439c8b75bcaSEric Anholt drm_mode_config_reset(dev); 440c8b75bcaSEric Anholt 441c8b75bcaSEric Anholt drm_kms_helper_poll_init(dev); 442c8b75bcaSEric Anholt 443c8b75bcaSEric Anholt return 0; 444c8b75bcaSEric Anholt } 445