xref: /openbmc/linux/drivers/gpu/drm/vc4/vc4_kms.c (revision 6b5c029d)
1c8b75bcaSEric Anholt /*
2c8b75bcaSEric Anholt  * Copyright (C) 2015 Broadcom
3c8b75bcaSEric Anholt  *
4c8b75bcaSEric Anholt  * This program is free software; you can redistribute it and/or modify
5c8b75bcaSEric Anholt  * it under the terms of the GNU General Public License version 2 as
6c8b75bcaSEric Anholt  * published by the Free Software Foundation.
7c8b75bcaSEric Anholt  */
8c8b75bcaSEric Anholt 
9c8b75bcaSEric Anholt /**
10c8b75bcaSEric Anholt  * DOC: VC4 KMS
11c8b75bcaSEric Anholt  *
12c8b75bcaSEric Anholt  * This is the general code for implementing KMS mode setting that
13c8b75bcaSEric Anholt  * doesn't clearly associate with any of the other objects (plane,
14c8b75bcaSEric Anholt  * crtc, HDMI encoder).
15c8b75bcaSEric Anholt  */
16c8b75bcaSEric Anholt 
17b7e8e25bSMasahiro Yamada #include <drm/drm_crtc.h>
18b7e8e25bSMasahiro Yamada #include <drm/drm_atomic.h>
19b7e8e25bSMasahiro Yamada #include <drm/drm_atomic_helper.h>
209762477cSNoralf Trønnes #include <drm/drm_gem_framebuffer_helper.h>
21fcd70cd3SDaniel Vetter #include <drm/drm_plane_helper.h>
22fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h>
23c8b75bcaSEric Anholt #include "vc4_drv.h"
24766cc6b1SStefan Schake #include "vc4_regs.h"
25766cc6b1SStefan Schake 
26766cc6b1SStefan Schake struct vc4_ctm_state {
27766cc6b1SStefan Schake 	struct drm_private_state base;
28766cc6b1SStefan Schake 	struct drm_color_ctm *ctm;
29766cc6b1SStefan Schake 	int fifo;
30766cc6b1SStefan Schake };
31766cc6b1SStefan Schake 
32766cc6b1SStefan Schake static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
33766cc6b1SStefan Schake {
34766cc6b1SStefan Schake 	return container_of(priv, struct vc4_ctm_state, base);
35766cc6b1SStefan Schake }
36766cc6b1SStefan Schake 
374686da83SBoris Brezillon struct vc4_load_tracker_state {
384686da83SBoris Brezillon 	struct drm_private_state base;
394686da83SBoris Brezillon 	u64 hvs_load;
404686da83SBoris Brezillon 	u64 membus_load;
414686da83SBoris Brezillon };
424686da83SBoris Brezillon 
434686da83SBoris Brezillon static struct vc4_load_tracker_state *
444686da83SBoris Brezillon to_vc4_load_tracker_state(struct drm_private_state *priv)
454686da83SBoris Brezillon {
464686da83SBoris Brezillon 	return container_of(priv, struct vc4_load_tracker_state, base);
474686da83SBoris Brezillon }
484686da83SBoris Brezillon 
49766cc6b1SStefan Schake static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state,
50766cc6b1SStefan Schake 					       struct drm_private_obj *manager)
51766cc6b1SStefan Schake {
52766cc6b1SStefan Schake 	struct drm_device *dev = state->dev;
53766cc6b1SStefan Schake 	struct vc4_dev *vc4 = dev->dev_private;
54766cc6b1SStefan Schake 	struct drm_private_state *priv_state;
55766cc6b1SStefan Schake 	int ret;
56766cc6b1SStefan Schake 
57766cc6b1SStefan Schake 	ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx);
58766cc6b1SStefan Schake 	if (ret)
59766cc6b1SStefan Schake 		return ERR_PTR(ret);
60766cc6b1SStefan Schake 
61766cc6b1SStefan Schake 	priv_state = drm_atomic_get_private_obj_state(state, manager);
62766cc6b1SStefan Schake 	if (IS_ERR(priv_state))
63766cc6b1SStefan Schake 		return ERR_CAST(priv_state);
64766cc6b1SStefan Schake 
65766cc6b1SStefan Schake 	return to_vc4_ctm_state(priv_state);
66766cc6b1SStefan Schake }
67766cc6b1SStefan Schake 
68766cc6b1SStefan Schake static struct drm_private_state *
69766cc6b1SStefan Schake vc4_ctm_duplicate_state(struct drm_private_obj *obj)
70766cc6b1SStefan Schake {
71766cc6b1SStefan Schake 	struct vc4_ctm_state *state;
72766cc6b1SStefan Schake 
73766cc6b1SStefan Schake 	state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
74766cc6b1SStefan Schake 	if (!state)
75766cc6b1SStefan Schake 		return NULL;
76766cc6b1SStefan Schake 
77766cc6b1SStefan Schake 	__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
78766cc6b1SStefan Schake 
79766cc6b1SStefan Schake 	return &state->base;
80766cc6b1SStefan Schake }
81766cc6b1SStefan Schake 
82766cc6b1SStefan Schake static void vc4_ctm_destroy_state(struct drm_private_obj *obj,
83766cc6b1SStefan Schake 				  struct drm_private_state *state)
84766cc6b1SStefan Schake {
85766cc6b1SStefan Schake 	struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state);
86766cc6b1SStefan Schake 
87766cc6b1SStefan Schake 	kfree(ctm_state);
88766cc6b1SStefan Schake }
89766cc6b1SStefan Schake 
90766cc6b1SStefan Schake static const struct drm_private_state_funcs vc4_ctm_state_funcs = {
91766cc6b1SStefan Schake 	.atomic_duplicate_state = vc4_ctm_duplicate_state,
92766cc6b1SStefan Schake 	.atomic_destroy_state = vc4_ctm_destroy_state,
93766cc6b1SStefan Schake };
94766cc6b1SStefan Schake 
95766cc6b1SStefan Schake /* Converts a DRM S31.32 value to the HW S0.9 format. */
96766cc6b1SStefan Schake static u16 vc4_ctm_s31_32_to_s0_9(u64 in)
97766cc6b1SStefan Schake {
98766cc6b1SStefan Schake 	u16 r;
99766cc6b1SStefan Schake 
100766cc6b1SStefan Schake 	/* Sign bit. */
101766cc6b1SStefan Schake 	r = in & BIT_ULL(63) ? BIT(9) : 0;
102766cc6b1SStefan Schake 
103766cc6b1SStefan Schake 	if ((in & GENMASK_ULL(62, 32)) > 0) {
104766cc6b1SStefan Schake 		/* We have zero integer bits so we can only saturate here. */
105766cc6b1SStefan Schake 		r |= GENMASK(8, 0);
106766cc6b1SStefan Schake 	} else {
107766cc6b1SStefan Schake 		/* Otherwise take the 9 most important fractional bits. */
108766cc6b1SStefan Schake 		r |= (in >> 23) & GENMASK(8, 0);
109766cc6b1SStefan Schake 	}
110766cc6b1SStefan Schake 
111766cc6b1SStefan Schake 	return r;
112766cc6b1SStefan Schake }
113766cc6b1SStefan Schake 
114766cc6b1SStefan Schake static void
115766cc6b1SStefan Schake vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state)
116766cc6b1SStefan Schake {
117766cc6b1SStefan Schake 	struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state);
118766cc6b1SStefan Schake 	struct drm_color_ctm *ctm = ctm_state->ctm;
119766cc6b1SStefan Schake 
120766cc6b1SStefan Schake 	if (ctm_state->fifo) {
121766cc6b1SStefan Schake 		HVS_WRITE(SCALER_OLEDCOEF2,
122766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]),
123766cc6b1SStefan Schake 					SCALER_OLEDCOEF2_R_TO_R) |
124766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]),
125766cc6b1SStefan Schake 					SCALER_OLEDCOEF2_R_TO_G) |
126766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]),
127766cc6b1SStefan Schake 					SCALER_OLEDCOEF2_R_TO_B));
128766cc6b1SStefan Schake 		HVS_WRITE(SCALER_OLEDCOEF1,
129766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]),
130766cc6b1SStefan Schake 					SCALER_OLEDCOEF1_G_TO_R) |
131766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]),
132766cc6b1SStefan Schake 					SCALER_OLEDCOEF1_G_TO_G) |
133766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]),
134766cc6b1SStefan Schake 					SCALER_OLEDCOEF1_G_TO_B));
135766cc6b1SStefan Schake 		HVS_WRITE(SCALER_OLEDCOEF0,
136766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]),
137766cc6b1SStefan Schake 					SCALER_OLEDCOEF0_B_TO_R) |
138766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]),
139766cc6b1SStefan Schake 					SCALER_OLEDCOEF0_B_TO_G) |
140766cc6b1SStefan Schake 			  VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]),
141766cc6b1SStefan Schake 					SCALER_OLEDCOEF0_B_TO_B));
142766cc6b1SStefan Schake 	}
143766cc6b1SStefan Schake 
144766cc6b1SStefan Schake 	HVS_WRITE(SCALER_OLEDOFFS,
145766cc6b1SStefan Schake 		  VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
146766cc6b1SStefan Schake }
147c8b75bcaSEric Anholt 
148b501baccSEric Anholt static void
149cf1b372eSEric Anholt vc4_atomic_complete_commit(struct drm_atomic_state *state)
150b501baccSEric Anholt {
151b501baccSEric Anholt 	struct drm_device *dev = state->dev;
152b501baccSEric Anholt 	struct vc4_dev *vc4 = to_vc4_dev(dev);
153531a1b62SBoris Brezillon 	struct vc4_crtc *vc4_crtc;
154531a1b62SBoris Brezillon 	int i;
155531a1b62SBoris Brezillon 
156531a1b62SBoris Brezillon 	for (i = 0; i < dev->mode_config.num_crtc; i++) {
157531a1b62SBoris Brezillon 		if (!state->crtcs[i].ptr || !state->crtcs[i].commit)
158531a1b62SBoris Brezillon 			continue;
159531a1b62SBoris Brezillon 
160531a1b62SBoris Brezillon 		vc4_crtc = to_vc4_crtc(state->crtcs[i].ptr);
161531a1b62SBoris Brezillon 		vc4_hvs_mask_underrun(dev, vc4_crtc->channel);
162531a1b62SBoris Brezillon 	}
163b501baccSEric Anholt 
16434c8ea40SBoris Brezillon 	drm_atomic_helper_wait_for_fences(dev, state, false);
16534c8ea40SBoris Brezillon 
16634c8ea40SBoris Brezillon 	drm_atomic_helper_wait_for_dependencies(state);
16734c8ea40SBoris Brezillon 
168b501baccSEric Anholt 	drm_atomic_helper_commit_modeset_disables(dev, state);
169b501baccSEric Anholt 
170766cc6b1SStefan Schake 	vc4_ctm_commit(vc4, state);
171766cc6b1SStefan Schake 
1722b58e98dSLiu Ying 	drm_atomic_helper_commit_planes(dev, state, 0);
173b501baccSEric Anholt 
174b501baccSEric Anholt 	drm_atomic_helper_commit_modeset_enables(dev, state);
175b501baccSEric Anholt 
1761ebe99a7SBoris Brezillon 	drm_atomic_helper_fake_vblank(state);
1771ebe99a7SBoris Brezillon 
17834c8ea40SBoris Brezillon 	drm_atomic_helper_commit_hw_done(state);
17934c8ea40SBoris Brezillon 
180184d3cf4SBoris Brezillon 	drm_atomic_helper_wait_for_flip_done(dev, state);
181b501baccSEric Anholt 
182b501baccSEric Anholt 	drm_atomic_helper_cleanup_planes(dev, state);
183b501baccSEric Anholt 
18434c8ea40SBoris Brezillon 	drm_atomic_helper_commit_cleanup_done(state);
18534c8ea40SBoris Brezillon 
1860853695cSChris Wilson 	drm_atomic_state_put(state);
187b501baccSEric Anholt 
188b501baccSEric Anholt 	up(&vc4->async_modeset);
189b501baccSEric Anholt }
190b501baccSEric Anholt 
191cf1b372eSEric Anholt static void commit_work(struct work_struct *work)
192b501baccSEric Anholt {
193cf1b372eSEric Anholt 	struct drm_atomic_state *state = container_of(work,
194cf1b372eSEric Anholt 						      struct drm_atomic_state,
195cf1b372eSEric Anholt 						      commit_work);
196cf1b372eSEric Anholt 	vc4_atomic_complete_commit(state);
197b501baccSEric Anholt }
198b501baccSEric Anholt 
199b501baccSEric Anholt /**
200b501baccSEric Anholt  * vc4_atomic_commit - commit validated state object
201b501baccSEric Anholt  * @dev: DRM device
202b501baccSEric Anholt  * @state: the driver state object
203eb63961bSMaarten Lankhorst  * @nonblock: nonblocking commit
204b501baccSEric Anholt  *
205b501baccSEric Anholt  * This function commits a with drm_atomic_helper_check() pre-validated state
206b501baccSEric Anholt  * object. This can still fail when e.g. the framebuffer reservation fails. For
207b501baccSEric Anholt  * now this doesn't implement asynchronous commits.
208b501baccSEric Anholt  *
209b501baccSEric Anholt  * RETURNS
210b501baccSEric Anholt  * Zero for success or -errno.
211b501baccSEric Anholt  */
212b501baccSEric Anholt static int vc4_atomic_commit(struct drm_device *dev,
213b501baccSEric Anholt 			     struct drm_atomic_state *state,
214eb63961bSMaarten Lankhorst 			     bool nonblock)
215b501baccSEric Anholt {
216b501baccSEric Anholt 	struct vc4_dev *vc4 = to_vc4_dev(dev);
217b501baccSEric Anholt 	int ret;
218b501baccSEric Anholt 
219539c320bSGustavo Padovan 	if (state->async_update) {
220539c320bSGustavo Padovan 		ret = down_interruptible(&vc4->async_modeset);
221539c320bSGustavo Padovan 		if (ret)
222539c320bSGustavo Padovan 			return ret;
223539c320bSGustavo Padovan 
224539c320bSGustavo Padovan 		ret = drm_atomic_helper_prepare_planes(dev, state);
225539c320bSGustavo Padovan 		if (ret) {
226539c320bSGustavo Padovan 			up(&vc4->async_modeset);
227539c320bSGustavo Padovan 			return ret;
228539c320bSGustavo Padovan 		}
229539c320bSGustavo Padovan 
230539c320bSGustavo Padovan 		drm_atomic_helper_async_commit(dev, state);
231539c320bSGustavo Padovan 
232539c320bSGustavo Padovan 		drm_atomic_helper_cleanup_planes(dev, state);
233539c320bSGustavo Padovan 
234539c320bSGustavo Padovan 		up(&vc4->async_modeset);
235539c320bSGustavo Padovan 
236539c320bSGustavo Padovan 		return 0;
237539c320bSGustavo Padovan 	}
238539c320bSGustavo Padovan 
239fcc86cb4SBoris Brezillon 	/* We know for sure we don't want an async update here. Set
240fcc86cb4SBoris Brezillon 	 * state->legacy_cursor_update to false to prevent
241fcc86cb4SBoris Brezillon 	 * drm_atomic_helper_setup_commit() from auto-completing
242fcc86cb4SBoris Brezillon 	 * commit->flip_done.
243fcc86cb4SBoris Brezillon 	 */
244fcc86cb4SBoris Brezillon 	state->legacy_cursor_update = false;
24534c8ea40SBoris Brezillon 	ret = drm_atomic_helper_setup_commit(state, nonblock);
24634c8ea40SBoris Brezillon 	if (ret)
24734c8ea40SBoris Brezillon 		return ret;
24826fc78f6SDerek Foreman 
249cf1b372eSEric Anholt 	INIT_WORK(&state->commit_work, commit_work);
250cf1b372eSEric Anholt 
251b501baccSEric Anholt 	ret = down_interruptible(&vc4->async_modeset);
252cf1b372eSEric Anholt 	if (ret)
253b501baccSEric Anholt 		return ret;
254b501baccSEric Anholt 
255b501baccSEric Anholt 	ret = drm_atomic_helper_prepare_planes(dev, state);
256b501baccSEric Anholt 	if (ret) {
257b501baccSEric Anholt 		up(&vc4->async_modeset);
258b501baccSEric Anholt 		return ret;
259b501baccSEric Anholt 	}
260b501baccSEric Anholt 
26153ad0694SEric Anholt 	if (!nonblock) {
26253ad0694SEric Anholt 		ret = drm_atomic_helper_wait_for_fences(dev, state, true);
26353ad0694SEric Anholt 		if (ret) {
26453ad0694SEric Anholt 			drm_atomic_helper_cleanup_planes(dev, state);
26553ad0694SEric Anholt 			up(&vc4->async_modeset);
26653ad0694SEric Anholt 			return ret;
26753ad0694SEric Anholt 		}
26853ad0694SEric Anholt 	}
26953ad0694SEric Anholt 
270b501baccSEric Anholt 	/*
271b501baccSEric Anholt 	 * This is the point of no return - everything below never fails except
272b501baccSEric Anholt 	 * when the hw goes bonghits. Which means we can commit the new state on
273b501baccSEric Anholt 	 * the software side now.
274b501baccSEric Anholt 	 */
275b501baccSEric Anholt 
276d68bc0e7SMaarten Lankhorst 	BUG_ON(drm_atomic_helper_swap_state(state, false) < 0);
277b501baccSEric Anholt 
278b501baccSEric Anholt 	/*
279b501baccSEric Anholt 	 * Everything below can be run asynchronously without the need to grab
280b501baccSEric Anholt 	 * any modeset locks at all under one condition: It must be guaranteed
281b501baccSEric Anholt 	 * that the asynchronous work has either been cancelled (if the driver
282b501baccSEric Anholt 	 * supports it, which at least requires that the framebuffers get
283b501baccSEric Anholt 	 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
284b501baccSEric Anholt 	 * before the new state gets committed on the software side with
285b501baccSEric Anholt 	 * drm_atomic_helper_swap_state().
286b501baccSEric Anholt 	 *
287b501baccSEric Anholt 	 * This scheme allows new atomic state updates to be prepared and
288b501baccSEric Anholt 	 * checked in parallel to the asynchronous completion of the previous
289b501baccSEric Anholt 	 * update. Which is important since compositors need to figure out the
290b501baccSEric Anholt 	 * composition of the next frame right after having submitted the
291b501baccSEric Anholt 	 * current layout.
292b501baccSEric Anholt 	 */
293b501baccSEric Anholt 
2940853695cSChris Wilson 	drm_atomic_state_get(state);
295cf1b372eSEric Anholt 	if (nonblock)
296cf1b372eSEric Anholt 		queue_work(system_unbound_wq, &state->commit_work);
297cf1b372eSEric Anholt 	else
298cf1b372eSEric Anholt 		vc4_atomic_complete_commit(state);
299b501baccSEric Anholt 
300b501baccSEric Anholt 	return 0;
301b501baccSEric Anholt }
302b501baccSEric Anholt 
30383753117SEric Anholt static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev,
30483753117SEric Anholt 					     struct drm_file *file_priv,
30583753117SEric Anholt 					     const struct drm_mode_fb_cmd2 *mode_cmd)
30683753117SEric Anholt {
30783753117SEric Anholt 	struct drm_mode_fb_cmd2 mode_cmd_local;
30883753117SEric Anholt 
30983753117SEric Anholt 	/* If the user didn't specify a modifier, use the
31083753117SEric Anholt 	 * vc4_set_tiling_ioctl() state for the BO.
31183753117SEric Anholt 	 */
31283753117SEric Anholt 	if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
31383753117SEric Anholt 		struct drm_gem_object *gem_obj;
31483753117SEric Anholt 		struct vc4_bo *bo;
31583753117SEric Anholt 
31683753117SEric Anholt 		gem_obj = drm_gem_object_lookup(file_priv,
31783753117SEric Anholt 						mode_cmd->handles[0]);
31883753117SEric Anholt 		if (!gem_obj) {
319fb95992aSEric Anholt 			DRM_DEBUG("Failed to look up GEM BO %d\n",
32083753117SEric Anholt 				  mode_cmd->handles[0]);
32183753117SEric Anholt 			return ERR_PTR(-ENOENT);
32283753117SEric Anholt 		}
32383753117SEric Anholt 		bo = to_vc4_bo(gem_obj);
32483753117SEric Anholt 
32583753117SEric Anholt 		mode_cmd_local = *mode_cmd;
32683753117SEric Anholt 
32783753117SEric Anholt 		if (bo->t_format) {
32883753117SEric Anholt 			mode_cmd_local.modifier[0] =
32983753117SEric Anholt 				DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
33083753117SEric Anholt 		} else {
33183753117SEric Anholt 			mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE;
33283753117SEric Anholt 		}
33383753117SEric Anholt 
3341d5494e9SCihangir Akturk 		drm_gem_object_put_unlocked(gem_obj);
33583753117SEric Anholt 
33683753117SEric Anholt 		mode_cmd = &mode_cmd_local;
33783753117SEric Anholt 	}
33883753117SEric Anholt 
3399762477cSNoralf Trønnes 	return drm_gem_fb_create(dev, file_priv, mode_cmd);
34083753117SEric Anholt }
34183753117SEric Anholt 
342766cc6b1SStefan Schake /* Our CTM has some peculiar limitations: we can only enable it for one CRTC
343766cc6b1SStefan Schake  * at a time and the HW only supports S0.9 scalars. To account for the latter,
344766cc6b1SStefan Schake  * we don't allow userland to set a CTM that we have no hope of approximating.
345766cc6b1SStefan Schake  */
346766cc6b1SStefan Schake static int
347766cc6b1SStefan Schake vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
348766cc6b1SStefan Schake {
349766cc6b1SStefan Schake 	struct vc4_dev *vc4 = to_vc4_dev(dev);
350766cc6b1SStefan Schake 	struct vc4_ctm_state *ctm_state = NULL;
351766cc6b1SStefan Schake 	struct drm_crtc *crtc;
352766cc6b1SStefan Schake 	struct drm_crtc_state *old_crtc_state, *new_crtc_state;
353766cc6b1SStefan Schake 	struct drm_color_ctm *ctm;
354766cc6b1SStefan Schake 	int i;
355766cc6b1SStefan Schake 
356766cc6b1SStefan Schake 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
357766cc6b1SStefan Schake 		/* CTM is being disabled. */
358766cc6b1SStefan Schake 		if (!new_crtc_state->ctm && old_crtc_state->ctm) {
359766cc6b1SStefan Schake 			ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
360766cc6b1SStefan Schake 			if (IS_ERR(ctm_state))
361766cc6b1SStefan Schake 				return PTR_ERR(ctm_state);
362766cc6b1SStefan Schake 			ctm_state->fifo = 0;
363766cc6b1SStefan Schake 		}
364766cc6b1SStefan Schake 	}
365766cc6b1SStefan Schake 
366766cc6b1SStefan Schake 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
367766cc6b1SStefan Schake 		if (new_crtc_state->ctm == old_crtc_state->ctm)
368766cc6b1SStefan Schake 			continue;
369766cc6b1SStefan Schake 
370766cc6b1SStefan Schake 		if (!ctm_state) {
371766cc6b1SStefan Schake 			ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
372766cc6b1SStefan Schake 			if (IS_ERR(ctm_state))
373766cc6b1SStefan Schake 				return PTR_ERR(ctm_state);
374766cc6b1SStefan Schake 		}
375766cc6b1SStefan Schake 
376766cc6b1SStefan Schake 		/* CTM is being enabled or the matrix changed. */
377766cc6b1SStefan Schake 		if (new_crtc_state->ctm) {
378766cc6b1SStefan Schake 			/* fifo is 1-based since 0 disables CTM. */
379766cc6b1SStefan Schake 			int fifo = to_vc4_crtc(crtc)->channel + 1;
380766cc6b1SStefan Schake 
381766cc6b1SStefan Schake 			/* Check userland isn't trying to turn on CTM for more
382766cc6b1SStefan Schake 			 * than one CRTC at a time.
383766cc6b1SStefan Schake 			 */
384766cc6b1SStefan Schake 			if (ctm_state->fifo && ctm_state->fifo != fifo) {
385766cc6b1SStefan Schake 				DRM_DEBUG_DRIVER("Too many CTM configured\n");
386766cc6b1SStefan Schake 				return -EINVAL;
387766cc6b1SStefan Schake 			}
388766cc6b1SStefan Schake 
389766cc6b1SStefan Schake 			/* Check we can approximate the specified CTM.
390766cc6b1SStefan Schake 			 * We disallow scalars |c| > 1.0 since the HW has
391766cc6b1SStefan Schake 			 * no integer bits.
392766cc6b1SStefan Schake 			 */
393766cc6b1SStefan Schake 			ctm = new_crtc_state->ctm->data;
394766cc6b1SStefan Schake 			for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) {
395766cc6b1SStefan Schake 				u64 val = ctm->matrix[i];
396766cc6b1SStefan Schake 
397766cc6b1SStefan Schake 				val &= ~BIT_ULL(63);
398766cc6b1SStefan Schake 				if (val > BIT_ULL(32))
399766cc6b1SStefan Schake 					return -EINVAL;
400766cc6b1SStefan Schake 			}
401766cc6b1SStefan Schake 
402766cc6b1SStefan Schake 			ctm_state->fifo = fifo;
403766cc6b1SStefan Schake 			ctm_state->ctm = ctm;
404766cc6b1SStefan Schake 		}
405766cc6b1SStefan Schake 	}
406766cc6b1SStefan Schake 
407766cc6b1SStefan Schake 	return 0;
408766cc6b1SStefan Schake }
409766cc6b1SStefan Schake 
4104686da83SBoris Brezillon static int vc4_load_tracker_atomic_check(struct drm_atomic_state *state)
4114686da83SBoris Brezillon {
4124686da83SBoris Brezillon 	struct drm_plane_state *old_plane_state, *new_plane_state;
4134686da83SBoris Brezillon 	struct vc4_dev *vc4 = to_vc4_dev(state->dev);
4144686da83SBoris Brezillon 	struct vc4_load_tracker_state *load_state;
4154686da83SBoris Brezillon 	struct drm_private_state *priv_state;
4164686da83SBoris Brezillon 	struct drm_plane *plane;
4174686da83SBoris Brezillon 	int i;
4184686da83SBoris Brezillon 
4194686da83SBoris Brezillon 	priv_state = drm_atomic_get_private_obj_state(state,
4204686da83SBoris Brezillon 						      &vc4->load_tracker);
4214686da83SBoris Brezillon 	if (IS_ERR(priv_state))
4224686da83SBoris Brezillon 		return PTR_ERR(priv_state);
4234686da83SBoris Brezillon 
4244686da83SBoris Brezillon 	load_state = to_vc4_load_tracker_state(priv_state);
4254686da83SBoris Brezillon 	for_each_oldnew_plane_in_state(state, plane, old_plane_state,
4264686da83SBoris Brezillon 				       new_plane_state, i) {
4274686da83SBoris Brezillon 		struct vc4_plane_state *vc4_plane_state;
4284686da83SBoris Brezillon 
4294686da83SBoris Brezillon 		if (old_plane_state->fb && old_plane_state->crtc) {
4304686da83SBoris Brezillon 			vc4_plane_state = to_vc4_plane_state(old_plane_state);
4314686da83SBoris Brezillon 			load_state->membus_load -= vc4_plane_state->membus_load;
4324686da83SBoris Brezillon 			load_state->hvs_load -= vc4_plane_state->hvs_load;
4334686da83SBoris Brezillon 		}
4344686da83SBoris Brezillon 
4354686da83SBoris Brezillon 		if (new_plane_state->fb && new_plane_state->crtc) {
4364686da83SBoris Brezillon 			vc4_plane_state = to_vc4_plane_state(new_plane_state);
4374686da83SBoris Brezillon 			load_state->membus_load += vc4_plane_state->membus_load;
4384686da83SBoris Brezillon 			load_state->hvs_load += vc4_plane_state->hvs_load;
4394686da83SBoris Brezillon 		}
4404686da83SBoris Brezillon 	}
4414686da83SBoris Brezillon 
4426b5c029dSPaul Kocialkowski 	/* Don't check the load when the tracker is disabled. */
4436b5c029dSPaul Kocialkowski 	if (!vc4->load_tracker_enabled)
4446b5c029dSPaul Kocialkowski 		return 0;
4456b5c029dSPaul Kocialkowski 
4464686da83SBoris Brezillon 	/* The absolute limit is 2Gbyte/sec, but let's take a margin to let
4474686da83SBoris Brezillon 	 * the system work when other blocks are accessing the memory.
4484686da83SBoris Brezillon 	 */
4494686da83SBoris Brezillon 	if (load_state->membus_load > SZ_1G + SZ_512M)
4504686da83SBoris Brezillon 		return -ENOSPC;
4514686da83SBoris Brezillon 
4524686da83SBoris Brezillon 	/* HVS clock is supposed to run @ 250Mhz, let's take a margin and
4534686da83SBoris Brezillon 	 * consider the maximum number of cycles is 240M.
4544686da83SBoris Brezillon 	 */
4554686da83SBoris Brezillon 	if (load_state->hvs_load > 240000000ULL)
4564686da83SBoris Brezillon 		return -ENOSPC;
4574686da83SBoris Brezillon 
4584686da83SBoris Brezillon 	return 0;
4594686da83SBoris Brezillon }
4604686da83SBoris Brezillon 
4614686da83SBoris Brezillon static struct drm_private_state *
4624686da83SBoris Brezillon vc4_load_tracker_duplicate_state(struct drm_private_obj *obj)
4634686da83SBoris Brezillon {
4644686da83SBoris Brezillon 	struct vc4_load_tracker_state *state;
4654686da83SBoris Brezillon 
4664686da83SBoris Brezillon 	state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
4674686da83SBoris Brezillon 	if (!state)
4684686da83SBoris Brezillon 		return NULL;
4694686da83SBoris Brezillon 
4704686da83SBoris Brezillon 	__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
4714686da83SBoris Brezillon 
4724686da83SBoris Brezillon 	return &state->base;
4734686da83SBoris Brezillon }
4744686da83SBoris Brezillon 
4754686da83SBoris Brezillon static void vc4_load_tracker_destroy_state(struct drm_private_obj *obj,
4764686da83SBoris Brezillon 					   struct drm_private_state *state)
4774686da83SBoris Brezillon {
4784686da83SBoris Brezillon 	struct vc4_load_tracker_state *load_state;
4794686da83SBoris Brezillon 
4804686da83SBoris Brezillon 	load_state = to_vc4_load_tracker_state(state);
4814686da83SBoris Brezillon 	kfree(load_state);
4824686da83SBoris Brezillon }
4834686da83SBoris Brezillon 
4844686da83SBoris Brezillon static const struct drm_private_state_funcs vc4_load_tracker_state_funcs = {
4854686da83SBoris Brezillon 	.atomic_duplicate_state = vc4_load_tracker_duplicate_state,
4864686da83SBoris Brezillon 	.atomic_destroy_state = vc4_load_tracker_destroy_state,
4874686da83SBoris Brezillon };
4884686da83SBoris Brezillon 
489766cc6b1SStefan Schake static int
490766cc6b1SStefan Schake vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
491766cc6b1SStefan Schake {
492766cc6b1SStefan Schake 	int ret;
493766cc6b1SStefan Schake 
494766cc6b1SStefan Schake 	ret = vc4_ctm_atomic_check(dev, state);
495766cc6b1SStefan Schake 	if (ret < 0)
496766cc6b1SStefan Schake 		return ret;
497766cc6b1SStefan Schake 
4984686da83SBoris Brezillon 	ret = drm_atomic_helper_check(dev, state);
4994686da83SBoris Brezillon 	if (ret)
5004686da83SBoris Brezillon 		return ret;
5014686da83SBoris Brezillon 
5024686da83SBoris Brezillon 	return vc4_load_tracker_atomic_check(state);
503766cc6b1SStefan Schake }
504766cc6b1SStefan Schake 
505c8b75bcaSEric Anholt static const struct drm_mode_config_funcs vc4_mode_funcs = {
506766cc6b1SStefan Schake 	.atomic_check = vc4_atomic_check,
507b501baccSEric Anholt 	.atomic_commit = vc4_atomic_commit,
50883753117SEric Anholt 	.fb_create = vc4_fb_create,
509c8b75bcaSEric Anholt };
510c8b75bcaSEric Anholt 
511c8b75bcaSEric Anholt int vc4_kms_load(struct drm_device *dev)
512c8b75bcaSEric Anholt {
51348666d56SDerek Foreman 	struct vc4_dev *vc4 = to_vc4_dev(dev);
514766cc6b1SStefan Schake 	struct vc4_ctm_state *ctm_state;
5154686da83SBoris Brezillon 	struct vc4_load_tracker_state *load_state;
516c8b75bcaSEric Anholt 	int ret;
517c8b75bcaSEric Anholt 
5186b5c029dSPaul Kocialkowski 	/* Start with the load tracker enabled. Can be disabled through the
5196b5c029dSPaul Kocialkowski 	 * debugfs load_tracker file.
5206b5c029dSPaul Kocialkowski 	 */
5216b5c029dSPaul Kocialkowski 	vc4->load_tracker_enabled = true;
5226b5c029dSPaul Kocialkowski 
523b501baccSEric Anholt 	sema_init(&vc4->async_modeset, 1);
524b501baccSEric Anholt 
5257d2818f5SMario Kleiner 	/* Set support for vblank irq fast disable, before drm_vblank_init() */
5267d2818f5SMario Kleiner 	dev->vblank_disable_immediate = true;
5277d2818f5SMario Kleiner 
528c8b75bcaSEric Anholt 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
529c8b75bcaSEric Anholt 	if (ret < 0) {
530c8b75bcaSEric Anholt 		dev_err(dev->dev, "failed to initialize vblank\n");
531c8b75bcaSEric Anholt 		return ret;
532c8b75bcaSEric Anholt 	}
533c8b75bcaSEric Anholt 
534c8b75bcaSEric Anholt 	dev->mode_config.max_width = 2048;
535c8b75bcaSEric Anholt 	dev->mode_config.max_height = 2048;
536c8b75bcaSEric Anholt 	dev->mode_config.funcs = &vc4_mode_funcs;
537c8b75bcaSEric Anholt 	dev->mode_config.preferred_depth = 24;
538b501baccSEric Anholt 	dev->mode_config.async_page_flip = true;
539423ad7b3SDaniel Stone 	dev->mode_config.allow_fb_modifiers = true;
540b501baccSEric Anholt 
541766cc6b1SStefan Schake 	drm_modeset_lock_init(&vc4->ctm_state_lock);
542766cc6b1SStefan Schake 
543766cc6b1SStefan Schake 	ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL);
544766cc6b1SStefan Schake 	if (!ctm_state)
545766cc6b1SStefan Schake 		return -ENOMEM;
546b962a120SRob Clark 
547b962a120SRob Clark 	drm_atomic_private_obj_init(dev, &vc4->ctm_manager, &ctm_state->base,
548766cc6b1SStefan Schake 				    &vc4_ctm_state_funcs);
549766cc6b1SStefan Schake 
5504686da83SBoris Brezillon 	load_state = kzalloc(sizeof(*load_state), GFP_KERNEL);
5514686da83SBoris Brezillon 	if (!load_state) {
5524686da83SBoris Brezillon 		drm_atomic_private_obj_fini(&vc4->ctm_manager);
5534686da83SBoris Brezillon 		return -ENOMEM;
5544686da83SBoris Brezillon 	}
5554686da83SBoris Brezillon 
5564686da83SBoris Brezillon 	drm_atomic_private_obj_init(dev, &vc4->load_tracker, &load_state->base,
5574686da83SBoris Brezillon 				    &vc4_load_tracker_state_funcs);
5584686da83SBoris Brezillon 
559c8b75bcaSEric Anholt 	drm_mode_config_reset(dev);
560c8b75bcaSEric Anholt 
561c8b75bcaSEric Anholt 	drm_kms_helper_poll_init(dev);
562c8b75bcaSEric Anholt 
563c8b75bcaSEric Anholt 	return 0;
564c8b75bcaSEric Anholt }
565