1 /* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 /** DOC: Interrupt management for the V3D engine. 25 * 26 * We have an interrupt status register (V3D_INTCTL) which reports 27 * interrupts, and where writing 1 bits clears those interrupts. 28 * There are also a pair of interrupt registers 29 * (V3D_INTENA/V3D_INTDIS) where writing a 1 to their bits enables or 30 * disables that specific interrupt, and 0s written are ignored 31 * (reading either one returns the set of enabled interrupts). 32 * 33 * When we take a render frame interrupt, we need to wake the 34 * processes waiting for some frame to be done, and get the next frame 35 * submitted ASAP (so the hardware doesn't sit idle when there's work 36 * to do). 37 * 38 * When we take the binner out of memory interrupt, we need to 39 * allocate some new memory and pass it to the binner so that the 40 * current job can make progress. 41 */ 42 43 #include "vc4_drv.h" 44 #include "vc4_regs.h" 45 46 #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \ 47 V3D_INT_FRDONE) 48 49 DECLARE_WAIT_QUEUE_HEAD(render_wait); 50 51 static void 52 vc4_overflow_mem_work(struct work_struct *work) 53 { 54 struct vc4_dev *vc4 = 55 container_of(work, struct vc4_dev, overflow_mem_work); 56 struct drm_device *dev = vc4->dev; 57 struct vc4_bo *bo; 58 59 bo = vc4_bo_create(dev, 256 * 1024, true); 60 if (!bo) { 61 DRM_ERROR("Couldn't allocate binner overflow mem\n"); 62 return; 63 } 64 65 /* If there's a job executing currently, then our previous 66 * overflow allocation is getting used in that job and we need 67 * to queue it to be released when the job is done. But if no 68 * job is executing at all, then we can free the old overflow 69 * object direcctly. 70 * 71 * No lock necessary for this pointer since we're the only 72 * ones that update the pointer, and our workqueue won't 73 * reenter. 74 */ 75 if (vc4->overflow_mem) { 76 struct vc4_exec_info *current_exec; 77 unsigned long irqflags; 78 79 spin_lock_irqsave(&vc4->job_lock, irqflags); 80 current_exec = vc4_first_job(vc4); 81 if (current_exec) { 82 vc4->overflow_mem->seqno = vc4->finished_seqno + 1; 83 list_add_tail(&vc4->overflow_mem->unref_head, 84 ¤t_exec->unref_list); 85 vc4->overflow_mem = NULL; 86 } 87 spin_unlock_irqrestore(&vc4->job_lock, irqflags); 88 } 89 90 if (vc4->overflow_mem) 91 drm_gem_object_unreference_unlocked(&vc4->overflow_mem->base.base); 92 vc4->overflow_mem = bo; 93 94 V3D_WRITE(V3D_BPOA, bo->base.paddr); 95 V3D_WRITE(V3D_BPOS, bo->base.base.size); 96 V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM); 97 V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM); 98 } 99 100 static void 101 vc4_irq_finish_job(struct drm_device *dev) 102 { 103 struct vc4_dev *vc4 = to_vc4_dev(dev); 104 struct vc4_exec_info *exec = vc4_first_job(vc4); 105 106 if (!exec) 107 return; 108 109 vc4->finished_seqno++; 110 list_move_tail(&exec->head, &vc4->job_done_list); 111 vc4_submit_next_job(dev); 112 113 wake_up_all(&vc4->job_wait_queue); 114 schedule_work(&vc4->job_done_work); 115 } 116 117 irqreturn_t 118 vc4_irq(int irq, void *arg) 119 { 120 struct drm_device *dev = arg; 121 struct vc4_dev *vc4 = to_vc4_dev(dev); 122 uint32_t intctl; 123 irqreturn_t status = IRQ_NONE; 124 125 barrier(); 126 intctl = V3D_READ(V3D_INTCTL); 127 128 /* Acknowledge the interrupts we're handling here. The render 129 * frame done interrupt will be cleared, while OUTOMEM will 130 * stay high until the underlying cause is cleared. 131 */ 132 V3D_WRITE(V3D_INTCTL, intctl); 133 134 if (intctl & V3D_INT_OUTOMEM) { 135 /* Disable OUTOMEM until the work is done. */ 136 V3D_WRITE(V3D_INTDIS, V3D_INT_OUTOMEM); 137 schedule_work(&vc4->overflow_mem_work); 138 status = IRQ_HANDLED; 139 } 140 141 if (intctl & V3D_INT_FRDONE) { 142 spin_lock(&vc4->job_lock); 143 vc4_irq_finish_job(dev); 144 spin_unlock(&vc4->job_lock); 145 status = IRQ_HANDLED; 146 } 147 148 return status; 149 } 150 151 void 152 vc4_irq_preinstall(struct drm_device *dev) 153 { 154 struct vc4_dev *vc4 = to_vc4_dev(dev); 155 156 init_waitqueue_head(&vc4->job_wait_queue); 157 INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work); 158 159 /* Clear any pending interrupts someone might have left around 160 * for us. 161 */ 162 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 163 } 164 165 int 166 vc4_irq_postinstall(struct drm_device *dev) 167 { 168 struct vc4_dev *vc4 = to_vc4_dev(dev); 169 170 /* Enable both the render done and out of memory interrupts. */ 171 V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS); 172 173 return 0; 174 } 175 176 void 177 vc4_irq_uninstall(struct drm_device *dev) 178 { 179 struct vc4_dev *vc4 = to_vc4_dev(dev); 180 181 /* Disable sending interrupts for our driver's IRQs. */ 182 V3D_WRITE(V3D_INTDIS, V3D_DRIVER_IRQS); 183 184 /* Clear any pending interrupts we might have left. */ 185 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 186 187 cancel_work_sync(&vc4->overflow_mem_work); 188 } 189 190 /** Reinitializes interrupt registers when a GPU reset is performed. */ 191 void vc4_irq_reset(struct drm_device *dev) 192 { 193 struct vc4_dev *vc4 = to_vc4_dev(dev); 194 unsigned long irqflags; 195 196 /* Acknowledge any stale IRQs. */ 197 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 198 199 /* 200 * Turn all our interrupts on. Binner out of memory is the 201 * only one we expect to trigger at this point, since we've 202 * just come from poweron and haven't supplied any overflow 203 * memory yet. 204 */ 205 V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS); 206 207 spin_lock_irqsave(&vc4->job_lock, irqflags); 208 vc4_irq_finish_job(dev); 209 spin_unlock_irqrestore(&vc4->job_lock, irqflags); 210 } 211