xref: /openbmc/linux/drivers/gpu/drm/vc4/vc4_hvs.c (revision 0c874100)
1 /*
2  * Copyright (C) 2015 Broadcom
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 /**
10  * DOC: VC4 HVS module.
11  *
12  * The Hardware Video Scaler (HVS) is the piece of hardware that does
13  * translation, scaling, colorspace conversion, and compositing of
14  * pixels stored in framebuffers into a FIFO of pixels going out to
15  * the Pixel Valve (CRTC).  It operates at the system clock rate (the
16  * system audio clock gate, specifically), which is much higher than
17  * the pixel clock rate.
18  *
19  * There is a single global HVS, with multiple output FIFOs that can
20  * be consumed by the PVs.  This file just manages the resources for
21  * the HVS, while the vc4_crtc.c code actually drives HVS setup for
22  * each CRTC.
23  */
24 
25 #include <linux/component.h>
26 #include "vc4_drv.h"
27 #include "vc4_regs.h"
28 
29 #define HVS_REG(reg) { reg, #reg }
30 static const struct {
31 	u32 reg;
32 	const char *name;
33 } hvs_regs[] = {
34 	HVS_REG(SCALER_DISPCTRL),
35 	HVS_REG(SCALER_DISPSTAT),
36 	HVS_REG(SCALER_DISPID),
37 	HVS_REG(SCALER_DISPECTRL),
38 	HVS_REG(SCALER_DISPPROF),
39 	HVS_REG(SCALER_DISPDITHER),
40 	HVS_REG(SCALER_DISPEOLN),
41 	HVS_REG(SCALER_DISPLIST0),
42 	HVS_REG(SCALER_DISPLIST1),
43 	HVS_REG(SCALER_DISPLIST2),
44 	HVS_REG(SCALER_DISPLSTAT),
45 	HVS_REG(SCALER_DISPLACT0),
46 	HVS_REG(SCALER_DISPLACT1),
47 	HVS_REG(SCALER_DISPLACT2),
48 	HVS_REG(SCALER_DISPCTRL0),
49 	HVS_REG(SCALER_DISPBKGND0),
50 	HVS_REG(SCALER_DISPSTAT0),
51 	HVS_REG(SCALER_DISPBASE0),
52 	HVS_REG(SCALER_DISPCTRL1),
53 	HVS_REG(SCALER_DISPBKGND1),
54 	HVS_REG(SCALER_DISPSTAT1),
55 	HVS_REG(SCALER_DISPBASE1),
56 	HVS_REG(SCALER_DISPCTRL2),
57 	HVS_REG(SCALER_DISPBKGND2),
58 	HVS_REG(SCALER_DISPSTAT2),
59 	HVS_REG(SCALER_DISPBASE2),
60 	HVS_REG(SCALER_DISPALPHA2),
61 	HVS_REG(SCALER_OLEDOFFS),
62 	HVS_REG(SCALER_OLEDCOEF0),
63 	HVS_REG(SCALER_OLEDCOEF1),
64 	HVS_REG(SCALER_OLEDCOEF2),
65 };
66 
67 void vc4_hvs_dump_state(struct drm_device *dev)
68 {
69 	struct vc4_dev *vc4 = to_vc4_dev(dev);
70 	int i;
71 
72 	for (i = 0; i < ARRAY_SIZE(hvs_regs); i++) {
73 		DRM_INFO("0x%04x (%s): 0x%08x\n",
74 			 hvs_regs[i].reg, hvs_regs[i].name,
75 			 HVS_READ(hvs_regs[i].reg));
76 	}
77 
78 	DRM_INFO("HVS ctx:\n");
79 	for (i = 0; i < 64; i += 4) {
80 		DRM_INFO("0x%08x (%s): 0x%08x 0x%08x 0x%08x 0x%08x\n",
81 			 i * 4, i < HVS_BOOTLOADER_DLIST_END ? "B" : "D",
82 			 readl((u32 __iomem *)vc4->hvs->dlist + i + 0),
83 			 readl((u32 __iomem *)vc4->hvs->dlist + i + 1),
84 			 readl((u32 __iomem *)vc4->hvs->dlist + i + 2),
85 			 readl((u32 __iomem *)vc4->hvs->dlist + i + 3));
86 	}
87 }
88 
89 #ifdef CONFIG_DEBUG_FS
90 int vc4_hvs_debugfs_regs(struct seq_file *m, void *unused)
91 {
92 	struct drm_info_node *node = (struct drm_info_node *)m->private;
93 	struct drm_device *dev = node->minor->dev;
94 	struct vc4_dev *vc4 = to_vc4_dev(dev);
95 	int i;
96 
97 	for (i = 0; i < ARRAY_SIZE(hvs_regs); i++) {
98 		seq_printf(m, "%s (0x%04x): 0x%08x\n",
99 			   hvs_regs[i].name, hvs_regs[i].reg,
100 			   HVS_READ(hvs_regs[i].reg));
101 	}
102 
103 	return 0;
104 }
105 #endif
106 
107 /* The filter kernel is composed of dwords each containing 3 9-bit
108  * signed integers packed next to each other.
109  */
110 #define VC4_INT_TO_COEFF(coeff) (coeff & 0x1ff)
111 #define VC4_PPF_FILTER_WORD(c0, c1, c2)				\
112 	((((c0) & 0x1ff) << 0) |				\
113 	 (((c1) & 0x1ff) << 9) |				\
114 	 (((c2) & 0x1ff) << 18))
115 
116 /* The whole filter kernel is arranged as the coefficients 0-16 going
117  * up, then a pad, then 17-31 going down and reversed within the
118  * dwords.  This means that a linear phase kernel (where it's
119  * symmetrical at the boundary between 15 and 16) has the last 5
120  * dwords matching the first 5, but reversed.
121  */
122 #define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8,	\
123 				c9, c10, c11, c12, c13, c14, c15)	\
124 	{VC4_PPF_FILTER_WORD(c0, c1, c2),				\
125 	 VC4_PPF_FILTER_WORD(c3, c4, c5),				\
126 	 VC4_PPF_FILTER_WORD(c6, c7, c8),				\
127 	 VC4_PPF_FILTER_WORD(c9, c10, c11),				\
128 	 VC4_PPF_FILTER_WORD(c12, c13, c14),				\
129 	 VC4_PPF_FILTER_WORD(c15, c15, 0)}
130 
131 #define VC4_LINEAR_PHASE_KERNEL_DWORDS 6
132 #define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1)
133 
134 /* Recommended B=1/3, C=1/3 filter choice from Mitchell/Netravali.
135  * http://www.cs.utexas.edu/~fussell/courses/cs384g/lectures/mitchell/Mitchell.pdf
136  */
137 static const u32 mitchell_netravali_1_3_1_3_kernel[] =
138 	VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
139 				50, 82, 119, 155, 187, 213, 227);
140 
141 static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
142 					struct drm_mm_node *space,
143 					const u32 *kernel)
144 {
145 	int ret, i;
146 	u32 __iomem *dst_kernel;
147 
148 	ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS);
149 	if (ret) {
150 		DRM_ERROR("Failed to allocate space for filter kernel: %d\n",
151 			  ret);
152 		return ret;
153 	}
154 
155 	dst_kernel = hvs->dlist + space->start;
156 
157 	for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
158 		if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
159 			writel(kernel[i], &dst_kernel[i]);
160 		else {
161 			writel(kernel[VC4_KERNEL_DWORDS - i - 1],
162 			       &dst_kernel[i]);
163 		}
164 	}
165 
166 	return 0;
167 }
168 
169 static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
170 {
171 	struct platform_device *pdev = to_platform_device(dev);
172 	struct drm_device *drm = dev_get_drvdata(master);
173 	struct vc4_dev *vc4 = drm->dev_private;
174 	struct vc4_hvs *hvs = NULL;
175 	int ret;
176 	u32 dispctrl;
177 
178 	hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
179 	if (!hvs)
180 		return -ENOMEM;
181 
182 	hvs->pdev = pdev;
183 
184 	hvs->regs = vc4_ioremap_regs(pdev, 0);
185 	if (IS_ERR(hvs->regs))
186 		return PTR_ERR(hvs->regs);
187 
188 	hvs->dlist = hvs->regs + SCALER_DLIST_START;
189 
190 	spin_lock_init(&hvs->mm_lock);
191 
192 	/* Set up the HVS display list memory manager.  We never
193 	 * overwrite the setup from the bootloader (just 128b out of
194 	 * our 16K), since we don't want to scramble the screen when
195 	 * transitioning from the firmware's boot setup to runtime.
196 	 */
197 	drm_mm_init(&hvs->dlist_mm,
198 		    HVS_BOOTLOADER_DLIST_END,
199 		    (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
200 
201 	/* Set up the HVS LBM memory manager.  We could have some more
202 	 * complicated data structure that allowed reuse of LBM areas
203 	 * between planes when they don't overlap on the screen, but
204 	 * for now we just allocate globally.
205 	 */
206 	drm_mm_init(&hvs->lbm_mm, 0, 96 * 1024);
207 
208 	/* Upload filter kernels.  We only have the one for now, so we
209 	 * keep it around for the lifetime of the driver.
210 	 */
211 	ret = vc4_hvs_upload_linear_kernel(hvs,
212 					   &hvs->mitchell_netravali_filter,
213 					   mitchell_netravali_1_3_1_3_kernel);
214 	if (ret)
215 		return ret;
216 
217 	vc4->hvs = hvs;
218 
219 	dispctrl = HVS_READ(SCALER_DISPCTRL);
220 
221 	dispctrl |= SCALER_DISPCTRL_ENABLE;
222 
223 	/* Set DSP3 (PV1) to use HVS channel 2, which would otherwise
224 	 * be unused.
225 	 */
226 	dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
227 	dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX);
228 
229 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);
230 
231 	return 0;
232 }
233 
234 static void vc4_hvs_unbind(struct device *dev, struct device *master,
235 			   void *data)
236 {
237 	struct drm_device *drm = dev_get_drvdata(master);
238 	struct vc4_dev *vc4 = drm->dev_private;
239 
240 	if (vc4->hvs->mitchell_netravali_filter.allocated)
241 		drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
242 
243 	drm_mm_takedown(&vc4->hvs->dlist_mm);
244 	drm_mm_takedown(&vc4->hvs->lbm_mm);
245 
246 	vc4->hvs = NULL;
247 }
248 
249 static const struct component_ops vc4_hvs_ops = {
250 	.bind   = vc4_hvs_bind,
251 	.unbind = vc4_hvs_unbind,
252 };
253 
254 static int vc4_hvs_dev_probe(struct platform_device *pdev)
255 {
256 	return component_add(&pdev->dev, &vc4_hvs_ops);
257 }
258 
259 static int vc4_hvs_dev_remove(struct platform_device *pdev)
260 {
261 	component_del(&pdev->dev, &vc4_hvs_ops);
262 	return 0;
263 }
264 
265 static const struct of_device_id vc4_hvs_dt_match[] = {
266 	{ .compatible = "brcm,bcm2835-hvs" },
267 	{}
268 };
269 
270 struct platform_driver vc4_hvs_driver = {
271 	.probe = vc4_hvs_dev_probe,
272 	.remove = vc4_hvs_dev_remove,
273 	.driver = {
274 		.name = "vc4_hvs",
275 		.of_match_table = vc4_hvs_dt_match,
276 	},
277 };
278