1 #ifndef _VC4_HDMI_H_ 2 #define _VC4_HDMI_H_ 3 4 #include <drm/drm_connector.h> 5 #include <media/cec.h> 6 #include <sound/dmaengine_pcm.h> 7 #include <sound/soc.h> 8 9 #include "vc4_drv.h" 10 11 /* VC4 HDMI encoder KMS struct */ 12 struct vc4_hdmi_encoder { 13 struct vc4_encoder base; 14 bool hdmi_monitor; 15 }; 16 17 static inline struct vc4_hdmi_encoder * 18 to_vc4_hdmi_encoder(struct drm_encoder *encoder) 19 { 20 return container_of(encoder, struct vc4_hdmi_encoder, base.base); 21 } 22 23 struct vc4_hdmi; 24 struct vc4_hdmi_register; 25 struct vc4_hdmi_connector_state; 26 27 enum vc4_hdmi_phy_channel { 28 PHY_LANE_0 = 0, 29 PHY_LANE_1, 30 PHY_LANE_2, 31 PHY_LANE_CK, 32 }; 33 34 struct vc4_hdmi_variant { 35 /* Encoder Type for that controller */ 36 enum vc4_encoder_type encoder_type; 37 38 /* ALSA card name */ 39 const char *card_name; 40 41 /* Filename to expose the registers in debugfs */ 42 const char *debugfs_name; 43 44 /* Maximum pixel clock supported by the controller (in Hz) */ 45 unsigned long long max_pixel_clock; 46 47 /* List of the registers available on that variant */ 48 const struct vc4_hdmi_register *registers; 49 50 /* Number of registers on that variant */ 51 unsigned int num_registers; 52 53 /* BCM2711 Only. 54 * The variants don't map the lane in the same order in the 55 * PHY, so this is an array mapping the HDMI channel (index) 56 * to the PHY lane (value). 57 */ 58 enum vc4_hdmi_phy_channel phy_lane_mapping[4]; 59 60 /* The BCM2711 cannot deal with odd horizontal pixel timings */ 61 bool unsupported_odd_h_timings; 62 63 /* 64 * The BCM2711 CEC/hotplug IRQ controller is shared between the 65 * two HDMI controllers, and we have a proper irqchip driver for 66 * it. 67 */ 68 bool external_irq_controller; 69 70 /* Callback to get the resources (memory region, interrupts, 71 * clocks, etc) for that variant. 72 */ 73 int (*init_resources)(struct vc4_hdmi *vc4_hdmi); 74 75 /* Callback to reset the HDMI block */ 76 void (*reset)(struct vc4_hdmi *vc4_hdmi); 77 78 /* Callback to enable / disable the CSC */ 79 void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, 80 struct drm_connector_state *state, 81 const struct drm_display_mode *mode); 82 83 /* Callback to configure the video timings in the HDMI block */ 84 void (*set_timings)(struct vc4_hdmi *vc4_hdmi, 85 struct drm_connector_state *state, 86 struct drm_display_mode *mode); 87 88 /* Callback to initialize the PHY according to the connector state */ 89 void (*phy_init)(struct vc4_hdmi *vc4_hdmi, 90 struct vc4_hdmi_connector_state *vc4_conn_state); 91 92 /* Callback to disable the PHY */ 93 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi); 94 95 /* Callback to enable the RNG in the PHY */ 96 void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi); 97 98 /* Callback to disable the RNG in the PHY */ 99 void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi); 100 101 /* Callback to get channel map */ 102 u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask); 103 104 /* Enables HDR metadata */ 105 bool supports_hdr; 106 107 /* Callback for hardware specific hotplug detect */ 108 bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi); 109 }; 110 111 /* HDMI audio information */ 112 struct vc4_hdmi_audio { 113 struct snd_soc_card card; 114 struct snd_soc_dai_link link; 115 struct snd_soc_dai_link_component cpu; 116 struct snd_soc_dai_link_component codec; 117 struct snd_soc_dai_link_component platform; 118 struct snd_dmaengine_dai_dma_data dma_data; 119 struct hdmi_audio_infoframe infoframe; 120 struct platform_device *codec_pdev; 121 bool streaming; 122 }; 123 124 /* General HDMI hardware state. */ 125 struct vc4_hdmi { 126 struct vc4_hdmi_audio audio; 127 128 struct platform_device *pdev; 129 const struct vc4_hdmi_variant *variant; 130 131 struct vc4_hdmi_encoder encoder; 132 struct drm_connector connector; 133 134 struct delayed_work scrambling_work; 135 136 struct i2c_adapter *ddc; 137 void __iomem *hdmicore_regs; 138 void __iomem *hd_regs; 139 140 /* VC5 Only */ 141 void __iomem *cec_regs; 142 /* VC5 Only */ 143 void __iomem *csc_regs; 144 /* VC5 Only */ 145 void __iomem *dvp_regs; 146 /* VC5 Only */ 147 void __iomem *phy_regs; 148 /* VC5 Only */ 149 void __iomem *ram_regs; 150 /* VC5 Only */ 151 void __iomem *rm_regs; 152 153 struct gpio_desc *hpd_gpio; 154 155 /* 156 * On some systems (like the RPi4), some modes are in the same 157 * frequency range than the WiFi channels (1440p@60Hz for 158 * example). Should we take evasive actions because that system 159 * has a wifi adapter? 160 */ 161 bool disable_wifi_frequencies; 162 163 /* 164 * Even if HDMI0 on the RPi4 can output modes requiring a pixel 165 * rate higher than 297MHz, it needs some adjustments in the 166 * config.txt file to be able to do so and thus won't always be 167 * available. 168 */ 169 bool disable_4kp60; 170 171 struct cec_adapter *cec_adap; 172 struct cec_msg cec_rx_msg; 173 bool cec_tx_ok; 174 bool cec_irq_was_rx; 175 176 struct clk *cec_clock; 177 struct clk *pixel_clock; 178 struct clk *hsm_clock; 179 struct clk *audio_clock; 180 struct clk *pixel_bvb_clock; 181 182 struct reset_control *reset; 183 184 struct debugfs_regset32 hdmi_regset; 185 struct debugfs_regset32 hd_regset; 186 187 /** 188 * @hw_lock: Spinlock protecting device register access. 189 */ 190 spinlock_t hw_lock; 191 192 /** 193 * @mutex: Mutex protecting the driver access across multiple 194 * frameworks (KMS, ALSA). 195 * 196 * NOTE: While supported, CEC has been left out since 197 * cec_s_phys_addr_from_edid() might call .adap_enable and lead to a 198 * reentrancy issue between .get_modes (or .detect) and .adap_enable. 199 * Since we don't share any state between the CEC hooks and KMS', it's 200 * not a big deal. The only trouble might come from updating the CEC 201 * clock divider which might be affected by a modeset, but CEC should 202 * be resilient to that. 203 */ 204 struct mutex mutex; 205 206 /** 207 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode 208 * for use by ALSA hooks and interrupt handlers. Protected by @mutex. 209 */ 210 struct drm_display_mode saved_adjusted_mode; 211 212 /** 213 * @output_enabled: Is the HDMI controller currently active? 214 * Protected by @mutex. 215 */ 216 bool output_enabled; 217 218 /** 219 * @scdc_enabled: Is the HDMI controller currently running with 220 * the scrambler on? Protected by @mutex. 221 */ 222 bool scdc_enabled; 223 }; 224 225 static inline struct vc4_hdmi * 226 connector_to_vc4_hdmi(struct drm_connector *connector) 227 { 228 return container_of(connector, struct vc4_hdmi, connector); 229 } 230 231 static inline struct vc4_hdmi * 232 encoder_to_vc4_hdmi(struct drm_encoder *encoder) 233 { 234 struct vc4_hdmi_encoder *_encoder = to_vc4_hdmi_encoder(encoder); 235 236 return container_of(_encoder, struct vc4_hdmi, encoder); 237 } 238 239 struct vc4_hdmi_connector_state { 240 struct drm_connector_state base; 241 unsigned long long pixel_rate; 242 }; 243 244 static inline struct vc4_hdmi_connector_state * 245 conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state) 246 { 247 return container_of(conn_state, struct vc4_hdmi_connector_state, base); 248 } 249 250 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 251 struct vc4_hdmi_connector_state *vc4_conn_state); 252 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 253 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 254 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 255 256 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 257 struct vc4_hdmi_connector_state *vc4_conn_state); 258 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 259 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 260 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 261 262 #endif /* _VC4_HDMI_H_ */ 263