1 #ifndef _VC4_HDMI_H_ 2 #define _VC4_HDMI_H_ 3 4 #include <drm/drm_connector.h> 5 #include <media/cec.h> 6 #include <sound/dmaengine_pcm.h> 7 #include <sound/soc.h> 8 9 #include "vc4_drv.h" 10 11 /* VC4 HDMI encoder KMS struct */ 12 struct vc4_hdmi_encoder { 13 struct vc4_encoder base; 14 bool hdmi_monitor; 15 bool limited_rgb_range; 16 }; 17 18 static inline struct vc4_hdmi_encoder * 19 to_vc4_hdmi_encoder(struct drm_encoder *encoder) 20 { 21 return container_of(encoder, struct vc4_hdmi_encoder, base.base); 22 } 23 24 struct drm_display_mode; 25 26 struct vc4_hdmi; 27 struct vc4_hdmi_register; 28 29 enum vc4_hdmi_phy_channel { 30 PHY_LANE_0 = 0, 31 PHY_LANE_1, 32 PHY_LANE_2, 33 PHY_LANE_CK, 34 }; 35 36 struct vc4_hdmi_variant { 37 /* Encoder Type for that controller */ 38 enum vc4_encoder_type encoder_type; 39 40 /* ALSA card name */ 41 const char *card_name; 42 43 /* Filename to expose the registers in debugfs */ 44 const char *debugfs_name; 45 46 /* Set to true when the CEC support is available */ 47 bool cec_available; 48 49 /* Maximum pixel clock supported by the controller (in Hz) */ 50 unsigned long long max_pixel_clock; 51 52 /* List of the registers available on that variant */ 53 const struct vc4_hdmi_register *registers; 54 55 /* Number of registers on that variant */ 56 unsigned int num_registers; 57 58 /* BCM2711 Only. 59 * The variants don't map the lane in the same order in the 60 * PHY, so this is an array mapping the HDMI channel (index) 61 * to the PHY lane (value). 62 */ 63 enum vc4_hdmi_phy_channel phy_lane_mapping[4]; 64 65 /* Callback to get the resources (memory region, interrupts, 66 * clocks, etc) for that variant. 67 */ 68 int (*init_resources)(struct vc4_hdmi *vc4_hdmi); 69 70 /* Callback to reset the HDMI block */ 71 void (*reset)(struct vc4_hdmi *vc4_hdmi); 72 73 /* Callback to enable / disable the CSC */ 74 void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, bool enable); 75 76 /* Callback to configure the video timings in the HDMI block */ 77 void (*set_timings)(struct vc4_hdmi *vc4_hdmi, 78 struct drm_display_mode *mode); 79 80 /* Callback to initialize the PHY according to the mode */ 81 void (*phy_init)(struct vc4_hdmi *vc4_hdmi, 82 struct drm_display_mode *mode); 83 84 /* Callback to disable the PHY */ 85 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi); 86 87 /* Callback to enable the RNG in the PHY */ 88 void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi); 89 90 /* Callback to disable the RNG in the PHY */ 91 void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi); 92 93 /* Callback to get channel map */ 94 u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask); 95 }; 96 97 /* HDMI audio information */ 98 struct vc4_hdmi_audio { 99 struct snd_soc_card card; 100 struct snd_soc_dai_link link; 101 struct snd_soc_dai_link_component cpu; 102 struct snd_soc_dai_link_component codec; 103 struct snd_soc_dai_link_component platform; 104 int samplerate; 105 int channels; 106 struct snd_dmaengine_dai_dma_data dma_data; 107 struct snd_pcm_substream *substream; 108 109 bool streaming; 110 }; 111 112 /* General HDMI hardware state. */ 113 struct vc4_hdmi { 114 struct vc4_hdmi_audio audio; 115 116 struct platform_device *pdev; 117 const struct vc4_hdmi_variant *variant; 118 119 struct vc4_hdmi_encoder encoder; 120 struct drm_connector connector; 121 122 struct i2c_adapter *ddc; 123 void __iomem *hdmicore_regs; 124 void __iomem *hd_regs; 125 126 /* VC5 Only */ 127 void __iomem *cec_regs; 128 /* VC5 Only */ 129 void __iomem *csc_regs; 130 /* VC5 Only */ 131 void __iomem *dvp_regs; 132 /* VC5 Only */ 133 void __iomem *phy_regs; 134 /* VC5 Only */ 135 void __iomem *ram_regs; 136 /* VC5 Only */ 137 void __iomem *rm_regs; 138 139 int hpd_gpio; 140 bool hpd_active_low; 141 142 struct cec_adapter *cec_adap; 143 struct cec_msg cec_rx_msg; 144 bool cec_tx_ok; 145 bool cec_irq_was_rx; 146 147 struct clk *pixel_clock; 148 struct clk *hsm_clock; 149 struct clk *audio_clock; 150 struct clk *pixel_bvb_clock; 151 152 struct reset_control *reset; 153 154 struct debugfs_regset32 hdmi_regset; 155 struct debugfs_regset32 hd_regset; 156 }; 157 158 static inline struct vc4_hdmi * 159 connector_to_vc4_hdmi(struct drm_connector *connector) 160 { 161 return container_of(connector, struct vc4_hdmi, connector); 162 } 163 164 static inline struct vc4_hdmi * 165 encoder_to_vc4_hdmi(struct drm_encoder *encoder) 166 { 167 struct vc4_hdmi_encoder *_encoder = to_vc4_hdmi_encoder(encoder); 168 169 return container_of(_encoder, struct vc4_hdmi, encoder); 170 } 171 172 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 173 struct drm_display_mode *mode); 174 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 175 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 176 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 177 178 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 179 struct drm_display_mode *mode); 180 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 181 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 182 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 183 184 #endif /* _VC4_HDMI_H_ */ 185