1 /* 2 * Copyright (C) 2016 Broadcom Limited 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License version 2 as published by 6 * the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 /** 18 * DOC: VC4 DPI module 19 * 20 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI 21 * signals. On BCM2835, these can be routed out to GPIO0-27 with the 22 * ALT2 function. 23 */ 24 25 #include <drm/drm_atomic_helper.h> 26 #include <drm/drm_bridge.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <drm/drm_edid.h> 29 #include <drm/drm_of.h> 30 #include <drm/drm_panel.h> 31 #include <linux/clk.h> 32 #include <linux/component.h> 33 #include <linux/of_graph.h> 34 #include <linux/of_platform.h> 35 #include "vc4_drv.h" 36 #include "vc4_regs.h" 37 38 #define DPI_C 0x00 39 # define DPI_OUTPUT_ENABLE_MODE BIT(16) 40 41 /* The order field takes the incoming 24 bit RGB from the pixel valve 42 * and shuffles the 3 channels. 43 */ 44 # define DPI_ORDER_MASK VC4_MASK(15, 14) 45 # define DPI_ORDER_SHIFT 14 46 # define DPI_ORDER_RGB 0 47 # define DPI_ORDER_BGR 1 48 # define DPI_ORDER_GRB 2 49 # define DPI_ORDER_BRG 3 50 51 /* The format field takes the ORDER-shuffled pixel valve data and 52 * formats it onto the output lines. 53 */ 54 # define DPI_FORMAT_MASK VC4_MASK(13, 11) 55 # define DPI_FORMAT_SHIFT 11 56 /* This define is named in the hardware, but actually just outputs 0. */ 57 # define DPI_FORMAT_9BIT_666_RGB 0 58 /* Outputs 00000000rrrrrggggggbbbbb */ 59 # define DPI_FORMAT_16BIT_565_RGB_1 1 60 /* Outputs 000rrrrr00gggggg000bbbbb */ 61 # define DPI_FORMAT_16BIT_565_RGB_2 2 62 /* Outputs 00rrrrr000gggggg00bbbbb0 */ 63 # define DPI_FORMAT_16BIT_565_RGB_3 3 64 /* Outputs 000000rrrrrrggggggbbbbbb */ 65 # define DPI_FORMAT_18BIT_666_RGB_1 4 66 /* Outputs 00rrrrrr00gggggg00bbbbbb */ 67 # define DPI_FORMAT_18BIT_666_RGB_2 5 68 /* Outputs rrrrrrrrggggggggbbbbbbbb */ 69 # define DPI_FORMAT_24BIT_888_RGB 6 70 71 /* Reverses the polarity of the corresponding signal */ 72 # define DPI_PIXEL_CLK_INVERT BIT(10) 73 # define DPI_HSYNC_INVERT BIT(9) 74 # define DPI_VSYNC_INVERT BIT(8) 75 # define DPI_OUTPUT_ENABLE_INVERT BIT(7) 76 77 /* Outputs the signal the falling clock edge instead of rising. */ 78 # define DPI_HSYNC_NEGATE BIT(6) 79 # define DPI_VSYNC_NEGATE BIT(5) 80 # define DPI_OUTPUT_ENABLE_NEGATE BIT(4) 81 82 /* Disables the signal */ 83 # define DPI_HSYNC_DISABLE BIT(3) 84 # define DPI_VSYNC_DISABLE BIT(2) 85 # define DPI_OUTPUT_ENABLE_DISABLE BIT(1) 86 87 /* Power gate to the device, full reset at 0 -> 1 transition */ 88 # define DPI_ENABLE BIT(0) 89 90 /* All other registers besides DPI_C return the ID */ 91 #define DPI_ID 0x04 92 # define DPI_ID_VALUE 0x00647069 93 94 /* General DPI hardware state. */ 95 struct vc4_dpi { 96 struct platform_device *pdev; 97 98 struct drm_encoder *encoder; 99 struct drm_connector *connector; 100 101 void __iomem *regs; 102 103 struct clk *pixel_clock; 104 struct clk *core_clock; 105 }; 106 107 #define DPI_READ(offset) readl(dpi->regs + (offset)) 108 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset)) 109 110 /* VC4 DPI encoder KMS struct */ 111 struct vc4_dpi_encoder { 112 struct vc4_encoder base; 113 struct vc4_dpi *dpi; 114 }; 115 116 static inline struct vc4_dpi_encoder * 117 to_vc4_dpi_encoder(struct drm_encoder *encoder) 118 { 119 return container_of(encoder, struct vc4_dpi_encoder, base.base); 120 } 121 122 #define DPI_REG(reg) { reg, #reg } 123 static const struct { 124 u32 reg; 125 const char *name; 126 } dpi_regs[] = { 127 DPI_REG(DPI_C), 128 DPI_REG(DPI_ID), 129 }; 130 131 #ifdef CONFIG_DEBUG_FS 132 int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused) 133 { 134 struct drm_info_node *node = (struct drm_info_node *)m->private; 135 struct drm_device *dev = node->minor->dev; 136 struct vc4_dev *vc4 = to_vc4_dev(dev); 137 struct vc4_dpi *dpi = vc4->dpi; 138 int i; 139 140 if (!dpi) 141 return 0; 142 143 for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) { 144 seq_printf(m, "%s (0x%04x): 0x%08x\n", 145 dpi_regs[i].name, dpi_regs[i].reg, 146 DPI_READ(dpi_regs[i].reg)); 147 } 148 149 return 0; 150 } 151 #endif 152 153 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = { 154 .destroy = drm_encoder_cleanup, 155 }; 156 157 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder) 158 { 159 struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder); 160 struct vc4_dpi *dpi = vc4_encoder->dpi; 161 162 clk_disable_unprepare(dpi->pixel_clock); 163 } 164 165 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder) 166 { 167 struct drm_display_mode *mode = &encoder->crtc->mode; 168 struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder); 169 struct vc4_dpi *dpi = vc4_encoder->dpi; 170 u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE; 171 int ret; 172 173 if (dpi->connector->display_info.num_bus_formats) { 174 u32 bus_format = dpi->connector->display_info.bus_formats[0]; 175 176 switch (bus_format) { 177 case MEDIA_BUS_FMT_RGB888_1X24: 178 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 179 DPI_FORMAT); 180 break; 181 case MEDIA_BUS_FMT_BGR888_1X24: 182 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 183 DPI_FORMAT); 184 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); 185 break; 186 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 187 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2, 188 DPI_FORMAT); 189 break; 190 case MEDIA_BUS_FMT_RGB666_1X18: 191 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, 192 DPI_FORMAT); 193 break; 194 case MEDIA_BUS_FMT_RGB565_1X16: 195 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3, 196 DPI_FORMAT); 197 break; 198 default: 199 DRM_ERROR("Unknown media bus format %d\n", bus_format); 200 break; 201 } 202 } 203 204 if (mode->flags & DRM_MODE_FLAG_NHSYNC) 205 dpi_c |= DPI_HSYNC_INVERT; 206 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) 207 dpi_c |= DPI_HSYNC_DISABLE; 208 209 if (mode->flags & DRM_MODE_FLAG_NVSYNC) 210 dpi_c |= DPI_VSYNC_INVERT; 211 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) 212 dpi_c |= DPI_VSYNC_DISABLE; 213 214 DPI_WRITE(DPI_C, dpi_c); 215 216 ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000); 217 if (ret) 218 DRM_ERROR("Failed to set clock rate: %d\n", ret); 219 220 ret = clk_prepare_enable(dpi->pixel_clock); 221 if (ret) 222 DRM_ERROR("Failed to set clock rate: %d\n", ret); 223 } 224 225 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder, 226 const struct drm_display_mode *mode) 227 { 228 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 229 return MODE_NO_INTERLACE; 230 231 return MODE_OK; 232 } 233 234 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = { 235 .disable = vc4_dpi_encoder_disable, 236 .enable = vc4_dpi_encoder_enable, 237 .mode_valid = vc4_dpi_encoder_mode_valid, 238 }; 239 240 static const struct of_device_id vc4_dpi_dt_match[] = { 241 { .compatible = "brcm,bcm2835-dpi", .data = NULL }, 242 {} 243 }; 244 245 /* Sets up the next link in the display chain, whether it's a panel or 246 * a bridge. 247 */ 248 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi) 249 { 250 struct device *dev = &dpi->pdev->dev; 251 struct drm_panel *panel; 252 struct drm_bridge *bridge; 253 int ret; 254 255 ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0, 256 &panel, &bridge); 257 if (ret) { 258 /* If nothing was connected in the DT, that's not an 259 * error. 260 */ 261 if (ret == -ENODEV) 262 return 0; 263 else 264 return ret; 265 } 266 267 if (panel) 268 bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DPI); 269 270 return drm_bridge_attach(dpi->encoder, bridge, NULL); 271 } 272 273 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data) 274 { 275 struct platform_device *pdev = to_platform_device(dev); 276 struct drm_device *drm = dev_get_drvdata(master); 277 struct vc4_dev *vc4 = to_vc4_dev(drm); 278 struct vc4_dpi *dpi; 279 struct vc4_dpi_encoder *vc4_dpi_encoder; 280 int ret; 281 282 dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL); 283 if (!dpi) 284 return -ENOMEM; 285 286 vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder), 287 GFP_KERNEL); 288 if (!vc4_dpi_encoder) 289 return -ENOMEM; 290 vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI; 291 vc4_dpi_encoder->dpi = dpi; 292 dpi->encoder = &vc4_dpi_encoder->base.base; 293 294 dpi->pdev = pdev; 295 dpi->regs = vc4_ioremap_regs(pdev, 0); 296 if (IS_ERR(dpi->regs)) 297 return PTR_ERR(dpi->regs); 298 299 if (DPI_READ(DPI_ID) != DPI_ID_VALUE) { 300 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", 301 DPI_READ(DPI_ID), DPI_ID_VALUE); 302 return -ENODEV; 303 } 304 305 dpi->core_clock = devm_clk_get(dev, "core"); 306 if (IS_ERR(dpi->core_clock)) { 307 ret = PTR_ERR(dpi->core_clock); 308 if (ret != -EPROBE_DEFER) 309 DRM_ERROR("Failed to get core clock: %d\n", ret); 310 return ret; 311 } 312 dpi->pixel_clock = devm_clk_get(dev, "pixel"); 313 if (IS_ERR(dpi->pixel_clock)) { 314 ret = PTR_ERR(dpi->pixel_clock); 315 if (ret != -EPROBE_DEFER) 316 DRM_ERROR("Failed to get pixel clock: %d\n", ret); 317 return ret; 318 } 319 320 ret = clk_prepare_enable(dpi->core_clock); 321 if (ret) 322 DRM_ERROR("Failed to turn on core clock: %d\n", ret); 323 324 drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs, 325 DRM_MODE_ENCODER_DPI, NULL); 326 drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs); 327 328 ret = vc4_dpi_init_bridge(dpi); 329 if (ret) 330 goto err_destroy_encoder; 331 332 dev_set_drvdata(dev, dpi); 333 334 vc4->dpi = dpi; 335 336 return 0; 337 338 err_destroy_encoder: 339 drm_encoder_cleanup(dpi->encoder); 340 clk_disable_unprepare(dpi->core_clock); 341 return ret; 342 } 343 344 static void vc4_dpi_unbind(struct device *dev, struct device *master, 345 void *data) 346 { 347 struct drm_device *drm = dev_get_drvdata(master); 348 struct vc4_dev *vc4 = to_vc4_dev(drm); 349 struct vc4_dpi *dpi = dev_get_drvdata(dev); 350 351 drm_of_panel_bridge_remove(dev->of_node, 0, 0); 352 353 drm_encoder_cleanup(dpi->encoder); 354 355 clk_disable_unprepare(dpi->core_clock); 356 357 vc4->dpi = NULL; 358 } 359 360 static const struct component_ops vc4_dpi_ops = { 361 .bind = vc4_dpi_bind, 362 .unbind = vc4_dpi_unbind, 363 }; 364 365 static int vc4_dpi_dev_probe(struct platform_device *pdev) 366 { 367 return component_add(&pdev->dev, &vc4_dpi_ops); 368 } 369 370 static int vc4_dpi_dev_remove(struct platform_device *pdev) 371 { 372 component_del(&pdev->dev, &vc4_dpi_ops); 373 return 0; 374 } 375 376 struct platform_driver vc4_dpi_driver = { 377 .probe = vc4_dpi_dev_probe, 378 .remove = vc4_dpi_dev_remove, 379 .driver = { 380 .name = "vc4_dpi", 381 .of_match_table = vc4_dpi_dt_match, 382 }, 383 }; 384