1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2021 Raspberry Pi 4 */ 5 6 #include "v3d_drv.h" 7 #include "v3d_regs.h" 8 9 #define V3D_PERFMONID_MIN 1 10 #define V3D_PERFMONID_MAX U32_MAX 11 12 void v3d_perfmon_get(struct v3d_perfmon *perfmon) 13 { 14 if (perfmon) 15 refcount_inc(&perfmon->refcnt); 16 } 17 18 void v3d_perfmon_put(struct v3d_perfmon *perfmon) 19 { 20 if (perfmon && refcount_dec_and_test(&perfmon->refcnt)) { 21 mutex_destroy(&perfmon->lock); 22 kfree(perfmon); 23 } 24 } 25 26 void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon) 27 { 28 unsigned int i; 29 u32 mask; 30 u8 ncounters; 31 32 if (WARN_ON_ONCE(!perfmon || v3d->active_perfmon)) 33 return; 34 35 ncounters = perfmon->ncounters; 36 mask = GENMASK(ncounters - 1, 0); 37 38 for (i = 0; i < ncounters; i++) { 39 u32 source = i / 4; 40 u32 channel = V3D_SET_FIELD(perfmon->counters[i], V3D_PCTR_S0); 41 42 i++; 43 channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0, 44 V3D_PCTR_S1); 45 i++; 46 channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0, 47 V3D_PCTR_S2); 48 i++; 49 channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0, 50 V3D_PCTR_S3); 51 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_SRC_X(source), channel); 52 } 53 54 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask); 55 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_CLR, mask); 56 V3D_CORE_WRITE(0, V3D_PCTR_0_OVERFLOW, mask); 57 58 v3d->active_perfmon = perfmon; 59 } 60 61 void v3d_perfmon_stop(struct v3d_dev *v3d, struct v3d_perfmon *perfmon, 62 bool capture) 63 { 64 unsigned int i; 65 66 if (!perfmon || !v3d->active_perfmon) 67 return; 68 69 mutex_lock(&perfmon->lock); 70 if (perfmon != v3d->active_perfmon) { 71 mutex_unlock(&perfmon->lock); 72 return; 73 } 74 75 if (capture) 76 for (i = 0; i < perfmon->ncounters; i++) 77 perfmon->values[i] += V3D_CORE_READ(0, V3D_PCTR_0_PCTRX(i)); 78 79 V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, 0); 80 81 v3d->active_perfmon = NULL; 82 mutex_unlock(&perfmon->lock); 83 } 84 85 struct v3d_perfmon *v3d_perfmon_find(struct v3d_file_priv *v3d_priv, int id) 86 { 87 struct v3d_perfmon *perfmon; 88 89 mutex_lock(&v3d_priv->perfmon.lock); 90 perfmon = idr_find(&v3d_priv->perfmon.idr, id); 91 v3d_perfmon_get(perfmon); 92 mutex_unlock(&v3d_priv->perfmon.lock); 93 94 return perfmon; 95 } 96 97 void v3d_perfmon_open_file(struct v3d_file_priv *v3d_priv) 98 { 99 mutex_init(&v3d_priv->perfmon.lock); 100 idr_init_base(&v3d_priv->perfmon.idr, 1); 101 } 102 103 static int v3d_perfmon_idr_del(int id, void *elem, void *data) 104 { 105 struct v3d_perfmon *perfmon = elem; 106 struct v3d_dev *v3d = (struct v3d_dev *)data; 107 108 /* If the active perfmon is being destroyed, stop it first */ 109 if (perfmon == v3d->active_perfmon) 110 v3d_perfmon_stop(v3d, perfmon, false); 111 112 v3d_perfmon_put(perfmon); 113 114 return 0; 115 } 116 117 void v3d_perfmon_close_file(struct v3d_file_priv *v3d_priv) 118 { 119 struct v3d_dev *v3d = v3d_priv->v3d; 120 121 mutex_lock(&v3d_priv->perfmon.lock); 122 idr_for_each(&v3d_priv->perfmon.idr, v3d_perfmon_idr_del, v3d); 123 idr_destroy(&v3d_priv->perfmon.idr); 124 mutex_unlock(&v3d_priv->perfmon.lock); 125 mutex_destroy(&v3d_priv->perfmon.lock); 126 } 127 128 int v3d_perfmon_create_ioctl(struct drm_device *dev, void *data, 129 struct drm_file *file_priv) 130 { 131 struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 132 struct drm_v3d_perfmon_create *req = data; 133 struct v3d_perfmon *perfmon; 134 unsigned int i; 135 int ret; 136 137 /* Number of monitored counters cannot exceed HW limits. */ 138 if (req->ncounters > DRM_V3D_MAX_PERF_COUNTERS || 139 !req->ncounters) 140 return -EINVAL; 141 142 /* Make sure all counters are valid. */ 143 for (i = 0; i < req->ncounters; i++) { 144 if (req->counters[i] >= V3D_PERFCNT_NUM) 145 return -EINVAL; 146 } 147 148 perfmon = kzalloc(struct_size(perfmon, values, req->ncounters), 149 GFP_KERNEL); 150 if (!perfmon) 151 return -ENOMEM; 152 153 for (i = 0; i < req->ncounters; i++) 154 perfmon->counters[i] = req->counters[i]; 155 156 perfmon->ncounters = req->ncounters; 157 158 refcount_set(&perfmon->refcnt, 1); 159 mutex_init(&perfmon->lock); 160 161 mutex_lock(&v3d_priv->perfmon.lock); 162 ret = idr_alloc(&v3d_priv->perfmon.idr, perfmon, V3D_PERFMONID_MIN, 163 V3D_PERFMONID_MAX, GFP_KERNEL); 164 mutex_unlock(&v3d_priv->perfmon.lock); 165 166 if (ret < 0) { 167 mutex_destroy(&perfmon->lock); 168 kfree(perfmon); 169 return ret; 170 } 171 172 req->id = ret; 173 174 return 0; 175 } 176 177 int v3d_perfmon_destroy_ioctl(struct drm_device *dev, void *data, 178 struct drm_file *file_priv) 179 { 180 struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 181 struct drm_v3d_perfmon_destroy *req = data; 182 struct v3d_perfmon *perfmon; 183 184 mutex_lock(&v3d_priv->perfmon.lock); 185 perfmon = idr_remove(&v3d_priv->perfmon.idr, req->id); 186 mutex_unlock(&v3d_priv->perfmon.lock); 187 188 if (!perfmon) 189 return -EINVAL; 190 191 v3d_perfmon_put(perfmon); 192 193 return 0; 194 } 195 196 int v3d_perfmon_get_values_ioctl(struct drm_device *dev, void *data, 197 struct drm_file *file_priv) 198 { 199 struct v3d_dev *v3d = to_v3d_dev(dev); 200 struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 201 struct drm_v3d_perfmon_get_values *req = data; 202 struct v3d_perfmon *perfmon; 203 int ret = 0; 204 205 if (req->pad != 0) 206 return -EINVAL; 207 208 mutex_lock(&v3d_priv->perfmon.lock); 209 perfmon = idr_find(&v3d_priv->perfmon.idr, req->id); 210 v3d_perfmon_get(perfmon); 211 mutex_unlock(&v3d_priv->perfmon.lock); 212 213 if (!perfmon) 214 return -EINVAL; 215 216 v3d_perfmon_stop(v3d, perfmon, true); 217 218 if (copy_to_user(u64_to_user_ptr(req->values_ptr), perfmon->values, 219 perfmon->ncounters * sizeof(u64))) 220 ret = -EFAULT; 221 222 v3d_perfmon_put(perfmon); 223 224 return ret; 225 } 226