1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Red Hat 4 * 5 * based in parts on udlfb.c: 6 * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it> 7 * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com> 8 * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com> 9 */ 10 11 #include <drm/drm_atomic.h> 12 #include <drm/drm_atomic_helper.h> 13 #include <drm/drm_crtc_helper.h> 14 #include <drm/drm_damage_helper.h> 15 #include <drm/drm_drv.h> 16 #include <drm/drm_edid.h> 17 #include <drm/drm_fourcc.h> 18 #include <drm/drm_gem_atomic_helper.h> 19 #include <drm/drm_gem_framebuffer_helper.h> 20 #include <drm/drm_gem_shmem_helper.h> 21 #include <drm/drm_modeset_helper_vtables.h> 22 #include <drm/drm_plane_helper.h> 23 #include <drm/drm_probe_helper.h> 24 #include <drm/drm_vblank.h> 25 26 #include "udl_drv.h" 27 #include "udl_proto.h" 28 29 /* 30 * All DisplayLink bulk operations start with 0xAF, followed by specific code 31 * All operations are written to buffers which then later get sent to device 32 */ 33 static char *udl_set_register(char *buf, u8 reg, u8 val) 34 { 35 *buf++ = 0xAF; 36 *buf++ = 0x20; 37 *buf++ = reg; 38 *buf++ = val; 39 return buf; 40 } 41 42 static char *udl_vidreg_lock(char *buf) 43 { 44 return udl_set_register(buf, 0xFF, 0x00); 45 } 46 47 static char *udl_vidreg_unlock(char *buf) 48 { 49 return udl_set_register(buf, 0xFF, 0xFF); 50 } 51 52 static char *udl_set_blank_mode(char *buf, u8 mode) 53 { 54 return udl_set_register(buf, UDL_REG_BLANKMODE, mode); 55 } 56 57 static char *udl_set_color_depth(char *buf, u8 selection) 58 { 59 return udl_set_register(buf, UDL_REG_COLORDEPTH, selection); 60 } 61 62 static char *udl_set_base16bpp(char *wrptr, u32 base) 63 { 64 /* the base pointer is 16 bits wide, 0x20 is hi byte. */ 65 wrptr = udl_set_register(wrptr, 0x20, base >> 16); 66 wrptr = udl_set_register(wrptr, 0x21, base >> 8); 67 return udl_set_register(wrptr, 0x22, base); 68 } 69 70 /* 71 * DisplayLink HW has separate 16bpp and 8bpp framebuffers. 72 * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer 73 */ 74 static char *udl_set_base8bpp(char *wrptr, u32 base) 75 { 76 wrptr = udl_set_register(wrptr, 0x26, base >> 16); 77 wrptr = udl_set_register(wrptr, 0x27, base >> 8); 78 return udl_set_register(wrptr, 0x28, base); 79 } 80 81 static char *udl_set_register_16(char *wrptr, u8 reg, u16 value) 82 { 83 wrptr = udl_set_register(wrptr, reg, value >> 8); 84 return udl_set_register(wrptr, reg+1, value); 85 } 86 87 /* 88 * This is kind of weird because the controller takes some 89 * register values in a different byte order than other registers. 90 */ 91 static char *udl_set_register_16be(char *wrptr, u8 reg, u16 value) 92 { 93 wrptr = udl_set_register(wrptr, reg, value); 94 return udl_set_register(wrptr, reg+1, value >> 8); 95 } 96 97 /* 98 * LFSR is linear feedback shift register. The reason we have this is 99 * because the display controller needs to minimize the clock depth of 100 * various counters used in the display path. So this code reverses the 101 * provided value into the lfsr16 value by counting backwards to get 102 * the value that needs to be set in the hardware comparator to get the 103 * same actual count. This makes sense once you read above a couple of 104 * times and think about it from a hardware perspective. 105 */ 106 static u16 udl_lfsr16(u16 actual_count) 107 { 108 u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */ 109 110 while (actual_count--) { 111 lv = ((lv << 1) | 112 (((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1)) 113 & 0xFFFF; 114 } 115 116 return (u16) lv; 117 } 118 119 /* 120 * This does LFSR conversion on the value that is to be written. 121 * See LFSR explanation above for more detail. 122 */ 123 static char *udl_set_register_lfsr16(char *wrptr, u8 reg, u16 value) 124 { 125 return udl_set_register_16(wrptr, reg, udl_lfsr16(value)); 126 } 127 128 /* 129 * Takes a DRM display mode and converts it into the DisplayLink 130 * equivalent register commands. 131 */ 132 static char *udl_set_display_mode(char *buf, struct drm_display_mode *mode) 133 { 134 u16 reg01 = mode->crtc_htotal - mode->crtc_hsync_start; 135 u16 reg03 = reg01 + mode->crtc_hdisplay; 136 u16 reg05 = mode->crtc_vtotal - mode->crtc_vsync_start; 137 u16 reg07 = reg05 + mode->crtc_vdisplay; 138 u16 reg09 = mode->crtc_htotal - 1; 139 u16 reg0b = 1; /* libdlo hardcodes hsync start to 1 */ 140 u16 reg0d = mode->crtc_hsync_end - mode->crtc_hsync_start + 1; 141 u16 reg0f = mode->hdisplay; 142 u16 reg11 = mode->crtc_vtotal; 143 u16 reg13 = 0; /* libdlo hardcodes vsync start to 0 */ 144 u16 reg15 = mode->crtc_vsync_end - mode->crtc_vsync_start; 145 u16 reg17 = mode->crtc_vdisplay; 146 u16 reg1b = mode->clock / 5; 147 148 buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYSTART, reg01); 149 buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYEND, reg03); 150 buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYSTART, reg05); 151 buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYEND, reg07); 152 buf = udl_set_register_lfsr16(buf, UDL_REG_XENDCOUNT, reg09); 153 buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCSTART, reg0b); 154 buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCEND, reg0d); 155 buf = udl_set_register_16(buf, UDL_REG_HPIXELS, reg0f); 156 buf = udl_set_register_lfsr16(buf, UDL_REG_YENDCOUNT, reg11); 157 buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCSTART, reg13); 158 buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCEND, reg15); 159 buf = udl_set_register_16(buf, UDL_REG_VPIXELS, reg17); 160 buf = udl_set_register_16be(buf, UDL_REG_PIXELCLOCK5KHZ, reg1b); 161 162 return buf; 163 } 164 165 static char *udl_dummy_render(char *wrptr) 166 { 167 *wrptr++ = 0xAF; 168 *wrptr++ = 0x6A; /* copy */ 169 *wrptr++ = 0x00; /* from addr */ 170 *wrptr++ = 0x00; 171 *wrptr++ = 0x00; 172 *wrptr++ = 0x01; /* one pixel */ 173 *wrptr++ = 0x00; /* to address */ 174 *wrptr++ = 0x00; 175 *wrptr++ = 0x00; 176 return wrptr; 177 } 178 179 static long udl_log_cpp(unsigned int cpp) 180 { 181 if (WARN_ON(!is_power_of_2(cpp))) 182 return -EINVAL; 183 return __ffs(cpp); 184 } 185 186 static int udl_handle_damage(struct drm_framebuffer *fb, 187 const struct iosys_map *map, 188 const struct drm_rect *clip) 189 { 190 struct drm_device *dev = fb->dev; 191 void *vaddr = map->vaddr; /* TODO: Use mapping abstraction properly */ 192 int i, ret; 193 char *cmd; 194 struct urb *urb; 195 int log_bpp; 196 197 ret = udl_log_cpp(fb->format->cpp[0]); 198 if (ret < 0) 199 return ret; 200 log_bpp = ret; 201 202 urb = udl_get_urb(dev); 203 if (!urb) 204 return -ENOMEM; 205 cmd = urb->transfer_buffer; 206 207 for (i = clip->y1; i < clip->y2; i++) { 208 const int line_offset = fb->pitches[0] * i; 209 const int byte_offset = line_offset + (clip->x1 << log_bpp); 210 const int dev_byte_offset = (fb->width * i + clip->x1) << log_bpp; 211 const int byte_width = drm_rect_width(clip) << log_bpp; 212 ret = udl_render_hline(dev, log_bpp, &urb, (char *)vaddr, 213 &cmd, byte_offset, dev_byte_offset, 214 byte_width); 215 if (ret) 216 return ret; 217 } 218 219 if (cmd > (char *)urb->transfer_buffer) { 220 /* Send partial buffer remaining before exiting */ 221 int len; 222 if (cmd < (char *)urb->transfer_buffer + urb->transfer_buffer_length) 223 *cmd++ = 0xAF; 224 len = cmd - (char *)urb->transfer_buffer; 225 ret = udl_submit_urb(dev, urb, len); 226 } else { 227 udl_urb_completion(urb); 228 } 229 230 return 0; 231 } 232 233 /* 234 * Primary plane 235 */ 236 237 static const uint32_t udl_primary_plane_formats[] = { 238 DRM_FORMAT_RGB565, 239 DRM_FORMAT_XRGB8888, 240 }; 241 242 static const uint64_t udl_primary_plane_fmtmods[] = { 243 DRM_FORMAT_MOD_LINEAR, 244 DRM_FORMAT_MOD_INVALID 245 }; 246 247 static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane, 248 struct drm_atomic_state *state) 249 { 250 struct drm_device *dev = plane->dev; 251 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 252 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 253 struct drm_framebuffer *fb = plane_state->fb; 254 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 255 struct drm_atomic_helper_damage_iter iter; 256 struct drm_rect damage; 257 int ret, idx; 258 259 if (!fb) 260 return; /* no framebuffer; plane is disabled */ 261 262 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 263 if (ret) 264 return; 265 266 if (!drm_dev_enter(dev, &idx)) 267 goto out_drm_gem_fb_end_cpu_access; 268 269 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 270 drm_atomic_for_each_plane_damage(&iter, &damage) { 271 udl_handle_damage(fb, &shadow_plane_state->data[0], &damage); 272 } 273 274 drm_dev_exit(idx); 275 276 out_drm_gem_fb_end_cpu_access: 277 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 278 } 279 280 static const struct drm_plane_helper_funcs udl_primary_plane_helper_funcs = { 281 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 282 .atomic_check = drm_plane_helper_atomic_check, 283 .atomic_update = udl_primary_plane_helper_atomic_update, 284 }; 285 286 static const struct drm_plane_funcs udl_primary_plane_funcs = { 287 .update_plane = drm_atomic_helper_update_plane, 288 .disable_plane = drm_atomic_helper_disable_plane, 289 .destroy = drm_plane_cleanup, 290 DRM_GEM_SHADOW_PLANE_FUNCS, 291 }; 292 293 /* 294 * CRTC 295 */ 296 297 static int udl_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) 298 { 299 struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 300 301 return drm_atomic_helper_check_crtc_state(new_crtc_state, false); 302 } 303 304 static void udl_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 305 { 306 struct drm_device *dev = crtc->dev; 307 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 308 struct drm_display_mode *mode = &crtc_state->mode; 309 struct urb *urb; 310 char *buf; 311 int idx; 312 313 if (!drm_dev_enter(dev, &idx)) 314 return; 315 316 urb = udl_get_urb(dev); 317 if (!urb) 318 goto out; 319 320 buf = (char *)urb->transfer_buffer; 321 buf = udl_vidreg_lock(buf); 322 buf = udl_set_color_depth(buf, UDL_COLORDEPTH_16BPP); 323 /* set base for 16bpp segment to 0 */ 324 buf = udl_set_base16bpp(buf, 0); 325 /* set base for 8bpp segment to end of fb */ 326 buf = udl_set_base8bpp(buf, 2 * mode->vdisplay * mode->hdisplay); 327 buf = udl_set_display_mode(buf, mode); 328 buf = udl_set_blank_mode(buf, UDL_BLANKMODE_ON); 329 buf = udl_vidreg_unlock(buf); 330 buf = udl_dummy_render(buf); 331 332 udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer); 333 334 out: 335 drm_dev_exit(idx); 336 } 337 338 static void udl_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 339 { 340 struct drm_device *dev = crtc->dev; 341 struct urb *urb; 342 char *buf; 343 int idx; 344 345 if (!drm_dev_enter(dev, &idx)) 346 return; 347 348 urb = udl_get_urb(dev); 349 if (!urb) 350 goto out; 351 352 buf = (char *)urb->transfer_buffer; 353 buf = udl_vidreg_lock(buf); 354 buf = udl_set_blank_mode(buf, UDL_BLANKMODE_POWERDOWN); 355 buf = udl_vidreg_unlock(buf); 356 buf = udl_dummy_render(buf); 357 358 udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer); 359 360 out: 361 drm_dev_exit(idx); 362 } 363 364 static const struct drm_crtc_helper_funcs udl_crtc_helper_funcs = { 365 .atomic_check = udl_crtc_helper_atomic_check, 366 .atomic_enable = udl_crtc_helper_atomic_enable, 367 .atomic_disable = udl_crtc_helper_atomic_disable, 368 }; 369 370 static const struct drm_crtc_funcs udl_crtc_funcs = { 371 .reset = drm_atomic_helper_crtc_reset, 372 .destroy = drm_crtc_cleanup, 373 .set_config = drm_atomic_helper_set_config, 374 .page_flip = drm_atomic_helper_page_flip, 375 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 376 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 377 }; 378 379 /* 380 * Encoder 381 */ 382 383 static const struct drm_encoder_funcs udl_encoder_funcs = { 384 .destroy = drm_encoder_cleanup, 385 }; 386 387 /* 388 * Connector 389 */ 390 391 static int udl_connector_helper_get_modes(struct drm_connector *connector) 392 { 393 struct udl_connector *udl_connector = to_udl_connector(connector); 394 395 drm_connector_update_edid_property(connector, udl_connector->edid); 396 if (udl_connector->edid) 397 return drm_add_edid_modes(connector, udl_connector->edid); 398 399 return 0; 400 } 401 402 static const struct drm_connector_helper_funcs udl_connector_helper_funcs = { 403 .get_modes = udl_connector_helper_get_modes, 404 }; 405 406 static int udl_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len) 407 { 408 struct udl_device *udl = data; 409 struct drm_device *dev = &udl->drm; 410 struct usb_device *udev = udl_to_usb_device(udl); 411 u8 *read_buff; 412 int ret; 413 size_t i; 414 415 read_buff = kmalloc(2, GFP_KERNEL); 416 if (!read_buff) 417 return -ENOMEM; 418 419 for (i = 0; i < len; i++) { 420 int bval = (i + block * EDID_LENGTH) << 8; 421 422 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), 423 0x02, (0x80 | (0x02 << 5)), bval, 424 0xA1, read_buff, 2, USB_CTRL_GET_TIMEOUT); 425 if (ret < 0) { 426 drm_err(dev, "Read EDID byte %zu failed err %x\n", i, ret); 427 goto err_kfree; 428 } else if (ret < 1) { 429 ret = -EIO; 430 drm_err(dev, "Read EDID byte %zu failed\n", i); 431 goto err_kfree; 432 } 433 434 buf[i] = read_buff[1]; 435 } 436 437 kfree(read_buff); 438 439 return 0; 440 441 err_kfree: 442 kfree(read_buff); 443 return ret; 444 } 445 446 static enum drm_connector_status udl_connector_detect(struct drm_connector *connector, bool force) 447 { 448 struct drm_device *dev = connector->dev; 449 struct udl_device *udl = to_udl(dev); 450 struct udl_connector *udl_connector = to_udl_connector(connector); 451 enum drm_connector_status status = connector_status_disconnected; 452 int idx; 453 454 /* cleanup previous EDID */ 455 kfree(udl_connector->edid); 456 udl_connector->edid = NULL; 457 458 if (!drm_dev_enter(dev, &idx)) 459 return connector_status_disconnected; 460 461 udl_connector->edid = drm_do_get_edid(connector, udl_get_edid_block, udl); 462 if (udl_connector->edid) 463 status = connector_status_connected; 464 465 drm_dev_exit(idx); 466 467 return status; 468 } 469 470 static void udl_connector_destroy(struct drm_connector *connector) 471 { 472 struct udl_connector *udl_connector = to_udl_connector(connector); 473 474 drm_connector_cleanup(connector); 475 kfree(udl_connector->edid); 476 kfree(udl_connector); 477 } 478 479 static const struct drm_connector_funcs udl_connector_funcs = { 480 .reset = drm_atomic_helper_connector_reset, 481 .detect = udl_connector_detect, 482 .fill_modes = drm_helper_probe_single_connector_modes, 483 .destroy = udl_connector_destroy, 484 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 485 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 486 }; 487 488 struct drm_connector *udl_connector_init(struct drm_device *dev) 489 { 490 struct udl_connector *udl_connector; 491 struct drm_connector *connector; 492 int ret; 493 494 udl_connector = kzalloc(sizeof(*udl_connector), GFP_KERNEL); 495 if (!udl_connector) 496 return ERR_PTR(-ENOMEM); 497 498 connector = &udl_connector->connector; 499 ret = drm_connector_init(dev, connector, &udl_connector_funcs, DRM_MODE_CONNECTOR_VGA); 500 if (ret) 501 goto err_kfree; 502 503 drm_connector_helper_add(connector, &udl_connector_helper_funcs); 504 505 connector->polled = DRM_CONNECTOR_POLL_HPD | 506 DRM_CONNECTOR_POLL_CONNECT | 507 DRM_CONNECTOR_POLL_DISCONNECT; 508 509 return connector; 510 511 err_kfree: 512 kfree(udl_connector); 513 return ERR_PTR(ret); 514 } 515 516 /* 517 * Modesetting 518 */ 519 520 static enum drm_mode_status udl_mode_config_mode_valid(struct drm_device *dev, 521 const struct drm_display_mode *mode) 522 { 523 struct udl_device *udl = to_udl(dev); 524 525 if (udl->sku_pixel_limit) { 526 if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit) 527 return MODE_MEM; 528 } 529 530 return MODE_OK; 531 } 532 533 static const struct drm_mode_config_funcs udl_mode_config_funcs = { 534 .fb_create = drm_gem_fb_create_with_dirty, 535 .mode_valid = udl_mode_config_mode_valid, 536 .atomic_check = drm_atomic_helper_check, 537 .atomic_commit = drm_atomic_helper_commit, 538 }; 539 540 int udl_modeset_init(struct drm_device *dev) 541 { 542 struct udl_device *udl = to_udl(dev); 543 struct drm_plane *primary_plane; 544 struct drm_crtc *crtc; 545 struct drm_encoder *encoder; 546 struct drm_connector *connector; 547 int ret; 548 549 ret = drmm_mode_config_init(dev); 550 if (ret) 551 return ret; 552 553 dev->mode_config.min_width = 640; 554 dev->mode_config.min_height = 480; 555 dev->mode_config.max_width = 2048; 556 dev->mode_config.max_height = 2048; 557 dev->mode_config.preferred_depth = 16; 558 dev->mode_config.funcs = &udl_mode_config_funcs; 559 560 primary_plane = &udl->primary_plane; 561 ret = drm_universal_plane_init(dev, primary_plane, 0, 562 &udl_primary_plane_funcs, 563 udl_primary_plane_formats, 564 ARRAY_SIZE(udl_primary_plane_formats), 565 udl_primary_plane_fmtmods, 566 DRM_PLANE_TYPE_PRIMARY, NULL); 567 if (ret) 568 return ret; 569 drm_plane_helper_add(primary_plane, &udl_primary_plane_helper_funcs); 570 drm_plane_enable_fb_damage_clips(primary_plane); 571 572 crtc = &udl->crtc; 573 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 574 &udl_crtc_funcs, NULL); 575 if (ret) 576 return ret; 577 drm_crtc_helper_add(crtc, &udl_crtc_helper_funcs); 578 579 encoder = &udl->encoder; 580 ret = drm_encoder_init(dev, encoder, &udl_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); 581 if (ret) 582 return ret; 583 encoder->possible_crtcs = drm_crtc_mask(crtc); 584 585 connector = udl_connector_init(dev); 586 if (IS_ERR(connector)) 587 return PTR_ERR(connector); 588 ret = drm_connector_attach_encoder(connector, encoder); 589 if (ret) 590 return ret; 591 592 drm_mode_config_reset(dev); 593 594 return 0; 595 } 596