xref: /openbmc/linux/drivers/gpu/drm/udl/udl_modeset.c (revision ca2bd373)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 Red Hat
4  *
5  * based in parts on udlfb.c:
6  * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it>
7  * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com>
8  * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com>
9  */
10 
11 #include <drm/drm_atomic.h>
12 #include <drm/drm_atomic_helper.h>
13 #include <drm/drm_crtc_helper.h>
14 #include <drm/drm_damage_helper.h>
15 #include <drm/drm_drv.h>
16 #include <drm/drm_edid.h>
17 #include <drm/drm_fourcc.h>
18 #include <drm/drm_gem_atomic_helper.h>
19 #include <drm/drm_gem_framebuffer_helper.h>
20 #include <drm/drm_gem_shmem_helper.h>
21 #include <drm/drm_modeset_helper_vtables.h>
22 #include <drm/drm_plane_helper.h>
23 #include <drm/drm_probe_helper.h>
24 #include <drm/drm_vblank.h>
25 
26 #include "udl_drv.h"
27 
28 #define UDL_COLOR_DEPTH_16BPP	0
29 
30 /*
31  * All DisplayLink bulk operations start with 0xAF, followed by specific code
32  * All operations are written to buffers which then later get sent to device
33  */
34 static char *udl_set_register(char *buf, u8 reg, u8 val)
35 {
36 	*buf++ = 0xAF;
37 	*buf++ = 0x20;
38 	*buf++ = reg;
39 	*buf++ = val;
40 	return buf;
41 }
42 
43 static char *udl_vidreg_lock(char *buf)
44 {
45 	return udl_set_register(buf, 0xFF, 0x00);
46 }
47 
48 static char *udl_vidreg_unlock(char *buf)
49 {
50 	return udl_set_register(buf, 0xFF, 0xFF);
51 }
52 
53 static char *udl_set_blank_mode(char *buf, u8 mode)
54 {
55 	return udl_set_register(buf, UDL_REG_BLANK_MODE, mode);
56 }
57 
58 static char *udl_set_color_depth(char *buf, u8 selection)
59 {
60 	return udl_set_register(buf, 0x00, selection);
61 }
62 
63 static char *udl_set_base16bpp(char *wrptr, u32 base)
64 {
65 	/* the base pointer is 16 bits wide, 0x20 is hi byte. */
66 	wrptr = udl_set_register(wrptr, 0x20, base >> 16);
67 	wrptr = udl_set_register(wrptr, 0x21, base >> 8);
68 	return udl_set_register(wrptr, 0x22, base);
69 }
70 
71 /*
72  * DisplayLink HW has separate 16bpp and 8bpp framebuffers.
73  * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer
74  */
75 static char *udl_set_base8bpp(char *wrptr, u32 base)
76 {
77 	wrptr = udl_set_register(wrptr, 0x26, base >> 16);
78 	wrptr = udl_set_register(wrptr, 0x27, base >> 8);
79 	return udl_set_register(wrptr, 0x28, base);
80 }
81 
82 static char *udl_set_register_16(char *wrptr, u8 reg, u16 value)
83 {
84 	wrptr = udl_set_register(wrptr, reg, value >> 8);
85 	return udl_set_register(wrptr, reg+1, value);
86 }
87 
88 /*
89  * This is kind of weird because the controller takes some
90  * register values in a different byte order than other registers.
91  */
92 static char *udl_set_register_16be(char *wrptr, u8 reg, u16 value)
93 {
94 	wrptr = udl_set_register(wrptr, reg, value);
95 	return udl_set_register(wrptr, reg+1, value >> 8);
96 }
97 
98 /*
99  * LFSR is linear feedback shift register. The reason we have this is
100  * because the display controller needs to minimize the clock depth of
101  * various counters used in the display path. So this code reverses the
102  * provided value into the lfsr16 value by counting backwards to get
103  * the value that needs to be set in the hardware comparator to get the
104  * same actual count. This makes sense once you read above a couple of
105  * times and think about it from a hardware perspective.
106  */
107 static u16 udl_lfsr16(u16 actual_count)
108 {
109 	u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */
110 
111 	while (actual_count--) {
112 		lv =	 ((lv << 1) |
113 			(((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1))
114 			& 0xFFFF;
115 	}
116 
117 	return (u16) lv;
118 }
119 
120 /*
121  * This does LFSR conversion on the value that is to be written.
122  * See LFSR explanation above for more detail.
123  */
124 static char *udl_set_register_lfsr16(char *wrptr, u8 reg, u16 value)
125 {
126 	return udl_set_register_16(wrptr, reg, udl_lfsr16(value));
127 }
128 
129 /*
130  * This takes a standard fbdev screeninfo struct and all of its monitor mode
131  * details and converts them into the DisplayLink equivalent register commands.
132   ERR(vreg(dev,               0x00, (color_depth == 16) ? 0 : 1));
133   ERR(vreg_lfsr16(dev,        0x01, xDisplayStart));
134   ERR(vreg_lfsr16(dev,        0x03, xDisplayEnd));
135   ERR(vreg_lfsr16(dev,        0x05, yDisplayStart));
136   ERR(vreg_lfsr16(dev,        0x07, yDisplayEnd));
137   ERR(vreg_lfsr16(dev,        0x09, xEndCount));
138   ERR(vreg_lfsr16(dev,        0x0B, hSyncStart));
139   ERR(vreg_lfsr16(dev,        0x0D, hSyncEnd));
140   ERR(vreg_big_endian(dev,    0x0F, hPixels));
141   ERR(vreg_lfsr16(dev,        0x11, yEndCount));
142   ERR(vreg_lfsr16(dev,        0x13, vSyncStart));
143   ERR(vreg_lfsr16(dev,        0x15, vSyncEnd));
144   ERR(vreg_big_endian(dev,    0x17, vPixels));
145   ERR(vreg_little_endian(dev, 0x1B, pixelClock5KHz));
146 
147   ERR(vreg(dev,               0x1F, 0));
148 
149   ERR(vbuf(dev, WRITE_VIDREG_UNLOCK, DSIZEOF(WRITE_VIDREG_UNLOCK)));
150  */
151 static char *udl_set_vid_cmds(char *wrptr, struct drm_display_mode *mode)
152 {
153 	u16 xds, yds;
154 	u16 xde, yde;
155 	u16 yec;
156 
157 	/* x display start */
158 	xds = mode->crtc_htotal - mode->crtc_hsync_start;
159 	wrptr = udl_set_register_lfsr16(wrptr, 0x01, xds);
160 	/* x display end */
161 	xde = xds + mode->crtc_hdisplay;
162 	wrptr = udl_set_register_lfsr16(wrptr, 0x03, xde);
163 
164 	/* y display start */
165 	yds = mode->crtc_vtotal - mode->crtc_vsync_start;
166 	wrptr = udl_set_register_lfsr16(wrptr, 0x05, yds);
167 	/* y display end */
168 	yde = yds + mode->crtc_vdisplay;
169 	wrptr = udl_set_register_lfsr16(wrptr, 0x07, yde);
170 
171 	/* x end count is active + blanking - 1 */
172 	wrptr = udl_set_register_lfsr16(wrptr, 0x09,
173 					mode->crtc_htotal - 1);
174 
175 	/* libdlo hardcodes hsync start to 1 */
176 	wrptr = udl_set_register_lfsr16(wrptr, 0x0B, 1);
177 
178 	/* hsync end is width of sync pulse + 1 */
179 	wrptr = udl_set_register_lfsr16(wrptr, 0x0D,
180 					mode->crtc_hsync_end - mode->crtc_hsync_start + 1);
181 
182 	/* hpixels is active pixels */
183 	wrptr = udl_set_register_16(wrptr, 0x0F, mode->hdisplay);
184 
185 	/* yendcount is vertical active + vertical blanking */
186 	yec = mode->crtc_vtotal;
187 	wrptr = udl_set_register_lfsr16(wrptr, 0x11, yec);
188 
189 	/* libdlo hardcodes vsync start to 0 */
190 	wrptr = udl_set_register_lfsr16(wrptr, 0x13, 0);
191 
192 	/* vsync end is width of vsync pulse */
193 	wrptr = udl_set_register_lfsr16(wrptr, 0x15, mode->crtc_vsync_end - mode->crtc_vsync_start);
194 
195 	/* vpixels is active pixels */
196 	wrptr = udl_set_register_16(wrptr, 0x17, mode->crtc_vdisplay);
197 
198 	wrptr = udl_set_register_16be(wrptr, 0x1B,
199 				      mode->clock / 5);
200 
201 	return wrptr;
202 }
203 
204 static char *udl_dummy_render(char *wrptr)
205 {
206 	*wrptr++ = 0xAF;
207 	*wrptr++ = 0x6A; /* copy */
208 	*wrptr++ = 0x00; /* from addr */
209 	*wrptr++ = 0x00;
210 	*wrptr++ = 0x00;
211 	*wrptr++ = 0x01; /* one pixel */
212 	*wrptr++ = 0x00; /* to address */
213 	*wrptr++ = 0x00;
214 	*wrptr++ = 0x00;
215 	return wrptr;
216 }
217 
218 static long udl_log_cpp(unsigned int cpp)
219 {
220 	if (WARN_ON(!is_power_of_2(cpp)))
221 		return -EINVAL;
222 	return __ffs(cpp);
223 }
224 
225 static int udl_handle_damage(struct drm_framebuffer *fb,
226 			     const struct iosys_map *map,
227 			     const struct drm_rect *clip)
228 {
229 	struct drm_device *dev = fb->dev;
230 	void *vaddr = map->vaddr; /* TODO: Use mapping abstraction properly */
231 	int i, ret;
232 	char *cmd;
233 	struct urb *urb;
234 	int log_bpp;
235 
236 	ret = udl_log_cpp(fb->format->cpp[0]);
237 	if (ret < 0)
238 		return ret;
239 	log_bpp = ret;
240 
241 	ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
242 	if (ret)
243 		return ret;
244 
245 	urb = udl_get_urb(dev);
246 	if (!urb) {
247 		ret = -ENOMEM;
248 		goto out_drm_gem_fb_end_cpu_access;
249 	}
250 	cmd = urb->transfer_buffer;
251 
252 	for (i = clip->y1; i < clip->y2; i++) {
253 		const int line_offset = fb->pitches[0] * i;
254 		const int byte_offset = line_offset + (clip->x1 << log_bpp);
255 		const int dev_byte_offset = (fb->width * i + clip->x1) << log_bpp;
256 		const int byte_width = drm_rect_width(clip) << log_bpp;
257 		ret = udl_render_hline(dev, log_bpp, &urb, (char *)vaddr,
258 				       &cmd, byte_offset, dev_byte_offset,
259 				       byte_width);
260 		if (ret)
261 			goto out_drm_gem_fb_end_cpu_access;
262 	}
263 
264 	if (cmd > (char *)urb->transfer_buffer) {
265 		/* Send partial buffer remaining before exiting */
266 		int len;
267 		if (cmd < (char *)urb->transfer_buffer + urb->transfer_buffer_length)
268 			*cmd++ = 0xAF;
269 		len = cmd - (char *)urb->transfer_buffer;
270 		ret = udl_submit_urb(dev, urb, len);
271 	} else {
272 		udl_urb_completion(urb);
273 	}
274 
275 	ret = 0;
276 
277 out_drm_gem_fb_end_cpu_access:
278 	drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
279 	return ret;
280 }
281 
282 /*
283  * Primary plane
284  */
285 
286 static const uint32_t udl_primary_plane_formats[] = {
287 	DRM_FORMAT_RGB565,
288 	DRM_FORMAT_XRGB8888,
289 };
290 
291 static const uint64_t udl_primary_plane_fmtmods[] = {
292 	DRM_FORMAT_MOD_LINEAR,
293 	DRM_FORMAT_MOD_INVALID
294 };
295 
296 static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane,
297 						   struct drm_atomic_state *state)
298 {
299 	struct drm_device *dev = plane->dev;
300 	struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
301 	struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
302 	struct drm_framebuffer *fb = plane_state->fb;
303 	struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
304 	struct drm_rect rect;
305 	int idx;
306 
307 	if (!drm_dev_enter(dev, &idx))
308 		return;
309 
310 	if (!fb)
311 		return; /* no framebuffer; plane is disabled */
312 
313 	if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &rect))
314 		udl_handle_damage(fb, &shadow_plane_state->data[0], &rect);
315 
316 	drm_dev_exit(idx);
317 }
318 
319 static const struct drm_plane_helper_funcs udl_primary_plane_helper_funcs = {
320 	DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
321 	.atomic_check = drm_plane_helper_atomic_check,
322 	.atomic_update = udl_primary_plane_helper_atomic_update,
323 };
324 
325 static const struct drm_plane_funcs udl_primary_plane_funcs = {
326 	.update_plane = drm_atomic_helper_update_plane,
327 	.disable_plane = drm_atomic_helper_disable_plane,
328 	.destroy = drm_plane_cleanup,
329 	DRM_GEM_SHADOW_PLANE_FUNCS,
330 };
331 
332 /*
333  * CRTC
334  */
335 
336 static int udl_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
337 {
338 	struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
339 
340 	return drm_atomic_helper_check_crtc_state(new_crtc_state, false);
341 }
342 
343 static void udl_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)
344 {
345 	struct drm_device *dev = crtc->dev;
346 	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
347 	struct drm_display_mode *mode = &crtc_state->mode;
348 	struct urb *urb;
349 	char *buf;
350 	int idx;
351 
352 	if (!drm_dev_enter(dev, &idx))
353 		return;
354 
355 	urb = udl_get_urb(dev);
356 	if (!urb)
357 		goto out;
358 
359 	buf = (char *)urb->transfer_buffer;
360 	buf = udl_vidreg_lock(buf);
361 	buf = udl_set_color_depth(buf, UDL_COLOR_DEPTH_16BPP);
362 	/* set base for 16bpp segment to 0 */
363 	buf = udl_set_base16bpp(buf, 0);
364 	/* set base for 8bpp segment to end of fb */
365 	buf = udl_set_base8bpp(buf, 2 * mode->vdisplay * mode->hdisplay);
366 	buf = udl_set_vid_cmds(buf, mode);
367 	buf = udl_set_blank_mode(buf, UDL_BLANK_MODE_ON);
368 	buf = udl_vidreg_unlock(buf);
369 	buf = udl_dummy_render(buf);
370 
371 	udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer);
372 
373 out:
374 	drm_dev_exit(idx);
375 }
376 
377 static void udl_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)
378 {
379 	struct drm_device *dev = crtc->dev;
380 	struct urb *urb;
381 	char *buf;
382 	int idx;
383 
384 	if (!drm_dev_enter(dev, &idx))
385 		return;
386 
387 	urb = udl_get_urb(dev);
388 	if (!urb)
389 		goto out;
390 
391 	buf = (char *)urb->transfer_buffer;
392 	buf = udl_vidreg_lock(buf);
393 	buf = udl_set_blank_mode(buf, UDL_BLANK_MODE_POWERDOWN);
394 	buf = udl_vidreg_unlock(buf);
395 	buf = udl_dummy_render(buf);
396 
397 	udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer);
398 
399 out:
400 	drm_dev_exit(idx);
401 }
402 
403 static const struct drm_crtc_helper_funcs udl_crtc_helper_funcs = {
404 	.atomic_check = udl_crtc_helper_atomic_check,
405 	.atomic_enable = udl_crtc_helper_atomic_enable,
406 	.atomic_disable = udl_crtc_helper_atomic_disable,
407 };
408 
409 static const struct drm_crtc_funcs udl_crtc_funcs = {
410 	.reset = drm_atomic_helper_crtc_reset,
411 	.destroy = drm_crtc_cleanup,
412 	.set_config = drm_atomic_helper_set_config,
413 	.page_flip = drm_atomic_helper_page_flip,
414 	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
415 	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
416 };
417 
418 /*
419  * Encoder
420  */
421 
422 static const struct drm_encoder_funcs udl_encoder_funcs = {
423 	.destroy = drm_encoder_cleanup,
424 };
425 
426 /*
427  * Connector
428  */
429 
430 static int udl_connector_helper_get_modes(struct drm_connector *connector)
431 {
432 	struct udl_connector *udl_connector = to_udl_connector(connector);
433 
434 	drm_connector_update_edid_property(connector, udl_connector->edid);
435 	if (udl_connector->edid)
436 		return drm_add_edid_modes(connector, udl_connector->edid);
437 
438 	return 0;
439 }
440 
441 static const struct drm_connector_helper_funcs udl_connector_helper_funcs = {
442 	.get_modes = udl_connector_helper_get_modes,
443 };
444 
445 static int udl_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
446 {
447 	struct udl_device *udl = data;
448 	struct drm_device *dev = &udl->drm;
449 	struct usb_device *udev = udl_to_usb_device(udl);
450 	u8 *read_buff;
451 	int ret;
452 	size_t i;
453 
454 	read_buff = kmalloc(2, GFP_KERNEL);
455 	if (!read_buff)
456 		return -ENOMEM;
457 
458 	for (i = 0; i < len; i++) {
459 		int bval = (i + block * EDID_LENGTH) << 8;
460 
461 		ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
462 				      0x02, (0x80 | (0x02 << 5)), bval,
463 				      0xA1, read_buff, 2, USB_CTRL_GET_TIMEOUT);
464 		if (ret < 0) {
465 			drm_err(dev, "Read EDID byte %zu failed err %x\n", i, ret);
466 			goto err_kfree;
467 		} else if (ret < 1) {
468 			ret = -EIO;
469 			drm_err(dev, "Read EDID byte %zu failed\n", i);
470 			goto err_kfree;
471 		}
472 
473 		buf[i] = read_buff[1];
474 	}
475 
476 	kfree(read_buff);
477 
478 	return 0;
479 
480 err_kfree:
481 	kfree(read_buff);
482 	return ret;
483 }
484 
485 static enum drm_connector_status udl_connector_detect(struct drm_connector *connector, bool force)
486 {
487 	struct drm_device *dev = connector->dev;
488 	struct udl_device *udl = to_udl(dev);
489 	struct udl_connector *udl_connector = to_udl_connector(connector);
490 	enum drm_connector_status status = connector_status_disconnected;
491 	int idx;
492 
493 	/* cleanup previous EDID */
494 	kfree(udl_connector->edid);
495 	udl_connector->edid = NULL;
496 
497 	if (!drm_dev_enter(dev, &idx))
498 		return connector_status_disconnected;
499 
500 	udl_connector->edid = drm_do_get_edid(connector, udl_get_edid_block, udl);
501 	if (udl_connector->edid)
502 		status = connector_status_connected;
503 
504 	drm_dev_exit(idx);
505 
506 	return status;
507 }
508 
509 static void udl_connector_destroy(struct drm_connector *connector)
510 {
511 	struct udl_connector *udl_connector = to_udl_connector(connector);
512 
513 	drm_connector_cleanup(connector);
514 	kfree(udl_connector->edid);
515 	kfree(udl_connector);
516 }
517 
518 static const struct drm_connector_funcs udl_connector_funcs = {
519 	.reset = drm_atomic_helper_connector_reset,
520 	.detect = udl_connector_detect,
521 	.fill_modes = drm_helper_probe_single_connector_modes,
522 	.destroy = udl_connector_destroy,
523 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
524 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
525 };
526 
527 struct drm_connector *udl_connector_init(struct drm_device *dev)
528 {
529 	struct udl_connector *udl_connector;
530 	struct drm_connector *connector;
531 	int ret;
532 
533 	udl_connector = kzalloc(sizeof(*udl_connector), GFP_KERNEL);
534 	if (!udl_connector)
535 		return ERR_PTR(-ENOMEM);
536 
537 	connector = &udl_connector->connector;
538 	ret = drm_connector_init(dev, connector, &udl_connector_funcs, DRM_MODE_CONNECTOR_VGA);
539 	if (ret)
540 		goto err_kfree;
541 
542 	drm_connector_helper_add(connector, &udl_connector_helper_funcs);
543 
544 	connector->polled = DRM_CONNECTOR_POLL_HPD |
545 			    DRM_CONNECTOR_POLL_CONNECT |
546 			    DRM_CONNECTOR_POLL_DISCONNECT;
547 
548 	return connector;
549 
550 err_kfree:
551 	kfree(udl_connector);
552 	return ERR_PTR(ret);
553 }
554 
555 /*
556  * Modesetting
557  */
558 
559 static enum drm_mode_status udl_mode_config_mode_valid(struct drm_device *dev,
560 						       const struct drm_display_mode *mode)
561 {
562 	struct udl_device *udl = to_udl(dev);
563 
564 	if (udl->sku_pixel_limit) {
565 		if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit)
566 			return MODE_MEM;
567 	}
568 
569 	return MODE_OK;
570 }
571 
572 static const struct drm_mode_config_funcs udl_mode_config_funcs = {
573 	.fb_create = drm_gem_fb_create_with_dirty,
574 	.mode_valid = udl_mode_config_mode_valid,
575 	.atomic_check  = drm_atomic_helper_check,
576 	.atomic_commit = drm_atomic_helper_commit,
577 };
578 
579 int udl_modeset_init(struct drm_device *dev)
580 {
581 	struct udl_device *udl = to_udl(dev);
582 	struct drm_plane *primary_plane;
583 	struct drm_crtc *crtc;
584 	struct drm_encoder *encoder;
585 	struct drm_connector *connector;
586 	int ret;
587 
588 	ret = drmm_mode_config_init(dev);
589 	if (ret)
590 		return ret;
591 
592 	dev->mode_config.min_width = 640;
593 	dev->mode_config.min_height = 480;
594 	dev->mode_config.max_width = 2048;
595 	dev->mode_config.max_height = 2048;
596 	dev->mode_config.preferred_depth = 16;
597 	dev->mode_config.funcs = &udl_mode_config_funcs;
598 
599 	primary_plane = &udl->primary_plane;
600 	ret = drm_universal_plane_init(dev, primary_plane, 0,
601 				       &udl_primary_plane_funcs,
602 				       udl_primary_plane_formats,
603 				       ARRAY_SIZE(udl_primary_plane_formats),
604 				       udl_primary_plane_fmtmods,
605 				       DRM_PLANE_TYPE_PRIMARY, NULL);
606 	if (ret)
607 		return ret;
608 	drm_plane_helper_add(primary_plane, &udl_primary_plane_helper_funcs);
609 	drm_plane_enable_fb_damage_clips(primary_plane);
610 
611 	crtc = &udl->crtc;
612 	ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,
613 					&udl_crtc_funcs, NULL);
614 	if (ret)
615 		return ret;
616 	drm_crtc_helper_add(crtc, &udl_crtc_helper_funcs);
617 
618 	encoder = &udl->encoder;
619 	ret = drm_encoder_init(dev, encoder, &udl_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
620 	if (ret)
621 		return ret;
622 	encoder->possible_crtcs = drm_crtc_mask(crtc);
623 
624 	connector = udl_connector_init(dev);
625 	if (IS_ERR(connector))
626 		return PTR_ERR(connector);
627 	ret = drm_connector_attach_encoder(connector, encoder);
628 	if (ret)
629 		return ret;
630 
631 	drm_mode_config_reset(dev);
632 
633 	return 0;
634 }
635