1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Red Hat 4 * 5 * based in parts on udlfb.c: 6 * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it> 7 * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com> 8 * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com> 9 */ 10 11 #include <linux/bitfield.h> 12 13 #include <drm/drm_atomic.h> 14 #include <drm/drm_atomic_helper.h> 15 #include <drm/drm_damage_helper.h> 16 #include <drm/drm_drv.h> 17 #include <drm/drm_edid.h> 18 #include <drm/drm_fourcc.h> 19 #include <drm/drm_gem_atomic_helper.h> 20 #include <drm/drm_gem_framebuffer_helper.h> 21 #include <drm/drm_gem_shmem_helper.h> 22 #include <drm/drm_modeset_helper_vtables.h> 23 #include <drm/drm_plane_helper.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "udl_drv.h" 28 #include "udl_proto.h" 29 30 /* 31 * All DisplayLink bulk operations start with 0xaf (UDL_MSG_BULK), followed by 32 * a specific command code. All operations are written to a command buffer, which 33 * the driver sends to the device. 34 */ 35 static char *udl_set_register(char *buf, u8 reg, u8 val) 36 { 37 *buf++ = UDL_MSG_BULK; 38 *buf++ = UDL_CMD_WRITEREG; 39 *buf++ = reg; 40 *buf++ = val; 41 42 return buf; 43 } 44 45 static char *udl_vidreg_lock(char *buf) 46 { 47 return udl_set_register(buf, UDL_REG_VIDREG, UDL_VIDREG_LOCK); 48 } 49 50 static char *udl_vidreg_unlock(char *buf) 51 { 52 return udl_set_register(buf, UDL_REG_VIDREG, UDL_VIDREG_UNLOCK); 53 } 54 55 static char *udl_set_blank_mode(char *buf, u8 mode) 56 { 57 return udl_set_register(buf, UDL_REG_BLANKMODE, mode); 58 } 59 60 static char *udl_set_color_depth(char *buf, u8 selection) 61 { 62 return udl_set_register(buf, UDL_REG_COLORDEPTH, selection); 63 } 64 65 static char *udl_set_base16bpp(char *buf, u32 base) 66 { 67 /* the base pointer is 24 bits wide, 0x20 is hi byte. */ 68 u8 reg20 = FIELD_GET(UDL_BASE_ADDR2_MASK, base); 69 u8 reg21 = FIELD_GET(UDL_BASE_ADDR1_MASK, base); 70 u8 reg22 = FIELD_GET(UDL_BASE_ADDR0_MASK, base); 71 72 buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR2, reg20); 73 buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR1, reg21); 74 buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR0, reg22); 75 76 return buf; 77 } 78 79 /* 80 * DisplayLink HW has separate 16bpp and 8bpp framebuffers. 81 * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer 82 */ 83 static char *udl_set_base8bpp(char *buf, u32 base) 84 { 85 /* the base pointer is 24 bits wide, 0x26 is hi byte. */ 86 u8 reg26 = FIELD_GET(UDL_BASE_ADDR2_MASK, base); 87 u8 reg27 = FIELD_GET(UDL_BASE_ADDR1_MASK, base); 88 u8 reg28 = FIELD_GET(UDL_BASE_ADDR0_MASK, base); 89 90 buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR2, reg26); 91 buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR1, reg27); 92 buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR0, reg28); 93 94 return buf; 95 } 96 97 static char *udl_set_register_16(char *wrptr, u8 reg, u16 value) 98 { 99 wrptr = udl_set_register(wrptr, reg, value >> 8); 100 return udl_set_register(wrptr, reg+1, value); 101 } 102 103 /* 104 * This is kind of weird because the controller takes some 105 * register values in a different byte order than other registers. 106 */ 107 static char *udl_set_register_16be(char *wrptr, u8 reg, u16 value) 108 { 109 wrptr = udl_set_register(wrptr, reg, value); 110 return udl_set_register(wrptr, reg+1, value >> 8); 111 } 112 113 /* 114 * LFSR is linear feedback shift register. The reason we have this is 115 * because the display controller needs to minimize the clock depth of 116 * various counters used in the display path. So this code reverses the 117 * provided value into the lfsr16 value by counting backwards to get 118 * the value that needs to be set in the hardware comparator to get the 119 * same actual count. This makes sense once you read above a couple of 120 * times and think about it from a hardware perspective. 121 */ 122 static u16 udl_lfsr16(u16 actual_count) 123 { 124 u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */ 125 126 while (actual_count--) { 127 lv = ((lv << 1) | 128 (((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1)) 129 & 0xFFFF; 130 } 131 132 return (u16) lv; 133 } 134 135 /* 136 * This does LFSR conversion on the value that is to be written. 137 * See LFSR explanation above for more detail. 138 */ 139 static char *udl_set_register_lfsr16(char *wrptr, u8 reg, u16 value) 140 { 141 return udl_set_register_16(wrptr, reg, udl_lfsr16(value)); 142 } 143 144 /* 145 * Takes a DRM display mode and converts it into the DisplayLink 146 * equivalent register commands. 147 */ 148 static char *udl_set_display_mode(char *buf, struct drm_display_mode *mode) 149 { 150 u16 reg01 = mode->crtc_htotal - mode->crtc_hsync_start; 151 u16 reg03 = reg01 + mode->crtc_hdisplay; 152 u16 reg05 = mode->crtc_vtotal - mode->crtc_vsync_start; 153 u16 reg07 = reg05 + mode->crtc_vdisplay; 154 u16 reg09 = mode->crtc_htotal - 1; 155 u16 reg0b = 1; /* libdlo hardcodes hsync start to 1 */ 156 u16 reg0d = mode->crtc_hsync_end - mode->crtc_hsync_start + 1; 157 u16 reg0f = mode->hdisplay; 158 u16 reg11 = mode->crtc_vtotal; 159 u16 reg13 = 0; /* libdlo hardcodes vsync start to 0 */ 160 u16 reg15 = mode->crtc_vsync_end - mode->crtc_vsync_start; 161 u16 reg17 = mode->crtc_vdisplay; 162 u16 reg1b = mode->clock / 5; 163 164 buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYSTART, reg01); 165 buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYEND, reg03); 166 buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYSTART, reg05); 167 buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYEND, reg07); 168 buf = udl_set_register_lfsr16(buf, UDL_REG_XENDCOUNT, reg09); 169 buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCSTART, reg0b); 170 buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCEND, reg0d); 171 buf = udl_set_register_16(buf, UDL_REG_HPIXELS, reg0f); 172 buf = udl_set_register_lfsr16(buf, UDL_REG_YENDCOUNT, reg11); 173 buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCSTART, reg13); 174 buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCEND, reg15); 175 buf = udl_set_register_16(buf, UDL_REG_VPIXELS, reg17); 176 buf = udl_set_register_16be(buf, UDL_REG_PIXELCLOCK5KHZ, reg1b); 177 178 return buf; 179 } 180 181 static char *udl_dummy_render(char *wrptr) 182 { 183 *wrptr++ = UDL_MSG_BULK; 184 *wrptr++ = UDL_CMD_WRITECOPY16; 185 *wrptr++ = 0x00; /* from addr */ 186 *wrptr++ = 0x00; 187 *wrptr++ = 0x00; 188 *wrptr++ = 0x01; /* one pixel */ 189 *wrptr++ = 0x00; /* to address */ 190 *wrptr++ = 0x00; 191 *wrptr++ = 0x00; 192 return wrptr; 193 } 194 195 static long udl_log_cpp(unsigned int cpp) 196 { 197 if (WARN_ON(!is_power_of_2(cpp))) 198 return -EINVAL; 199 return __ffs(cpp); 200 } 201 202 static int udl_handle_damage(struct drm_framebuffer *fb, 203 const struct iosys_map *map, 204 const struct drm_rect *clip) 205 { 206 struct drm_device *dev = fb->dev; 207 void *vaddr = map->vaddr; /* TODO: Use mapping abstraction properly */ 208 int i, ret; 209 char *cmd; 210 struct urb *urb; 211 int log_bpp; 212 213 ret = udl_log_cpp(fb->format->cpp[0]); 214 if (ret < 0) 215 return ret; 216 log_bpp = ret; 217 218 urb = udl_get_urb(dev); 219 if (!urb) 220 return -ENOMEM; 221 cmd = urb->transfer_buffer; 222 223 for (i = clip->y1; i < clip->y2; i++) { 224 const int line_offset = fb->pitches[0] * i; 225 const int byte_offset = line_offset + (clip->x1 << log_bpp); 226 const int dev_byte_offset = (fb->width * i + clip->x1) << log_bpp; 227 const int byte_width = drm_rect_width(clip) << log_bpp; 228 ret = udl_render_hline(dev, log_bpp, &urb, (char *)vaddr, 229 &cmd, byte_offset, dev_byte_offset, 230 byte_width); 231 if (ret) 232 return ret; 233 } 234 235 if (cmd > (char *)urb->transfer_buffer) { 236 /* Send partial buffer remaining before exiting */ 237 int len; 238 if (cmd < (char *)urb->transfer_buffer + urb->transfer_buffer_length) 239 *cmd++ = UDL_MSG_BULK; 240 len = cmd - (char *)urb->transfer_buffer; 241 ret = udl_submit_urb(dev, urb, len); 242 } else { 243 udl_urb_completion(urb); 244 } 245 246 return 0; 247 } 248 249 /* 250 * Primary plane 251 */ 252 253 static const uint32_t udl_primary_plane_formats[] = { 254 DRM_FORMAT_RGB565, 255 DRM_FORMAT_XRGB8888, 256 }; 257 258 static const uint64_t udl_primary_plane_fmtmods[] = { 259 DRM_FORMAT_MOD_LINEAR, 260 DRM_FORMAT_MOD_INVALID 261 }; 262 263 static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane, 264 struct drm_atomic_state *state) 265 { 266 struct drm_device *dev = plane->dev; 267 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 268 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 269 struct drm_framebuffer *fb = plane_state->fb; 270 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 271 struct drm_atomic_helper_damage_iter iter; 272 struct drm_rect damage; 273 int ret, idx; 274 275 if (!fb) 276 return; /* no framebuffer; plane is disabled */ 277 278 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 279 if (ret) 280 return; 281 282 if (!drm_dev_enter(dev, &idx)) 283 goto out_drm_gem_fb_end_cpu_access; 284 285 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 286 drm_atomic_for_each_plane_damage(&iter, &damage) { 287 udl_handle_damage(fb, &shadow_plane_state->data[0], &damage); 288 } 289 290 drm_dev_exit(idx); 291 292 out_drm_gem_fb_end_cpu_access: 293 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 294 } 295 296 static const struct drm_plane_helper_funcs udl_primary_plane_helper_funcs = { 297 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 298 .atomic_check = drm_plane_helper_atomic_check, 299 .atomic_update = udl_primary_plane_helper_atomic_update, 300 }; 301 302 static const struct drm_plane_funcs udl_primary_plane_funcs = { 303 .update_plane = drm_atomic_helper_update_plane, 304 .disable_plane = drm_atomic_helper_disable_plane, 305 .destroy = drm_plane_cleanup, 306 DRM_GEM_SHADOW_PLANE_FUNCS, 307 }; 308 309 /* 310 * CRTC 311 */ 312 313 static int udl_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) 314 { 315 struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 316 317 if (!new_crtc_state->enable) 318 return 0; 319 320 return drm_atomic_helper_check_crtc_primary_plane(new_crtc_state); 321 } 322 323 static void udl_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 324 { 325 struct drm_device *dev = crtc->dev; 326 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 327 struct drm_display_mode *mode = &crtc_state->mode; 328 struct urb *urb; 329 char *buf; 330 int idx; 331 332 if (!drm_dev_enter(dev, &idx)) 333 return; 334 335 urb = udl_get_urb(dev); 336 if (!urb) 337 goto out; 338 339 buf = (char *)urb->transfer_buffer; 340 buf = udl_vidreg_lock(buf); 341 buf = udl_set_color_depth(buf, UDL_COLORDEPTH_16BPP); 342 /* set base for 16bpp segment to 0 */ 343 buf = udl_set_base16bpp(buf, 0); 344 /* set base for 8bpp segment to end of fb */ 345 buf = udl_set_base8bpp(buf, 2 * mode->vdisplay * mode->hdisplay); 346 buf = udl_set_display_mode(buf, mode); 347 buf = udl_set_blank_mode(buf, UDL_BLANKMODE_ON); 348 buf = udl_vidreg_unlock(buf); 349 buf = udl_dummy_render(buf); 350 351 udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer); 352 353 out: 354 drm_dev_exit(idx); 355 } 356 357 static void udl_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 358 { 359 struct drm_device *dev = crtc->dev; 360 struct urb *urb; 361 char *buf; 362 int idx; 363 364 if (!drm_dev_enter(dev, &idx)) 365 return; 366 367 urb = udl_get_urb(dev); 368 if (!urb) 369 goto out; 370 371 buf = (char *)urb->transfer_buffer; 372 buf = udl_vidreg_lock(buf); 373 buf = udl_set_blank_mode(buf, UDL_BLANKMODE_POWERDOWN); 374 buf = udl_vidreg_unlock(buf); 375 buf = udl_dummy_render(buf); 376 377 udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer); 378 379 out: 380 drm_dev_exit(idx); 381 } 382 383 static const struct drm_crtc_helper_funcs udl_crtc_helper_funcs = { 384 .atomic_check = udl_crtc_helper_atomic_check, 385 .atomic_enable = udl_crtc_helper_atomic_enable, 386 .atomic_disable = udl_crtc_helper_atomic_disable, 387 }; 388 389 static const struct drm_crtc_funcs udl_crtc_funcs = { 390 .reset = drm_atomic_helper_crtc_reset, 391 .destroy = drm_crtc_cleanup, 392 .set_config = drm_atomic_helper_set_config, 393 .page_flip = drm_atomic_helper_page_flip, 394 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 395 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 396 }; 397 398 /* 399 * Encoder 400 */ 401 402 static const struct drm_encoder_funcs udl_encoder_funcs = { 403 .destroy = drm_encoder_cleanup, 404 }; 405 406 /* 407 * Connector 408 */ 409 410 static int udl_connector_helper_get_modes(struct drm_connector *connector) 411 { 412 struct udl_connector *udl_connector = to_udl_connector(connector); 413 414 drm_connector_update_edid_property(connector, udl_connector->edid); 415 if (udl_connector->edid) 416 return drm_add_edid_modes(connector, udl_connector->edid); 417 418 return 0; 419 } 420 421 static const struct drm_connector_helper_funcs udl_connector_helper_funcs = { 422 .get_modes = udl_connector_helper_get_modes, 423 }; 424 425 static int udl_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len) 426 { 427 struct udl_device *udl = data; 428 struct drm_device *dev = &udl->drm; 429 struct usb_device *udev = udl_to_usb_device(udl); 430 u8 *read_buff; 431 int ret; 432 size_t i; 433 434 read_buff = kmalloc(2, GFP_KERNEL); 435 if (!read_buff) 436 return -ENOMEM; 437 438 for (i = 0; i < len; i++) { 439 int bval = (i + block * EDID_LENGTH) << 8; 440 441 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), 442 0x02, (0x80 | (0x02 << 5)), bval, 443 0xA1, read_buff, 2, USB_CTRL_GET_TIMEOUT); 444 if (ret < 0) { 445 drm_err(dev, "Read EDID byte %zu failed err %x\n", i, ret); 446 goto err_kfree; 447 } else if (ret < 1) { 448 ret = -EIO; 449 drm_err(dev, "Read EDID byte %zu failed\n", i); 450 goto err_kfree; 451 } 452 453 buf[i] = read_buff[1]; 454 } 455 456 kfree(read_buff); 457 458 return 0; 459 460 err_kfree: 461 kfree(read_buff); 462 return ret; 463 } 464 465 static enum drm_connector_status udl_connector_detect(struct drm_connector *connector, bool force) 466 { 467 struct drm_device *dev = connector->dev; 468 struct udl_device *udl = to_udl(dev); 469 struct udl_connector *udl_connector = to_udl_connector(connector); 470 enum drm_connector_status status = connector_status_disconnected; 471 int idx; 472 473 /* cleanup previous EDID */ 474 kfree(udl_connector->edid); 475 udl_connector->edid = NULL; 476 477 if (!drm_dev_enter(dev, &idx)) 478 return connector_status_disconnected; 479 480 udl_connector->edid = drm_do_get_edid(connector, udl_get_edid_block, udl); 481 if (udl_connector->edid) 482 status = connector_status_connected; 483 484 drm_dev_exit(idx); 485 486 return status; 487 } 488 489 static void udl_connector_destroy(struct drm_connector *connector) 490 { 491 struct udl_connector *udl_connector = to_udl_connector(connector); 492 493 drm_connector_cleanup(connector); 494 kfree(udl_connector->edid); 495 kfree(udl_connector); 496 } 497 498 static const struct drm_connector_funcs udl_connector_funcs = { 499 .reset = drm_atomic_helper_connector_reset, 500 .detect = udl_connector_detect, 501 .fill_modes = drm_helper_probe_single_connector_modes, 502 .destroy = udl_connector_destroy, 503 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 504 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 505 }; 506 507 struct drm_connector *udl_connector_init(struct drm_device *dev) 508 { 509 struct udl_connector *udl_connector; 510 struct drm_connector *connector; 511 int ret; 512 513 udl_connector = kzalloc(sizeof(*udl_connector), GFP_KERNEL); 514 if (!udl_connector) 515 return ERR_PTR(-ENOMEM); 516 517 connector = &udl_connector->connector; 518 ret = drm_connector_init(dev, connector, &udl_connector_funcs, DRM_MODE_CONNECTOR_VGA); 519 if (ret) 520 goto err_kfree; 521 522 drm_connector_helper_add(connector, &udl_connector_helper_funcs); 523 524 connector->polled = DRM_CONNECTOR_POLL_HPD | 525 DRM_CONNECTOR_POLL_CONNECT | 526 DRM_CONNECTOR_POLL_DISCONNECT; 527 528 return connector; 529 530 err_kfree: 531 kfree(udl_connector); 532 return ERR_PTR(ret); 533 } 534 535 /* 536 * Modesetting 537 */ 538 539 static enum drm_mode_status udl_mode_config_mode_valid(struct drm_device *dev, 540 const struct drm_display_mode *mode) 541 { 542 struct udl_device *udl = to_udl(dev); 543 544 if (udl->sku_pixel_limit) { 545 if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit) 546 return MODE_MEM; 547 } 548 549 return MODE_OK; 550 } 551 552 static const struct drm_mode_config_funcs udl_mode_config_funcs = { 553 .fb_create = drm_gem_fb_create_with_dirty, 554 .mode_valid = udl_mode_config_mode_valid, 555 .atomic_check = drm_atomic_helper_check, 556 .atomic_commit = drm_atomic_helper_commit, 557 }; 558 559 int udl_modeset_init(struct drm_device *dev) 560 { 561 struct udl_device *udl = to_udl(dev); 562 struct drm_plane *primary_plane; 563 struct drm_crtc *crtc; 564 struct drm_encoder *encoder; 565 struct drm_connector *connector; 566 int ret; 567 568 ret = drmm_mode_config_init(dev); 569 if (ret) 570 return ret; 571 572 dev->mode_config.min_width = 640; 573 dev->mode_config.min_height = 480; 574 dev->mode_config.max_width = 2048; 575 dev->mode_config.max_height = 2048; 576 dev->mode_config.preferred_depth = 16; 577 dev->mode_config.funcs = &udl_mode_config_funcs; 578 579 primary_plane = &udl->primary_plane; 580 ret = drm_universal_plane_init(dev, primary_plane, 0, 581 &udl_primary_plane_funcs, 582 udl_primary_plane_formats, 583 ARRAY_SIZE(udl_primary_plane_formats), 584 udl_primary_plane_fmtmods, 585 DRM_PLANE_TYPE_PRIMARY, NULL); 586 if (ret) 587 return ret; 588 drm_plane_helper_add(primary_plane, &udl_primary_plane_helper_funcs); 589 drm_plane_enable_fb_damage_clips(primary_plane); 590 591 crtc = &udl->crtc; 592 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 593 &udl_crtc_funcs, NULL); 594 if (ret) 595 return ret; 596 drm_crtc_helper_add(crtc, &udl_crtc_helper_funcs); 597 598 encoder = &udl->encoder; 599 ret = drm_encoder_init(dev, encoder, &udl_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); 600 if (ret) 601 return ret; 602 encoder->possible_crtcs = drm_crtc_mask(crtc); 603 604 connector = udl_connector_init(dev); 605 if (IS_ERR(connector)) 606 return PTR_ERR(connector); 607 ret = drm_connector_attach_encoder(connector, encoder); 608 if (ret) 609 return ret; 610 611 drm_mode_config_reset(dev); 612 613 return 0; 614 } 615