1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright 2012-2019 Red Hat 4 * 5 * This file is subject to the terms and conditions of the GNU General 6 * Public License version 2. See the file COPYING in the main 7 * directory of this archive for more details. 8 * 9 * Authors: Matthew Garrett 10 * Dave Airlie 11 * Gerd Hoffmann 12 * 13 * Portions of this code derived from cirrusfb.c: 14 * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets 15 * 16 * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com> 17 */ 18 19 #include <linux/console.h> 20 #include <linux/dma-buf-map.h> 21 #include <linux/module.h> 22 #include <linux/pci.h> 23 24 #include <video/cirrus.h> 25 #include <video/vga.h> 26 27 #include <drm/drm_atomic_helper.h> 28 #include <drm/drm_atomic_state_helper.h> 29 #include <drm/drm_connector.h> 30 #include <drm/drm_damage_helper.h> 31 #include <drm/drm_drv.h> 32 #include <drm/drm_fb_helper.h> 33 #include <drm/drm_file.h> 34 #include <drm/drm_format_helper.h> 35 #include <drm/drm_fourcc.h> 36 #include <drm/drm_gem_shmem_helper.h> 37 #include <drm/drm_gem_framebuffer_helper.h> 38 #include <drm/drm_ioctl.h> 39 #include <drm/drm_managed.h> 40 #include <drm/drm_modeset_helper_vtables.h> 41 #include <drm/drm_probe_helper.h> 42 #include <drm/drm_simple_kms_helper.h> 43 44 #define DRIVER_NAME "cirrus" 45 #define DRIVER_DESC "qemu cirrus vga" 46 #define DRIVER_DATE "2019" 47 #define DRIVER_MAJOR 2 48 #define DRIVER_MINOR 0 49 50 #define CIRRUS_MAX_PITCH (0x1FF << 3) /* (4096 - 1) & ~111b bytes */ 51 #define CIRRUS_VRAM_SIZE (4 * 1024 * 1024) /* 4 MB */ 52 53 struct cirrus_device { 54 struct drm_device dev; 55 struct drm_simple_display_pipe pipe; 56 struct drm_connector conn; 57 unsigned int cpp; 58 unsigned int pitch; 59 void __iomem *vram; 60 void __iomem *mmio; 61 }; 62 63 #define to_cirrus(_dev) container_of(_dev, struct cirrus_device, dev) 64 65 /* ------------------------------------------------------------------ */ 66 /* 67 * The meat of this driver. The core passes us a mode and we have to program 68 * it. The modesetting here is the bare minimum required to satisfy the qemu 69 * emulation of this hardware, and running this against a real device is 70 * likely to result in an inadequately programmed mode. We've already had 71 * the opportunity to modify the mode, so whatever we receive here should 72 * be something that can be correctly programmed and displayed 73 */ 74 75 #define SEQ_INDEX 4 76 #define SEQ_DATA 5 77 78 static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg) 79 { 80 iowrite8(reg, cirrus->mmio + SEQ_INDEX); 81 return ioread8(cirrus->mmio + SEQ_DATA); 82 } 83 84 static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val) 85 { 86 iowrite8(reg, cirrus->mmio + SEQ_INDEX); 87 iowrite8(val, cirrus->mmio + SEQ_DATA); 88 } 89 90 #define CRT_INDEX 0x14 91 #define CRT_DATA 0x15 92 93 static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg) 94 { 95 iowrite8(reg, cirrus->mmio + CRT_INDEX); 96 return ioread8(cirrus->mmio + CRT_DATA); 97 } 98 99 static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val) 100 { 101 iowrite8(reg, cirrus->mmio + CRT_INDEX); 102 iowrite8(val, cirrus->mmio + CRT_DATA); 103 } 104 105 #define GFX_INDEX 0xe 106 #define GFX_DATA 0xf 107 108 static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val) 109 { 110 iowrite8(reg, cirrus->mmio + GFX_INDEX); 111 iowrite8(val, cirrus->mmio + GFX_DATA); 112 } 113 114 #define VGA_DAC_MASK 0x06 115 116 static void wreg_hdr(struct cirrus_device *cirrus, u8 val) 117 { 118 ioread8(cirrus->mmio + VGA_DAC_MASK); 119 ioread8(cirrus->mmio + VGA_DAC_MASK); 120 ioread8(cirrus->mmio + VGA_DAC_MASK); 121 ioread8(cirrus->mmio + VGA_DAC_MASK); 122 iowrite8(val, cirrus->mmio + VGA_DAC_MASK); 123 } 124 125 static int cirrus_convert_to(struct drm_framebuffer *fb) 126 { 127 if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) { 128 if (fb->width * 3 <= CIRRUS_MAX_PITCH) 129 /* convert from XR24 to RG24 */ 130 return 3; 131 else 132 /* convert from XR24 to RG16 */ 133 return 2; 134 } 135 return 0; 136 } 137 138 static int cirrus_cpp(struct drm_framebuffer *fb) 139 { 140 int convert_cpp = cirrus_convert_to(fb); 141 142 if (convert_cpp) 143 return convert_cpp; 144 return fb->format->cpp[0]; 145 } 146 147 static int cirrus_pitch(struct drm_framebuffer *fb) 148 { 149 int convert_cpp = cirrus_convert_to(fb); 150 151 if (convert_cpp) 152 return convert_cpp * fb->width; 153 return fb->pitches[0]; 154 } 155 156 static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset) 157 { 158 int idx; 159 u32 addr; 160 u8 tmp; 161 162 if (!drm_dev_enter(&cirrus->dev, &idx)) 163 return; 164 165 addr = offset >> 2; 166 wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff)); 167 wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff)); 168 169 tmp = rreg_crt(cirrus, 0x1b); 170 tmp &= 0xf2; 171 tmp |= (addr >> 16) & 0x01; 172 tmp |= (addr >> 15) & 0x0c; 173 wreg_crt(cirrus, 0x1b, tmp); 174 175 tmp = rreg_crt(cirrus, 0x1d); 176 tmp &= 0x7f; 177 tmp |= (addr >> 12) & 0x80; 178 wreg_crt(cirrus, 0x1d, tmp); 179 180 drm_dev_exit(idx); 181 } 182 183 static int cirrus_mode_set(struct cirrus_device *cirrus, 184 struct drm_display_mode *mode, 185 struct drm_framebuffer *fb) 186 { 187 int hsyncstart, hsyncend, htotal, hdispend; 188 int vtotal, vdispend; 189 int tmp, idx; 190 int sr07 = 0, hdr = 0; 191 192 if (!drm_dev_enter(&cirrus->dev, &idx)) 193 return -1; 194 195 htotal = mode->htotal / 8; 196 hsyncend = mode->hsync_end / 8; 197 hsyncstart = mode->hsync_start / 8; 198 hdispend = mode->hdisplay / 8; 199 200 vtotal = mode->vtotal; 201 vdispend = mode->vdisplay; 202 203 vdispend -= 1; 204 vtotal -= 2; 205 206 htotal -= 5; 207 hdispend -= 1; 208 hsyncstart += 1; 209 hsyncend += 1; 210 211 wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20); 212 wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal); 213 wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend); 214 wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart); 215 wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend); 216 wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff); 217 wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff); 218 219 tmp = 0x40; 220 if ((vdispend + 1) & 512) 221 tmp |= 0x20; 222 wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp); 223 224 /* 225 * Overflow bits for values that don't fit in the standard registers 226 */ 227 tmp = 0x10; 228 if (vtotal & 0x100) 229 tmp |= 0x01; 230 if (vdispend & 0x100) 231 tmp |= 0x02; 232 if ((vdispend + 1) & 0x100) 233 tmp |= 0x08; 234 if (vtotal & 0x200) 235 tmp |= 0x20; 236 if (vdispend & 0x200) 237 tmp |= 0x40; 238 wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp); 239 240 tmp = 0; 241 242 /* More overflow bits */ 243 244 if ((htotal + 5) & 0x40) 245 tmp |= 0x10; 246 if ((htotal + 5) & 0x80) 247 tmp |= 0x20; 248 if (vtotal & 0x100) 249 tmp |= 0x40; 250 if (vtotal & 0x200) 251 tmp |= 0x80; 252 253 wreg_crt(cirrus, CL_CRT1A, tmp); 254 255 /* Disable Hercules/CGA compatibility */ 256 wreg_crt(cirrus, VGA_CRTC_MODE, 0x03); 257 258 sr07 = rreg_seq(cirrus, 0x07); 259 sr07 &= 0xe0; 260 hdr = 0; 261 262 cirrus->cpp = cirrus_cpp(fb); 263 switch (cirrus->cpp * 8) { 264 case 8: 265 sr07 |= 0x11; 266 break; 267 case 16: 268 sr07 |= 0x17; 269 hdr = 0xc1; 270 break; 271 case 24: 272 sr07 |= 0x15; 273 hdr = 0xc5; 274 break; 275 case 32: 276 sr07 |= 0x19; 277 hdr = 0xc5; 278 break; 279 default: 280 drm_dev_exit(idx); 281 return -1; 282 } 283 284 wreg_seq(cirrus, 0x7, sr07); 285 286 /* Program the pitch */ 287 cirrus->pitch = cirrus_pitch(fb); 288 tmp = cirrus->pitch / 8; 289 wreg_crt(cirrus, VGA_CRTC_OFFSET, tmp); 290 291 /* Enable extended blanking and pitch bits, and enable full memory */ 292 tmp = 0x22; 293 tmp |= (cirrus->pitch >> 7) & 0x10; 294 tmp |= (cirrus->pitch >> 6) & 0x40; 295 wreg_crt(cirrus, 0x1b, tmp); 296 297 /* Enable high-colour modes */ 298 wreg_gfx(cirrus, VGA_GFX_MODE, 0x40); 299 300 /* And set graphics mode */ 301 wreg_gfx(cirrus, VGA_GFX_MISC, 0x01); 302 303 wreg_hdr(cirrus, hdr); 304 305 cirrus_set_start_address(cirrus, 0); 306 307 /* Unblank (needed on S3 resume, vgabios doesn't do it then) */ 308 outb(0x20, 0x3c0); 309 310 drm_dev_exit(idx); 311 return 0; 312 } 313 314 static int cirrus_fb_blit_rect(struct drm_framebuffer *fb, 315 struct drm_rect *rect) 316 { 317 struct cirrus_device *cirrus = to_cirrus(fb->dev); 318 struct dma_buf_map map; 319 void *vmap; 320 int idx, ret; 321 322 ret = -ENODEV; 323 if (!drm_dev_enter(&cirrus->dev, &idx)) 324 goto out; 325 326 ret = drm_gem_shmem_vmap(fb->obj[0], &map); 327 if (ret) 328 goto out_dev_exit; 329 vmap = map.vaddr; /* TODO: Use mapping abstraction properly */ 330 331 if (cirrus->cpp == fb->format->cpp[0]) 332 drm_fb_memcpy_dstclip(cirrus->vram, 333 vmap, fb, rect); 334 335 else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2) 336 drm_fb_xrgb8888_to_rgb565_dstclip(cirrus->vram, 337 cirrus->pitch, 338 vmap, fb, rect, false); 339 340 else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3) 341 drm_fb_xrgb8888_to_rgb888_dstclip(cirrus->vram, 342 cirrus->pitch, 343 vmap, fb, rect); 344 345 else 346 WARN_ON_ONCE("cpp mismatch"); 347 348 drm_gem_shmem_vunmap(fb->obj[0], &map); 349 ret = 0; 350 351 out_dev_exit: 352 drm_dev_exit(idx); 353 out: 354 return ret; 355 } 356 357 static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb) 358 { 359 struct drm_rect fullscreen = { 360 .x1 = 0, 361 .x2 = fb->width, 362 .y1 = 0, 363 .y2 = fb->height, 364 }; 365 return cirrus_fb_blit_rect(fb, &fullscreen); 366 } 367 368 static int cirrus_check_size(int width, int height, 369 struct drm_framebuffer *fb) 370 { 371 int pitch = width * 2; 372 373 if (fb) 374 pitch = cirrus_pitch(fb); 375 376 if (pitch > CIRRUS_MAX_PITCH) 377 return -EINVAL; 378 if (pitch * height > CIRRUS_VRAM_SIZE) 379 return -EINVAL; 380 return 0; 381 } 382 383 /* ------------------------------------------------------------------ */ 384 /* cirrus connector */ 385 386 static int cirrus_conn_get_modes(struct drm_connector *conn) 387 { 388 int count; 389 390 count = drm_add_modes_noedid(conn, 391 conn->dev->mode_config.max_width, 392 conn->dev->mode_config.max_height); 393 drm_set_preferred_mode(conn, 1024, 768); 394 return count; 395 } 396 397 static const struct drm_connector_helper_funcs cirrus_conn_helper_funcs = { 398 .get_modes = cirrus_conn_get_modes, 399 }; 400 401 static const struct drm_connector_funcs cirrus_conn_funcs = { 402 .fill_modes = drm_helper_probe_single_connector_modes, 403 .destroy = drm_connector_cleanup, 404 .reset = drm_atomic_helper_connector_reset, 405 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 406 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 407 }; 408 409 static int cirrus_conn_init(struct cirrus_device *cirrus) 410 { 411 drm_connector_helper_add(&cirrus->conn, &cirrus_conn_helper_funcs); 412 return drm_connector_init(&cirrus->dev, &cirrus->conn, 413 &cirrus_conn_funcs, DRM_MODE_CONNECTOR_VGA); 414 415 } 416 417 /* ------------------------------------------------------------------ */ 418 /* cirrus (simple) display pipe */ 419 420 static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_simple_display_pipe *pipe, 421 const struct drm_display_mode *mode) 422 { 423 if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0) 424 return MODE_BAD; 425 return MODE_OK; 426 } 427 428 static int cirrus_pipe_check(struct drm_simple_display_pipe *pipe, 429 struct drm_plane_state *plane_state, 430 struct drm_crtc_state *crtc_state) 431 { 432 struct drm_framebuffer *fb = plane_state->fb; 433 434 if (!fb) 435 return 0; 436 return cirrus_check_size(fb->width, fb->height, fb); 437 } 438 439 static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe, 440 struct drm_crtc_state *crtc_state, 441 struct drm_plane_state *plane_state) 442 { 443 struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev); 444 445 cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb); 446 cirrus_fb_blit_fullscreen(plane_state->fb); 447 } 448 449 static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe, 450 struct drm_plane_state *old_state) 451 { 452 struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev); 453 struct drm_plane_state *state = pipe->plane.state; 454 struct drm_crtc *crtc = &pipe->crtc; 455 struct drm_rect rect; 456 457 if (pipe->plane.state->fb && 458 cirrus->cpp != cirrus_cpp(pipe->plane.state->fb)) 459 cirrus_mode_set(cirrus, &crtc->mode, 460 pipe->plane.state->fb); 461 462 if (drm_atomic_helper_damage_merged(old_state, state, &rect)) 463 cirrus_fb_blit_rect(pipe->plane.state->fb, &rect); 464 } 465 466 static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = { 467 .mode_valid = cirrus_pipe_mode_valid, 468 .check = cirrus_pipe_check, 469 .enable = cirrus_pipe_enable, 470 .update = cirrus_pipe_update, 471 }; 472 473 static const uint32_t cirrus_formats[] = { 474 DRM_FORMAT_RGB565, 475 DRM_FORMAT_RGB888, 476 DRM_FORMAT_XRGB8888, 477 }; 478 479 static const uint64_t cirrus_modifiers[] = { 480 DRM_FORMAT_MOD_LINEAR, 481 DRM_FORMAT_MOD_INVALID 482 }; 483 484 static int cirrus_pipe_init(struct cirrus_device *cirrus) 485 { 486 return drm_simple_display_pipe_init(&cirrus->dev, 487 &cirrus->pipe, 488 &cirrus_pipe_funcs, 489 cirrus_formats, 490 ARRAY_SIZE(cirrus_formats), 491 cirrus_modifiers, 492 &cirrus->conn); 493 } 494 495 /* ------------------------------------------------------------------ */ 496 /* cirrus framebuffers & mode config */ 497 498 static struct drm_framebuffer* 499 cirrus_fb_create(struct drm_device *dev, struct drm_file *file_priv, 500 const struct drm_mode_fb_cmd2 *mode_cmd) 501 { 502 if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 && 503 mode_cmd->pixel_format != DRM_FORMAT_RGB888 && 504 mode_cmd->pixel_format != DRM_FORMAT_XRGB8888) 505 return ERR_PTR(-EINVAL); 506 if (cirrus_check_size(mode_cmd->width, mode_cmd->height, NULL) < 0) 507 return ERR_PTR(-EINVAL); 508 return drm_gem_fb_create_with_dirty(dev, file_priv, mode_cmd); 509 } 510 511 static const struct drm_mode_config_funcs cirrus_mode_config_funcs = { 512 .fb_create = cirrus_fb_create, 513 .atomic_check = drm_atomic_helper_check, 514 .atomic_commit = drm_atomic_helper_commit, 515 }; 516 517 static int cirrus_mode_config_init(struct cirrus_device *cirrus) 518 { 519 struct drm_device *dev = &cirrus->dev; 520 int ret; 521 522 ret = drmm_mode_config_init(dev); 523 if (ret) 524 return ret; 525 526 dev->mode_config.min_width = 0; 527 dev->mode_config.min_height = 0; 528 dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2; 529 dev->mode_config.max_height = 1024; 530 dev->mode_config.preferred_depth = 16; 531 dev->mode_config.prefer_shadow = 0; 532 dev->mode_config.funcs = &cirrus_mode_config_funcs; 533 534 return 0; 535 } 536 537 /* ------------------------------------------------------------------ */ 538 539 DEFINE_DRM_GEM_FOPS(cirrus_fops); 540 541 static const struct drm_driver cirrus_driver = { 542 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, 543 544 .name = DRIVER_NAME, 545 .desc = DRIVER_DESC, 546 .date = DRIVER_DATE, 547 .major = DRIVER_MAJOR, 548 .minor = DRIVER_MINOR, 549 550 .fops = &cirrus_fops, 551 DRM_GEM_SHMEM_DRIVER_OPS, 552 }; 553 554 static int cirrus_pci_probe(struct pci_dev *pdev, 555 const struct pci_device_id *ent) 556 { 557 struct drm_device *dev; 558 struct cirrus_device *cirrus; 559 int ret; 560 561 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "cirrusdrmfb"); 562 if (ret) 563 return ret; 564 565 ret = pcim_enable_device(pdev); 566 if (ret) 567 return ret; 568 569 ret = pci_request_regions(pdev, DRIVER_NAME); 570 if (ret) 571 return ret; 572 573 ret = -ENOMEM; 574 cirrus = devm_drm_dev_alloc(&pdev->dev, &cirrus_driver, 575 struct cirrus_device, dev); 576 if (IS_ERR(cirrus)) 577 return PTR_ERR(cirrus); 578 579 dev = &cirrus->dev; 580 581 cirrus->vram = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0), 582 pci_resource_len(pdev, 0)); 583 if (cirrus->vram == NULL) 584 return -ENOMEM; 585 586 cirrus->mmio = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 1), 587 pci_resource_len(pdev, 1)); 588 if (cirrus->mmio == NULL) 589 return -ENOMEM; 590 591 ret = cirrus_mode_config_init(cirrus); 592 if (ret) 593 return ret; 594 595 ret = cirrus_conn_init(cirrus); 596 if (ret < 0) 597 return ret; 598 599 ret = cirrus_pipe_init(cirrus); 600 if (ret < 0) 601 return ret; 602 603 drm_mode_config_reset(dev); 604 605 dev->pdev = pdev; 606 pci_set_drvdata(pdev, dev); 607 ret = drm_dev_register(dev, 0); 608 if (ret) 609 return ret; 610 611 drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth); 612 return 0; 613 } 614 615 static void cirrus_pci_remove(struct pci_dev *pdev) 616 { 617 struct drm_device *dev = pci_get_drvdata(pdev); 618 619 drm_dev_unplug(dev); 620 drm_atomic_helper_shutdown(dev); 621 } 622 623 static const struct pci_device_id pciidlist[] = { 624 { 625 .vendor = PCI_VENDOR_ID_CIRRUS, 626 .device = PCI_DEVICE_ID_CIRRUS_5446, 627 /* only bind to the cirrus chip in qemu */ 628 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET, 629 .subdevice = PCI_SUBDEVICE_ID_QEMU, 630 }, { 631 .vendor = PCI_VENDOR_ID_CIRRUS, 632 .device = PCI_DEVICE_ID_CIRRUS_5446, 633 .subvendor = PCI_VENDOR_ID_XEN, 634 .subdevice = 0x0001, 635 }, 636 { /* end if list */ } 637 }; 638 639 static struct pci_driver cirrus_pci_driver = { 640 .name = DRIVER_NAME, 641 .id_table = pciidlist, 642 .probe = cirrus_pci_probe, 643 .remove = cirrus_pci_remove, 644 }; 645 646 static int __init cirrus_init(void) 647 { 648 if (vgacon_text_force()) 649 return -EINVAL; 650 return pci_register_driver(&cirrus_pci_driver); 651 } 652 653 static void __exit cirrus_exit(void) 654 { 655 pci_unregister_driver(&cirrus_pci_driver); 656 } 657 658 module_init(cirrus_init); 659 module_exit(cirrus_exit); 660 661 MODULE_DEVICE_TABLE(pci, pciidlist); 662 MODULE_LICENSE("GPL"); 663