1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5  */
6 
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_blend.h>
10 #include <drm/drm_crtc.h>
11 #include <drm/drm_crtc_helper.h>
12 #include <drm/drm_fourcc.h>
13 #include <drm/drm_framebuffer.h>
14 #include <drm/drm_fb_cma_helper.h>
15 #include <drm/drm_gem_atomic_helper.h>
16 
17 #include "tidss_crtc.h"
18 #include "tidss_dispc.h"
19 #include "tidss_drv.h"
20 #include "tidss_plane.h"
21 
22 /* drm_plane_helper_funcs */
23 
24 static int tidss_plane_atomic_check(struct drm_plane *plane,
25 				    struct drm_atomic_state *state)
26 {
27 	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
28 										 plane);
29 	struct drm_device *ddev = plane->dev;
30 	struct tidss_device *tidss = to_tidss(ddev);
31 	struct tidss_plane *tplane = to_tidss_plane(plane);
32 	const struct drm_format_info *finfo;
33 	struct drm_crtc_state *crtc_state;
34 	u32 hw_plane = tplane->hw_plane_id;
35 	u32 hw_videoport;
36 	int ret;
37 
38 	dev_dbg(ddev->dev, "%s\n", __func__);
39 
40 	if (!new_plane_state->crtc) {
41 		/*
42 		 * The visible field is not reset by the DRM core but only
43 		 * updated by drm_plane_helper_check_state(), set it manually.
44 		 */
45 		new_plane_state->visible = false;
46 		return 0;
47 	}
48 
49 	crtc_state = drm_atomic_get_crtc_state(state,
50 					       new_plane_state->crtc);
51 	if (IS_ERR(crtc_state))
52 		return PTR_ERR(crtc_state);
53 
54 	ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
55 						  0,
56 						  INT_MAX, true, true);
57 	if (ret < 0)
58 		return ret;
59 
60 	/*
61 	 * The HW is only able to start drawing at subpixel boundary
62 	 * (the two first checks bellow). At the end of a row the HW
63 	 * can only jump integer number of subpixels forward to the
64 	 * beginning of the next row. So we can only show picture with
65 	 * integer subpixel width (the third check). However, after
66 	 * reaching the end of the drawn picture the drawing starts
67 	 * again at the absolute memory address where top left corner
68 	 * position of the drawn picture is (so there is no need to
69 	 * check for odd height).
70 	 */
71 
72 	finfo = drm_format_info(new_plane_state->fb->format->format);
73 
74 	if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) {
75 		dev_dbg(ddev->dev,
76 			"%s: x-position %u not divisible subpixel size %u\n",
77 			__func__, (new_plane_state->src_x >> 16), finfo->hsub);
78 		return -EINVAL;
79 	}
80 
81 	if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) {
82 		dev_dbg(ddev->dev,
83 			"%s: y-position %u not divisible subpixel size %u\n",
84 			__func__, (new_plane_state->src_y >> 16), finfo->vsub);
85 		return -EINVAL;
86 	}
87 
88 	if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) {
89 		dev_dbg(ddev->dev,
90 			"%s: src width %u not divisible by subpixel size %u\n",
91 			 __func__, (new_plane_state->src_w >> 16),
92 			 finfo->hsub);
93 		return -EINVAL;
94 	}
95 
96 	if (!new_plane_state->visible)
97 		return 0;
98 
99 	hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;
100 
101 	ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state,
102 				hw_videoport);
103 	if (ret)
104 		return ret;
105 
106 	return 0;
107 }
108 
109 static void tidss_plane_atomic_update(struct drm_plane *plane,
110 				      struct drm_atomic_state *state)
111 {
112 	struct drm_device *ddev = plane->dev;
113 	struct tidss_device *tidss = to_tidss(ddev);
114 	struct tidss_plane *tplane = to_tidss_plane(plane);
115 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
116 									   plane);
117 	u32 hw_videoport;
118 	int ret;
119 
120 	dev_dbg(ddev->dev, "%s\n", __func__);
121 
122 	if (!new_state->visible) {
123 		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
124 		return;
125 	}
126 
127 	hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;
128 
129 	ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
130 				new_state, hw_videoport);
131 
132 	if (ret) {
133 		dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
134 			__func__, tplane->hw_plane_id);
135 		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
136 		return;
137 	}
138 
139 	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
140 }
141 
142 static void tidss_plane_atomic_disable(struct drm_plane *plane,
143 				       struct drm_atomic_state *state)
144 {
145 	struct drm_device *ddev = plane->dev;
146 	struct tidss_device *tidss = to_tidss(ddev);
147 	struct tidss_plane *tplane = to_tidss_plane(plane);
148 
149 	dev_dbg(ddev->dev, "%s\n", __func__);
150 
151 	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
152 }
153 
154 static void drm_plane_destroy(struct drm_plane *plane)
155 {
156 	struct tidss_plane *tplane = to_tidss_plane(plane);
157 
158 	drm_plane_cleanup(plane);
159 	kfree(tplane);
160 }
161 
162 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
163 	.atomic_check = tidss_plane_atomic_check,
164 	.atomic_update = tidss_plane_atomic_update,
165 	.atomic_disable = tidss_plane_atomic_disable,
166 };
167 
168 static const struct drm_plane_funcs tidss_plane_funcs = {
169 	.update_plane = drm_atomic_helper_update_plane,
170 	.disable_plane = drm_atomic_helper_disable_plane,
171 	.reset = drm_atomic_helper_plane_reset,
172 	.destroy = drm_plane_destroy,
173 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
174 	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
175 };
176 
177 struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
178 				       u32 hw_plane_id, u32 plane_type,
179 				       u32 crtc_mask, const u32 *formats,
180 				       u32 num_formats)
181 {
182 	struct tidss_plane *tplane;
183 	enum drm_plane_type type;
184 	u32 possible_crtcs;
185 	u32 num_planes = tidss->feat->num_planes;
186 	u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
187 			       BIT(DRM_COLOR_YCBCR_BT709));
188 	u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
189 			    BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
190 	u32 default_encoding = DRM_COLOR_YCBCR_BT601;
191 	u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
192 	u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
193 			   BIT(DRM_MODE_BLEND_COVERAGE));
194 	int ret;
195 
196 	tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
197 	if (!tplane)
198 		return ERR_PTR(-ENOMEM);
199 
200 	tplane->hw_plane_id = hw_plane_id;
201 
202 	possible_crtcs = crtc_mask;
203 	type = plane_type;
204 
205 	ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
206 				       possible_crtcs,
207 				       &tidss_plane_funcs,
208 				       formats, num_formats,
209 				       NULL, type, NULL);
210 	if (ret < 0)
211 		goto err;
212 
213 	drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
214 
215 	drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
216 				       num_planes - 1);
217 
218 	ret = drm_plane_create_color_properties(&tplane->plane,
219 						color_encodings,
220 						color_ranges,
221 						default_encoding,
222 						default_range);
223 	if (ret)
224 		goto err;
225 
226 	ret = drm_plane_create_alpha_property(&tplane->plane);
227 	if (ret)
228 		goto err;
229 
230 	ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
231 	if (ret)
232 		goto err;
233 
234 	return tplane;
235 
236 err:
237 	kfree(tplane);
238 	return ERR_PTR(ret);
239 }
240