1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <linux/dma-fence.h> 8 9 #include <drm/drm_atomic.h> 10 #include <drm/drm_atomic_helper.h> 11 #include <drm/drm_bridge.h> 12 #include <drm/drm_crtc_helper.h> 13 #include <drm/drm_gem_framebuffer_helper.h> 14 #include <drm/drm_of.h> 15 #include <drm/drm_panel.h> 16 #include <drm/drm_vblank.h> 17 18 #include "tidss_crtc.h" 19 #include "tidss_dispc.h" 20 #include "tidss_drv.h" 21 #include "tidss_encoder.h" 22 #include "tidss_kms.h" 23 #include "tidss_plane.h" 24 25 static void tidss_atomic_commit_tail(struct drm_atomic_state *old_state) 26 { 27 struct drm_device *ddev = old_state->dev; 28 struct tidss_device *tidss = to_tidss(ddev); 29 bool fence_cookie = dma_fence_begin_signalling(); 30 31 dev_dbg(ddev->dev, "%s\n", __func__); 32 33 tidss_runtime_get(tidss); 34 35 drm_atomic_helper_commit_modeset_disables(ddev, old_state); 36 drm_atomic_helper_commit_planes(ddev, old_state, 0); 37 drm_atomic_helper_commit_modeset_enables(ddev, old_state); 38 39 drm_atomic_helper_commit_hw_done(old_state); 40 dma_fence_end_signalling(fence_cookie); 41 drm_atomic_helper_wait_for_flip_done(ddev, old_state); 42 43 drm_atomic_helper_cleanup_planes(ddev, old_state); 44 45 tidss_runtime_put(tidss); 46 } 47 48 static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = { 49 .atomic_commit_tail = tidss_atomic_commit_tail, 50 }; 51 52 static int tidss_atomic_check(struct drm_device *ddev, 53 struct drm_atomic_state *state) 54 { 55 struct drm_plane_state *opstate; 56 struct drm_plane_state *npstate; 57 struct drm_plane *plane; 58 struct drm_crtc_state *cstate; 59 struct drm_crtc *crtc; 60 int ret, i; 61 62 ret = drm_atomic_helper_check(ddev, state); 63 if (ret) 64 return ret; 65 66 /* 67 * Add all active planes on a CRTC to the atomic state, if 68 * x/y/z position or activity of any plane on that CRTC 69 * changes. This is needed for updating the plane positions in 70 * tidss_crtc_position_planes() which is called from 71 * crtc_atomic_enable() and crtc_atomic_flush(). We have an 72 * extra flag to mark x,y-position changes and together 73 * with zpos_changed the condition recognizes all the above 74 * cases. 75 */ 76 for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) { 77 if (!npstate->crtc || !npstate->visible) 78 continue; 79 80 if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x || 81 opstate->crtc_y != npstate->crtc_y) { 82 cstate = drm_atomic_get_crtc_state(state, 83 npstate->crtc); 84 if (IS_ERR(cstate)) 85 return PTR_ERR(cstate); 86 to_tidss_crtc_state(cstate)->plane_pos_changed = true; 87 } 88 } 89 90 for_each_new_crtc_in_state(state, crtc, cstate, i) { 91 if (to_tidss_crtc_state(cstate)->plane_pos_changed || 92 cstate->zpos_changed) { 93 ret = drm_atomic_add_affected_planes(state, crtc); 94 if (ret) 95 return ret; 96 } 97 } 98 99 return 0; 100 } 101 102 static const struct drm_mode_config_funcs mode_config_funcs = { 103 .fb_create = drm_gem_fb_create, 104 .atomic_check = tidss_atomic_check, 105 .atomic_commit = drm_atomic_helper_commit, 106 }; 107 108 static int tidss_dispc_modeset_init(struct tidss_device *tidss) 109 { 110 struct device *dev = tidss->dev; 111 unsigned int fourccs_len; 112 const u32 *fourccs = dispc_plane_formats(tidss->dispc, &fourccs_len); 113 unsigned int i; 114 115 struct pipe { 116 u32 hw_videoport; 117 struct drm_bridge *bridge; 118 u32 enc_type; 119 }; 120 121 const struct dispc_features *feat = tidss->feat; 122 u32 max_vps = feat->num_vps; 123 u32 max_planes = feat->num_planes; 124 125 struct pipe pipes[TIDSS_MAX_PORTS]; 126 u32 num_pipes = 0; 127 u32 crtc_mask; 128 129 /* first find all the connected panels & bridges */ 130 131 for (i = 0; i < max_vps; i++) { 132 struct drm_panel *panel; 133 struct drm_bridge *bridge; 134 u32 enc_type = DRM_MODE_ENCODER_NONE; 135 int ret; 136 137 ret = drm_of_find_panel_or_bridge(dev->of_node, i, 0, 138 &panel, &bridge); 139 if (ret == -ENODEV) { 140 dev_dbg(dev, "no panel/bridge for port %d\n", i); 141 continue; 142 } else if (ret) { 143 dev_dbg(dev, "port %d probe returned %d\n", i, ret); 144 return ret; 145 } 146 147 if (panel) { 148 u32 conn_type; 149 150 dev_dbg(dev, "Setting up panel for port %d\n", i); 151 152 switch (feat->vp_bus_type[i]) { 153 case DISPC_VP_OLDI: 154 enc_type = DRM_MODE_ENCODER_LVDS; 155 conn_type = DRM_MODE_CONNECTOR_LVDS; 156 break; 157 case DISPC_VP_DPI: 158 enc_type = DRM_MODE_ENCODER_DPI; 159 conn_type = DRM_MODE_CONNECTOR_DPI; 160 break; 161 default: 162 WARN_ON(1); 163 return -EINVAL; 164 } 165 166 if (panel->connector_type != conn_type) { 167 dev_err(dev, 168 "%s: Panel %s has incompatible connector type for vp%d (%d != %d)\n", 169 __func__, dev_name(panel->dev), i, 170 panel->connector_type, conn_type); 171 return -EINVAL; 172 } 173 174 bridge = devm_drm_panel_bridge_add(dev, panel); 175 if (IS_ERR(bridge)) { 176 dev_err(dev, 177 "failed to set up panel bridge for port %d\n", 178 i); 179 return PTR_ERR(bridge); 180 } 181 } 182 183 pipes[num_pipes].hw_videoport = i; 184 pipes[num_pipes].bridge = bridge; 185 pipes[num_pipes].enc_type = enc_type; 186 num_pipes++; 187 } 188 189 /* all planes can be on any crtc */ 190 crtc_mask = (1 << num_pipes) - 1; 191 192 /* then create a plane, a crtc and an encoder for each panel/bridge */ 193 194 for (i = 0; i < num_pipes; ++i) { 195 struct tidss_plane *tplane; 196 struct tidss_crtc *tcrtc; 197 struct drm_encoder *enc; 198 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 199 int ret; 200 201 tplane = tidss_plane_create(tidss, hw_plane_id, 202 DRM_PLANE_TYPE_PRIMARY, crtc_mask, 203 fourccs, fourccs_len); 204 if (IS_ERR(tplane)) { 205 dev_err(tidss->dev, "plane create failed\n"); 206 return PTR_ERR(tplane); 207 } 208 209 tidss->planes[tidss->num_planes++] = &tplane->plane; 210 211 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, 212 &tplane->plane); 213 if (IS_ERR(tcrtc)) { 214 dev_err(tidss->dev, "crtc create failed\n"); 215 return PTR_ERR(tcrtc); 216 } 217 218 tidss->crtcs[tidss->num_crtcs++] = &tcrtc->crtc; 219 220 enc = tidss_encoder_create(tidss, pipes[i].enc_type, 221 1 << tcrtc->crtc.index); 222 if (IS_ERR(enc)) { 223 dev_err(tidss->dev, "encoder create failed\n"); 224 return PTR_ERR(enc); 225 } 226 227 ret = drm_bridge_attach(enc, pipes[i].bridge, NULL, 0); 228 if (ret) 229 return ret; 230 } 231 232 /* create overlay planes of the leftover planes */ 233 234 while (tidss->num_planes < max_planes) { 235 struct tidss_plane *tplane; 236 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 237 238 tplane = tidss_plane_create(tidss, hw_plane_id, 239 DRM_PLANE_TYPE_OVERLAY, crtc_mask, 240 fourccs, fourccs_len); 241 242 if (IS_ERR(tplane)) { 243 dev_err(tidss->dev, "plane create failed\n"); 244 return PTR_ERR(tplane); 245 } 246 247 tidss->planes[tidss->num_planes++] = &tplane->plane; 248 } 249 250 return 0; 251 } 252 253 int tidss_modeset_init(struct tidss_device *tidss) 254 { 255 struct drm_device *ddev = &tidss->ddev; 256 int ret; 257 258 dev_dbg(tidss->dev, "%s\n", __func__); 259 260 ret = drmm_mode_config_init(ddev); 261 if (ret) 262 return ret; 263 264 ddev->mode_config.min_width = 8; 265 ddev->mode_config.min_height = 8; 266 ddev->mode_config.max_width = 8096; 267 ddev->mode_config.max_height = 8096; 268 ddev->mode_config.normalize_zpos = true; 269 ddev->mode_config.funcs = &mode_config_funcs; 270 ddev->mode_config.helper_private = &mode_config_helper_funcs; 271 272 ret = tidss_dispc_modeset_init(tidss); 273 if (ret) 274 return ret; 275 276 ret = drm_vblank_init(ddev, tidss->num_crtcs); 277 if (ret) 278 return ret; 279 280 drm_mode_config_reset(ddev); 281 282 dev_dbg(tidss->dev, "%s done\n", __func__); 283 284 return 0; 285 } 286