1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <linux/dma-fence.h> 8 9 #include <drm/drm_atomic.h> 10 #include <drm/drm_atomic_helper.h> 11 #include <drm/drm_bridge.h> 12 #include <drm/drm_crtc_helper.h> 13 #include <drm/drm_fb_helper.h> 14 #include <drm/drm_gem_framebuffer_helper.h> 15 #include <drm/drm_of.h> 16 #include <drm/drm_panel.h> 17 #include <drm/drm_vblank.h> 18 19 #include "tidss_crtc.h" 20 #include "tidss_dispc.h" 21 #include "tidss_drv.h" 22 #include "tidss_encoder.h" 23 #include "tidss_kms.h" 24 #include "tidss_plane.h" 25 26 static void tidss_atomic_commit_tail(struct drm_atomic_state *old_state) 27 { 28 struct drm_device *ddev = old_state->dev; 29 struct tidss_device *tidss = to_tidss(ddev); 30 bool fence_cookie = dma_fence_begin_signalling(); 31 32 dev_dbg(ddev->dev, "%s\n", __func__); 33 34 tidss_runtime_get(tidss); 35 36 drm_atomic_helper_commit_modeset_disables(ddev, old_state); 37 drm_atomic_helper_commit_planes(ddev, old_state, 0); 38 drm_atomic_helper_commit_modeset_enables(ddev, old_state); 39 40 drm_atomic_helper_commit_hw_done(old_state); 41 dma_fence_end_signalling(fence_cookie); 42 drm_atomic_helper_wait_for_flip_done(ddev, old_state); 43 44 drm_atomic_helper_cleanup_planes(ddev, old_state); 45 46 tidss_runtime_put(tidss); 47 } 48 49 static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = { 50 .atomic_commit_tail = tidss_atomic_commit_tail, 51 }; 52 53 static int tidss_atomic_check(struct drm_device *ddev, 54 struct drm_atomic_state *state) 55 { 56 struct drm_plane_state *opstate; 57 struct drm_plane_state *npstate; 58 struct drm_plane *plane; 59 struct drm_crtc_state *cstate; 60 struct drm_crtc *crtc; 61 int ret, i; 62 63 ret = drm_atomic_helper_check(ddev, state); 64 if (ret) 65 return ret; 66 67 /* 68 * Add all active planes on a CRTC to the atomic state, if 69 * x/y/z position or activity of any plane on that CRTC 70 * changes. This is needed for updating the plane positions in 71 * tidss_crtc_position_planes() which is called from 72 * crtc_atomic_enable() and crtc_atomic_flush(). We have an 73 * extra flag to to mark x,y-position changes and together 74 * with zpos_changed the condition recognizes all the above 75 * cases. 76 */ 77 for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) { 78 if (!npstate->crtc || !npstate->visible) 79 continue; 80 81 if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x || 82 opstate->crtc_y != npstate->crtc_y) { 83 cstate = drm_atomic_get_crtc_state(state, 84 npstate->crtc); 85 if (IS_ERR(cstate)) 86 return PTR_ERR(cstate); 87 to_tidss_crtc_state(cstate)->plane_pos_changed = true; 88 } 89 } 90 91 for_each_new_crtc_in_state(state, crtc, cstate, i) { 92 if (to_tidss_crtc_state(cstate)->plane_pos_changed || 93 cstate->zpos_changed) { 94 ret = drm_atomic_add_affected_planes(state, crtc); 95 if (ret) 96 return ret; 97 } 98 } 99 100 return 0; 101 } 102 103 static const struct drm_mode_config_funcs mode_config_funcs = { 104 .fb_create = drm_gem_fb_create, 105 .atomic_check = tidss_atomic_check, 106 .atomic_commit = drm_atomic_helper_commit, 107 }; 108 109 static int tidss_dispc_modeset_init(struct tidss_device *tidss) 110 { 111 struct device *dev = tidss->dev; 112 unsigned int fourccs_len; 113 const u32 *fourccs = dispc_plane_formats(tidss->dispc, &fourccs_len); 114 unsigned int i; 115 116 struct pipe { 117 u32 hw_videoport; 118 struct drm_bridge *bridge; 119 u32 enc_type; 120 }; 121 122 const struct dispc_features *feat = tidss->feat; 123 u32 max_vps = feat->num_vps; 124 u32 max_planes = feat->num_planes; 125 126 struct pipe pipes[TIDSS_MAX_PORTS]; 127 u32 num_pipes = 0; 128 u32 crtc_mask; 129 130 /* first find all the connected panels & bridges */ 131 132 for (i = 0; i < max_vps; i++) { 133 struct drm_panel *panel; 134 struct drm_bridge *bridge; 135 u32 enc_type = DRM_MODE_ENCODER_NONE; 136 int ret; 137 138 ret = drm_of_find_panel_or_bridge(dev->of_node, i, 0, 139 &panel, &bridge); 140 if (ret == -ENODEV) { 141 dev_dbg(dev, "no panel/bridge for port %d\n", i); 142 continue; 143 } else if (ret) { 144 dev_dbg(dev, "port %d probe returned %d\n", i, ret); 145 return ret; 146 } 147 148 if (panel) { 149 u32 conn_type; 150 151 dev_dbg(dev, "Setting up panel for port %d\n", i); 152 153 switch (feat->vp_bus_type[i]) { 154 case DISPC_VP_OLDI: 155 enc_type = DRM_MODE_ENCODER_LVDS; 156 conn_type = DRM_MODE_CONNECTOR_LVDS; 157 break; 158 case DISPC_VP_DPI: 159 enc_type = DRM_MODE_ENCODER_DPI; 160 conn_type = DRM_MODE_CONNECTOR_DPI; 161 break; 162 default: 163 WARN_ON(1); 164 return -EINVAL; 165 } 166 167 if (panel->connector_type != conn_type) { 168 dev_err(dev, 169 "%s: Panel %s has incompatible connector type for vp%d (%d != %d)\n", 170 __func__, dev_name(panel->dev), i, 171 panel->connector_type, conn_type); 172 return -EINVAL; 173 } 174 175 bridge = devm_drm_panel_bridge_add(dev, panel); 176 if (IS_ERR(bridge)) { 177 dev_err(dev, 178 "failed to set up panel bridge for port %d\n", 179 i); 180 return PTR_ERR(bridge); 181 } 182 } 183 184 pipes[num_pipes].hw_videoport = i; 185 pipes[num_pipes].bridge = bridge; 186 pipes[num_pipes].enc_type = enc_type; 187 num_pipes++; 188 } 189 190 /* all planes can be on any crtc */ 191 crtc_mask = (1 << num_pipes) - 1; 192 193 /* then create a plane, a crtc and an encoder for each panel/bridge */ 194 195 for (i = 0; i < num_pipes; ++i) { 196 struct tidss_plane *tplane; 197 struct tidss_crtc *tcrtc; 198 struct drm_encoder *enc; 199 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 200 int ret; 201 202 tplane = tidss_plane_create(tidss, hw_plane_id, 203 DRM_PLANE_TYPE_PRIMARY, crtc_mask, 204 fourccs, fourccs_len); 205 if (IS_ERR(tplane)) { 206 dev_err(tidss->dev, "plane create failed\n"); 207 return PTR_ERR(tplane); 208 } 209 210 tidss->planes[tidss->num_planes++] = &tplane->plane; 211 212 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, 213 &tplane->plane); 214 if (IS_ERR(tcrtc)) { 215 dev_err(tidss->dev, "crtc create failed\n"); 216 return PTR_ERR(tcrtc); 217 } 218 219 tidss->crtcs[tidss->num_crtcs++] = &tcrtc->crtc; 220 221 enc = tidss_encoder_create(tidss, pipes[i].enc_type, 222 1 << tcrtc->crtc.index); 223 if (IS_ERR(enc)) { 224 dev_err(tidss->dev, "encoder create failed\n"); 225 return PTR_ERR(enc); 226 } 227 228 ret = drm_bridge_attach(enc, pipes[i].bridge, NULL, 0); 229 if (ret) 230 return ret; 231 } 232 233 /* create overlay planes of the leftover planes */ 234 235 while (tidss->num_planes < max_planes) { 236 struct tidss_plane *tplane; 237 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 238 239 tplane = tidss_plane_create(tidss, hw_plane_id, 240 DRM_PLANE_TYPE_OVERLAY, crtc_mask, 241 fourccs, fourccs_len); 242 243 if (IS_ERR(tplane)) { 244 dev_err(tidss->dev, "plane create failed\n"); 245 return PTR_ERR(tplane); 246 } 247 248 tidss->planes[tidss->num_planes++] = &tplane->plane; 249 } 250 251 return 0; 252 } 253 254 int tidss_modeset_init(struct tidss_device *tidss) 255 { 256 struct drm_device *ddev = &tidss->ddev; 257 int ret; 258 259 dev_dbg(tidss->dev, "%s\n", __func__); 260 261 ret = drmm_mode_config_init(ddev); 262 if (ret) 263 return ret; 264 265 ddev->mode_config.min_width = 8; 266 ddev->mode_config.min_height = 8; 267 ddev->mode_config.max_width = 8096; 268 ddev->mode_config.max_height = 8096; 269 ddev->mode_config.normalize_zpos = true; 270 ddev->mode_config.funcs = &mode_config_funcs; 271 ddev->mode_config.helper_private = &mode_config_helper_funcs; 272 273 ret = tidss_dispc_modeset_init(tidss); 274 if (ret) 275 return ret; 276 277 ret = drm_vblank_init(ddev, tidss->num_crtcs); 278 if (ret) 279 return ret; 280 281 drm_mode_config_reset(ddev); 282 283 dev_dbg(tidss->dev, "%s done\n", __func__); 284 285 return 0; 286 } 287