1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <linux/dma-fence.h> 8 9 #include <drm/drm_atomic.h> 10 #include <drm/drm_atomic_helper.h> 11 #include <drm/drm_bridge.h> 12 #include <drm/drm_gem_framebuffer_helper.h> 13 #include <drm/drm_of.h> 14 #include <drm/drm_panel.h> 15 #include <drm/drm_vblank.h> 16 17 #include "tidss_crtc.h" 18 #include "tidss_dispc.h" 19 #include "tidss_drv.h" 20 #include "tidss_encoder.h" 21 #include "tidss_kms.h" 22 #include "tidss_plane.h" 23 24 static void tidss_atomic_commit_tail(struct drm_atomic_state *old_state) 25 { 26 struct drm_device *ddev = old_state->dev; 27 struct tidss_device *tidss = to_tidss(ddev); 28 bool fence_cookie = dma_fence_begin_signalling(); 29 30 dev_dbg(ddev->dev, "%s\n", __func__); 31 32 tidss_runtime_get(tidss); 33 34 drm_atomic_helper_commit_modeset_disables(ddev, old_state); 35 drm_atomic_helper_commit_planes(ddev, old_state, 0); 36 drm_atomic_helper_commit_modeset_enables(ddev, old_state); 37 38 drm_atomic_helper_commit_hw_done(old_state); 39 dma_fence_end_signalling(fence_cookie); 40 drm_atomic_helper_wait_for_flip_done(ddev, old_state); 41 42 drm_atomic_helper_cleanup_planes(ddev, old_state); 43 44 tidss_runtime_put(tidss); 45 } 46 47 static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = { 48 .atomic_commit_tail = tidss_atomic_commit_tail, 49 }; 50 51 static int tidss_atomic_check(struct drm_device *ddev, 52 struct drm_atomic_state *state) 53 { 54 struct drm_plane_state *opstate; 55 struct drm_plane_state *npstate; 56 struct drm_plane *plane; 57 struct drm_crtc_state *cstate; 58 struct drm_crtc *crtc; 59 int ret, i; 60 61 ret = drm_atomic_helper_check(ddev, state); 62 if (ret) 63 return ret; 64 65 /* 66 * Add all active planes on a CRTC to the atomic state, if 67 * x/y/z position or activity of any plane on that CRTC 68 * changes. This is needed for updating the plane positions in 69 * tidss_crtc_position_planes() which is called from 70 * crtc_atomic_enable() and crtc_atomic_flush(). We have an 71 * extra flag to mark x,y-position changes and together 72 * with zpos_changed the condition recognizes all the above 73 * cases. 74 */ 75 for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) { 76 if (!npstate->crtc || !npstate->visible) 77 continue; 78 79 if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x || 80 opstate->crtc_y != npstate->crtc_y) { 81 cstate = drm_atomic_get_crtc_state(state, 82 npstate->crtc); 83 if (IS_ERR(cstate)) 84 return PTR_ERR(cstate); 85 to_tidss_crtc_state(cstate)->plane_pos_changed = true; 86 } 87 } 88 89 for_each_new_crtc_in_state(state, crtc, cstate, i) { 90 if (to_tidss_crtc_state(cstate)->plane_pos_changed || 91 cstate->zpos_changed) { 92 ret = drm_atomic_add_affected_planes(state, crtc); 93 if (ret) 94 return ret; 95 } 96 } 97 98 return 0; 99 } 100 101 static const struct drm_mode_config_funcs mode_config_funcs = { 102 .fb_create = drm_gem_fb_create, 103 .atomic_check = tidss_atomic_check, 104 .atomic_commit = drm_atomic_helper_commit, 105 }; 106 107 static int tidss_dispc_modeset_init(struct tidss_device *tidss) 108 { 109 struct device *dev = tidss->dev; 110 unsigned int fourccs_len; 111 const u32 *fourccs = dispc_plane_formats(tidss->dispc, &fourccs_len); 112 unsigned int i; 113 114 struct pipe { 115 u32 hw_videoport; 116 struct drm_bridge *bridge; 117 u32 enc_type; 118 }; 119 120 const struct dispc_features *feat = tidss->feat; 121 u32 max_vps = feat->num_vps; 122 u32 max_planes = feat->num_planes; 123 124 struct pipe pipes[TIDSS_MAX_PORTS]; 125 u32 num_pipes = 0; 126 u32 crtc_mask; 127 128 /* first find all the connected panels & bridges */ 129 130 for (i = 0; i < max_vps; i++) { 131 struct drm_panel *panel; 132 struct drm_bridge *bridge; 133 u32 enc_type = DRM_MODE_ENCODER_NONE; 134 int ret; 135 136 ret = drm_of_find_panel_or_bridge(dev->of_node, i, 0, 137 &panel, &bridge); 138 if (ret == -ENODEV) { 139 dev_dbg(dev, "no panel/bridge for port %d\n", i); 140 continue; 141 } else if (ret) { 142 dev_dbg(dev, "port %d probe returned %d\n", i, ret); 143 return ret; 144 } 145 146 if (panel) { 147 u32 conn_type; 148 149 dev_dbg(dev, "Setting up panel for port %d\n", i); 150 151 switch (feat->vp_bus_type[i]) { 152 case DISPC_VP_OLDI: 153 enc_type = DRM_MODE_ENCODER_LVDS; 154 conn_type = DRM_MODE_CONNECTOR_LVDS; 155 break; 156 case DISPC_VP_DPI: 157 enc_type = DRM_MODE_ENCODER_DPI; 158 conn_type = DRM_MODE_CONNECTOR_DPI; 159 break; 160 default: 161 WARN_ON(1); 162 return -EINVAL; 163 } 164 165 if (panel->connector_type != conn_type) { 166 dev_err(dev, 167 "%s: Panel %s has incompatible connector type for vp%d (%d != %d)\n", 168 __func__, dev_name(panel->dev), i, 169 panel->connector_type, conn_type); 170 return -EINVAL; 171 } 172 173 bridge = devm_drm_panel_bridge_add(dev, panel); 174 if (IS_ERR(bridge)) { 175 dev_err(dev, 176 "failed to set up panel bridge for port %d\n", 177 i); 178 return PTR_ERR(bridge); 179 } 180 } 181 182 pipes[num_pipes].hw_videoport = i; 183 pipes[num_pipes].bridge = bridge; 184 pipes[num_pipes].enc_type = enc_type; 185 num_pipes++; 186 } 187 188 /* all planes can be on any crtc */ 189 crtc_mask = (1 << num_pipes) - 1; 190 191 /* then create a plane, a crtc and an encoder for each panel/bridge */ 192 193 for (i = 0; i < num_pipes; ++i) { 194 struct tidss_plane *tplane; 195 struct tidss_crtc *tcrtc; 196 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 197 int ret; 198 199 tplane = tidss_plane_create(tidss, hw_plane_id, 200 DRM_PLANE_TYPE_PRIMARY, crtc_mask, 201 fourccs, fourccs_len); 202 if (IS_ERR(tplane)) { 203 dev_err(tidss->dev, "plane create failed\n"); 204 return PTR_ERR(tplane); 205 } 206 207 tidss->planes[tidss->num_planes++] = &tplane->plane; 208 209 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, 210 &tplane->plane); 211 if (IS_ERR(tcrtc)) { 212 dev_err(tidss->dev, "crtc create failed\n"); 213 return PTR_ERR(tcrtc); 214 } 215 216 tidss->crtcs[tidss->num_crtcs++] = &tcrtc->crtc; 217 218 ret = tidss_encoder_create(tidss, pipes[i].bridge, 219 pipes[i].enc_type, 220 1 << tcrtc->crtc.index); 221 if (ret) { 222 dev_err(tidss->dev, "encoder create failed\n"); 223 return ret; 224 } 225 } 226 227 /* create overlay planes of the leftover planes */ 228 229 while (tidss->num_planes < max_planes) { 230 struct tidss_plane *tplane; 231 u32 hw_plane_id = feat->vid_order[tidss->num_planes]; 232 233 tplane = tidss_plane_create(tidss, hw_plane_id, 234 DRM_PLANE_TYPE_OVERLAY, crtc_mask, 235 fourccs, fourccs_len); 236 237 if (IS_ERR(tplane)) { 238 dev_err(tidss->dev, "plane create failed\n"); 239 return PTR_ERR(tplane); 240 } 241 242 tidss->planes[tidss->num_planes++] = &tplane->plane; 243 } 244 245 return 0; 246 } 247 248 int tidss_modeset_init(struct tidss_device *tidss) 249 { 250 struct drm_device *ddev = &tidss->ddev; 251 int ret; 252 253 dev_dbg(tidss->dev, "%s\n", __func__); 254 255 ret = drmm_mode_config_init(ddev); 256 if (ret) 257 return ret; 258 259 ddev->mode_config.min_width = 8; 260 ddev->mode_config.min_height = 8; 261 ddev->mode_config.max_width = 8096; 262 ddev->mode_config.max_height = 8096; 263 ddev->mode_config.normalize_zpos = true; 264 ddev->mode_config.funcs = &mode_config_funcs; 265 ddev->mode_config.helper_private = &mode_config_helper_funcs; 266 267 ret = tidss_dispc_modeset_init(tidss); 268 if (ret) 269 return ret; 270 271 ret = drm_vblank_init(ddev, tidss->num_crtcs); 272 if (ret) 273 return ret; 274 275 drm_mode_config_reset(ddev); 276 277 dev_dbg(tidss->dev, "%s done\n", __func__); 278 279 return 0; 280 } 281