1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_crtc_helper.h> 11 #include <drm/drm_fb_cma_helper.h> 12 #include <drm/drm_gem_cma_helper.h> 13 #include <drm/drm_plane_helper.h> 14 #include <drm/drm_vblank.h> 15 16 #include "tidss_crtc.h" 17 #include "tidss_dispc.h" 18 #include "tidss_drv.h" 19 #include "tidss_irq.h" 20 #include "tidss_plane.h" 21 22 /* Page flip and frame done IRQs */ 23 24 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc) 25 { 26 struct drm_device *ddev = tcrtc->crtc.dev; 27 struct tidss_device *tidss = to_tidss(ddev); 28 struct drm_pending_vblank_event *event; 29 unsigned long flags; 30 bool busy; 31 32 spin_lock_irqsave(&ddev->event_lock, flags); 33 34 /* 35 * New settings are taken into use at VFP, and GO bit is cleared at 36 * the same time. This happens before the vertical blank interrupt. 37 * So there is a small change that the driver sets GO bit after VFP, but 38 * before vblank, and we have to check for that case here. 39 */ 40 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); 41 if (busy) { 42 spin_unlock_irqrestore(&ddev->event_lock, flags); 43 return; 44 } 45 46 event = tcrtc->event; 47 tcrtc->event = NULL; 48 49 if (!event) { 50 spin_unlock_irqrestore(&ddev->event_lock, flags); 51 return; 52 } 53 54 drm_crtc_send_vblank_event(&tcrtc->crtc, event); 55 56 spin_unlock_irqrestore(&ddev->event_lock, flags); 57 58 drm_crtc_vblank_put(&tcrtc->crtc); 59 } 60 61 void tidss_crtc_vblank_irq(struct drm_crtc *crtc) 62 { 63 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 64 65 drm_crtc_handle_vblank(crtc); 66 67 tidss_crtc_finish_page_flip(tcrtc); 68 } 69 70 void tidss_crtc_framedone_irq(struct drm_crtc *crtc) 71 { 72 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 73 74 complete(&tcrtc->framedone_completion); 75 } 76 77 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus) 78 { 79 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 80 81 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n", 82 tcrtc->hw_videoport, irqstatus); 83 } 84 85 /* drm_crtc_helper_funcs */ 86 87 static int tidss_crtc_atomic_check(struct drm_crtc *crtc, 88 struct drm_crtc_state *state) 89 { 90 struct drm_device *ddev = crtc->dev; 91 struct tidss_device *tidss = to_tidss(ddev); 92 struct dispc_device *dispc = tidss->dispc; 93 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 94 u32 hw_videoport = tcrtc->hw_videoport; 95 const struct drm_display_mode *mode; 96 enum drm_mode_status ok; 97 98 dev_dbg(ddev->dev, "%s\n", __func__); 99 100 if (!state->enable) 101 return 0; 102 103 mode = &state->adjusted_mode; 104 105 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode); 106 if (ok != MODE_OK) { 107 dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n", 108 __func__, mode->hdisplay, mode->vdisplay, mode->clock); 109 return -EINVAL; 110 } 111 112 return dispc_vp_bus_check(dispc, hw_videoport, state); 113 } 114 115 /* 116 * This needs all affected planes to be present in the atomic 117 * state. The untouched planes are added to the state in 118 * tidss_atomic_check(). 119 */ 120 static void tidss_crtc_position_planes(struct tidss_device *tidss, 121 struct drm_crtc *crtc, 122 struct drm_crtc_state *old_state, 123 bool newmodeset) 124 { 125 struct drm_atomic_state *ostate = old_state->state; 126 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 127 struct drm_crtc_state *cstate = crtc->state; 128 int layer; 129 130 if (!newmodeset && !cstate->zpos_changed && 131 !to_tidss_crtc_state(cstate)->plane_pos_changed) 132 return; 133 134 for (layer = 0; layer < tidss->feat->num_planes; layer++) { 135 struct drm_plane_state *pstate; 136 struct drm_plane *plane; 137 bool layer_active = false; 138 int i; 139 140 for_each_new_plane_in_state(ostate, plane, pstate, i) { 141 if (pstate->crtc != crtc || !pstate->visible) 142 continue; 143 144 if (pstate->normalized_zpos == layer) { 145 layer_active = true; 146 break; 147 } 148 } 149 150 if (layer_active) { 151 struct tidss_plane *tplane = to_tidss_plane(plane); 152 153 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, 154 tcrtc->hw_videoport, 155 pstate->crtc_x, pstate->crtc_y, 156 layer); 157 } 158 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 159 layer_active); 160 } 161 } 162 163 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, 164 struct drm_crtc_state *old_crtc_state) 165 { 166 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 167 struct drm_device *ddev = crtc->dev; 168 struct tidss_device *tidss = to_tidss(ddev); 169 unsigned long flags; 170 171 dev_dbg(ddev->dev, 172 "%s: %s enabled %d, needs modeset %d, event %p\n", __func__, 173 crtc->name, drm_atomic_crtc_needs_modeset(crtc->state), 174 crtc->state->enable, crtc->state->event); 175 176 /* There is nothing to do if CRTC is not going to be enabled. */ 177 if (!crtc->state->enable) 178 return; 179 180 /* 181 * Flush CRTC changes with go bit only if new modeset is not 182 * coming, so CRTC is enabled trough out the commit. 183 */ 184 if (drm_atomic_crtc_needs_modeset(crtc->state)) 185 return; 186 187 /* If the GO bit is stuck we better quit here. */ 188 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport))) 189 return; 190 191 /* We should have event if CRTC is enabled through out this commit. */ 192 if (WARN_ON(!crtc->state->event)) 193 return; 194 195 /* Write vp properties to HW if needed. */ 196 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); 197 198 /* Update plane positions if needed. */ 199 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); 200 201 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 202 203 spin_lock_irqsave(&ddev->event_lock, flags); 204 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport); 205 206 WARN_ON(tcrtc->event); 207 208 tcrtc->event = crtc->state->event; 209 crtc->state->event = NULL; 210 211 spin_unlock_irqrestore(&ddev->event_lock, flags); 212 } 213 214 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, 215 struct drm_atomic_state *state) 216 { 217 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 218 crtc); 219 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 220 struct drm_device *ddev = crtc->dev; 221 struct tidss_device *tidss = to_tidss(ddev); 222 const struct drm_display_mode *mode = &crtc->state->adjusted_mode; 223 unsigned long flags; 224 int r; 225 226 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 227 228 tidss_runtime_get(tidss); 229 230 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport, 231 mode->clock * 1000); 232 if (r != 0) 233 return; 234 235 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport); 236 if (r != 0) 237 return; 238 239 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); 240 tidss_crtc_position_planes(tidss, crtc, old_state, true); 241 242 /* Turn vertical blanking interrupt reporting on. */ 243 drm_crtc_vblank_on(crtc); 244 245 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state); 246 247 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state); 248 249 spin_lock_irqsave(&ddev->event_lock, flags); 250 251 if (crtc->state->event) { 252 drm_crtc_send_vblank_event(crtc, crtc->state->event); 253 crtc->state->event = NULL; 254 } 255 256 spin_unlock_irqrestore(&ddev->event_lock, flags); 257 } 258 259 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc, 260 struct drm_atomic_state *state) 261 { 262 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 263 struct drm_device *ddev = crtc->dev; 264 struct tidss_device *tidss = to_tidss(ddev); 265 unsigned long flags; 266 267 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 268 269 reinit_completion(&tcrtc->framedone_completion); 270 271 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport); 272 273 if (!wait_for_completion_timeout(&tcrtc->framedone_completion, 274 msecs_to_jiffies(500))) 275 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d", 276 tcrtc->hw_videoport); 277 278 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport); 279 280 spin_lock_irqsave(&ddev->event_lock, flags); 281 if (crtc->state->event) { 282 drm_crtc_send_vblank_event(crtc, crtc->state->event); 283 crtc->state->event = NULL; 284 } 285 spin_unlock_irqrestore(&ddev->event_lock, flags); 286 287 drm_crtc_vblank_off(crtc); 288 289 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport); 290 291 tidss_runtime_put(tidss); 292 } 293 294 static 295 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, 296 const struct drm_display_mode *mode) 297 { 298 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 299 struct drm_device *ddev = crtc->dev; 300 struct tidss_device *tidss = to_tidss(ddev); 301 302 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); 303 } 304 305 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { 306 .atomic_check = tidss_crtc_atomic_check, 307 .atomic_flush = tidss_crtc_atomic_flush, 308 .atomic_enable = tidss_crtc_atomic_enable, 309 .atomic_disable = tidss_crtc_atomic_disable, 310 311 .mode_valid = tidss_crtc_mode_valid, 312 }; 313 314 /* drm_crtc_funcs */ 315 316 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc) 317 { 318 struct drm_device *ddev = crtc->dev; 319 struct tidss_device *tidss = to_tidss(ddev); 320 321 dev_dbg(ddev->dev, "%s\n", __func__); 322 323 tidss_runtime_get(tidss); 324 325 tidss_irq_enable_vblank(crtc); 326 327 return 0; 328 } 329 330 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc) 331 { 332 struct drm_device *ddev = crtc->dev; 333 struct tidss_device *tidss = to_tidss(ddev); 334 335 dev_dbg(ddev->dev, "%s\n", __func__); 336 337 tidss_irq_disable_vblank(crtc); 338 339 tidss_runtime_put(tidss); 340 } 341 342 static void tidss_crtc_reset(struct drm_crtc *crtc) 343 { 344 struct tidss_crtc_state *tcrtc; 345 346 if (crtc->state) 347 __drm_atomic_helper_crtc_destroy_state(crtc->state); 348 349 kfree(crtc->state); 350 351 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 352 if (!tcrtc) { 353 crtc->state = NULL; 354 return; 355 } 356 357 __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base); 358 } 359 360 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) 361 { 362 struct tidss_crtc_state *state, *current_state; 363 364 if (WARN_ON(!crtc->state)) 365 return NULL; 366 367 current_state = to_tidss_crtc_state(crtc->state); 368 369 state = kmalloc(sizeof(*state), GFP_KERNEL); 370 if (!state) 371 return NULL; 372 373 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); 374 375 state->plane_pos_changed = false; 376 377 state->bus_format = current_state->bus_format; 378 state->bus_flags = current_state->bus_flags; 379 380 return &state->base; 381 } 382 383 static void tidss_crtc_destroy(struct drm_crtc *crtc) 384 { 385 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 386 387 drm_crtc_cleanup(crtc); 388 kfree(tcrtc); 389 } 390 391 static const struct drm_crtc_funcs tidss_crtc_funcs = { 392 .reset = tidss_crtc_reset, 393 .destroy = tidss_crtc_destroy, 394 .set_config = drm_atomic_helper_set_config, 395 .page_flip = drm_atomic_helper_page_flip, 396 .atomic_duplicate_state = tidss_crtc_duplicate_state, 397 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 398 .enable_vblank = tidss_crtc_enable_vblank, 399 .disable_vblank = tidss_crtc_disable_vblank, 400 }; 401 402 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 403 u32 hw_videoport, 404 struct drm_plane *primary) 405 { 406 struct tidss_crtc *tcrtc; 407 struct drm_crtc *crtc; 408 unsigned int gamma_lut_size = 0; 409 bool has_ctm = tidss->feat->vp_feat.color.has_ctm; 410 int ret; 411 412 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 413 if (!tcrtc) 414 return ERR_PTR(-ENOMEM); 415 416 tcrtc->hw_videoport = hw_videoport; 417 init_completion(&tcrtc->framedone_completion); 418 419 crtc = &tcrtc->crtc; 420 421 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, 422 NULL, &tidss_crtc_funcs, NULL); 423 if (ret < 0) { 424 kfree(tcrtc); 425 return ERR_PTR(ret); 426 } 427 428 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); 429 430 /* 431 * The dispc gamma functions adapt to what ever size we ask 432 * from it no matter what HW supports. X-server assumes 256 433 * element gamma tables so lets use that. 434 */ 435 if (tidss->feat->vp_feat.color.gamma_size) 436 gamma_lut_size = 256; 437 438 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size); 439 if (gamma_lut_size) 440 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); 441 442 return tcrtc; 443 } 444