1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved. 4 */ 5 6 #ifndef TEGRA_PLANE_H 7 #define TEGRA_PLANE_H 1 8 9 #include <drm/drm_plane.h> 10 11 struct tegra_bo; 12 struct tegra_dc; 13 14 struct tegra_plane { 15 struct drm_plane base; 16 struct tegra_dc *dc; 17 unsigned int offset; 18 unsigned int index; 19 }; 20 21 struct tegra_cursor { 22 struct tegra_plane base; 23 24 struct tegra_bo *bo; 25 unsigned int width; 26 unsigned int height; 27 }; 28 29 static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane) 30 { 31 return container_of(plane, struct tegra_plane, base); 32 } 33 34 struct tegra_plane_legacy_blending_state { 35 bool alpha; 36 bool top; 37 }; 38 39 struct tegra_plane_state { 40 struct drm_plane_state base; 41 42 struct tegra_bo_tiling tiling; 43 u32 format; 44 u32 swap; 45 46 bool bottom_up; 47 48 /* used for legacy blending support only */ 49 struct tegra_plane_legacy_blending_state blending[2]; 50 bool opaque; 51 }; 52 53 static inline struct tegra_plane_state * 54 to_tegra_plane_state(struct drm_plane_state *state) 55 { 56 if (state) 57 return container_of(state, struct tegra_plane_state, base); 58 59 return NULL; 60 } 61 62 extern const struct drm_plane_funcs tegra_plane_funcs; 63 64 int tegra_plane_state_add(struct tegra_plane *plane, 65 struct drm_plane_state *state); 66 67 int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap); 68 bool tegra_plane_format_is_yuv(unsigned int format, bool *planar); 69 int tegra_plane_setup_legacy_state(struct tegra_plane *tegra, 70 struct tegra_plane_state *state); 71 72 #endif /* TEGRA_PLANE_H */ 73