xref: /openbmc/linux/drivers/gpu/drm/tegra/mipi-phy.h (revision d2912cb1)
1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2dec72739SThierry Reding /*
3dec72739SThierry Reding  * Copyright (C) 2013 NVIDIA Corporation
4dec72739SThierry Reding  */
5dec72739SThierry Reding 
6dec72739SThierry Reding #ifndef DRM_TEGRA_MIPI_PHY_H
7dec72739SThierry Reding #define DRM_TEGRA_MIPI_PHY_H
8dec72739SThierry Reding 
9dec72739SThierry Reding /*
10dec72739SThierry Reding  * D-PHY timing parameters
11dec72739SThierry Reding  *
12dec72739SThierry Reding  * A detailed description of these parameters can be found in the  MIPI
13dec72739SThierry Reding  * Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing
14dec72739SThierry Reding  * Parameters".
15dec72739SThierry Reding  *
16dec72739SThierry Reding  * All parameters are specified in nanoseconds.
17dec72739SThierry Reding  */
18dec72739SThierry Reding struct mipi_dphy_timing {
19dec72739SThierry Reding 	unsigned int clkmiss;
20dec72739SThierry Reding 	unsigned int clkpost;
21dec72739SThierry Reding 	unsigned int clkpre;
22dec72739SThierry Reding 	unsigned int clkprepare;
23dec72739SThierry Reding 	unsigned int clksettle;
24dec72739SThierry Reding 	unsigned int clktermen;
25dec72739SThierry Reding 	unsigned int clktrail;
26dec72739SThierry Reding 	unsigned int clkzero;
27dec72739SThierry Reding 	unsigned int dtermen;
28dec72739SThierry Reding 	unsigned int eot;
29dec72739SThierry Reding 	unsigned int hsexit;
30dec72739SThierry Reding 	unsigned int hsprepare;
31dec72739SThierry Reding 	unsigned int hszero;
32dec72739SThierry Reding 	unsigned int hssettle;
33dec72739SThierry Reding 	unsigned int hsskip;
34dec72739SThierry Reding 	unsigned int hstrail;
35dec72739SThierry Reding 	unsigned int init;
36dec72739SThierry Reding 	unsigned int lpx;
37dec72739SThierry Reding 	unsigned int taget;
38dec72739SThierry Reding 	unsigned int tago;
39dec72739SThierry Reding 	unsigned int tasure;
40dec72739SThierry Reding 	unsigned int wakeup;
41dec72739SThierry Reding };
42dec72739SThierry Reding 
43dec72739SThierry Reding int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
44dec72739SThierry Reding 				 unsigned long period);
45dec72739SThierry Reding int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
46dec72739SThierry Reding 			      unsigned long period);
47dec72739SThierry Reding 
48dec72739SThierry Reding #endif
49