1 /* 2 * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #ifndef TEGRA_HUB_H 10 #define TEGRA_HUB_H 1 11 12 #include <drm/drmP.h> 13 #include <drm/drm_plane.h> 14 15 #include "plane.h" 16 17 struct tegra_dc; 18 19 struct tegra_windowgroup { 20 unsigned int usecount; 21 struct mutex lock; 22 23 unsigned int index; 24 struct device *parent; 25 struct reset_control *rst; 26 }; 27 28 struct tegra_shared_plane { 29 struct tegra_plane base; 30 struct tegra_windowgroup *wgrp; 31 }; 32 33 static inline struct tegra_shared_plane * 34 to_tegra_shared_plane(struct drm_plane *plane) 35 { 36 return container_of(plane, struct tegra_shared_plane, base.base); 37 } 38 39 struct tegra_display_hub_soc { 40 unsigned int num_wgrps; 41 bool supports_dsc; 42 }; 43 44 struct tegra_display_hub { 45 struct drm_private_obj base; 46 struct host1x_client client; 47 struct clk *clk_disp; 48 struct clk *clk_dsc; 49 struct clk *clk_hub; 50 struct reset_control *rst; 51 52 const struct tegra_display_hub_soc *soc; 53 struct tegra_windowgroup *wgrps; 54 }; 55 56 static inline struct tegra_display_hub * 57 to_tegra_display_hub(struct host1x_client *client) 58 { 59 return container_of(client, struct tegra_display_hub, client); 60 } 61 62 struct tegra_display_hub_state { 63 struct drm_private_state base; 64 65 struct tegra_dc *dc; 66 unsigned long rate; 67 struct clk *clk; 68 }; 69 70 static inline struct tegra_display_hub_state * 71 to_tegra_display_hub_state(struct drm_private_state *priv) 72 { 73 return container_of(priv, struct tegra_display_hub_state, base); 74 } 75 76 struct tegra_dc; 77 struct tegra_plane; 78 79 int tegra_display_hub_prepare(struct tegra_display_hub *hub); 80 void tegra_display_hub_cleanup(struct tegra_display_hub *hub); 81 82 struct drm_plane *tegra_shared_plane_create(struct drm_device *drm, 83 struct tegra_dc *dc, 84 unsigned int wgrp, 85 unsigned int index); 86 87 int tegra_display_hub_atomic_check(struct drm_device *drm, 88 struct drm_atomic_state *state); 89 void tegra_display_hub_atomic_commit(struct drm_device *drm, 90 struct drm_atomic_state *state); 91 92 #define DC_CMD_IHUB_COMMON_MISC_CTL 0x068 93 #define LATENCY_EVENT (1 << 3) 94 95 #define DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER 0x451 96 #define CURS_SLOTS(x) (((x) & 0xff) << 8) 97 #define WGRP_SLOTS(x) (((x) & 0xff) << 0) 98 99 #endif /* TEGRA_HUB_H */ 100