1 /* 2 * Copyright (C) 2012 Avionic Design GmbH 3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10 #include <linux/bitops.h> 11 #include <linux/host1x.h> 12 #include <linux/idr.h> 13 #include <linux/iommu.h> 14 15 #include <drm/drm_atomic.h> 16 #include <drm/drm_atomic_helper.h> 17 18 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) 19 #include <asm/dma-iommu.h> 20 #endif 21 22 #include "drm.h" 23 #include "gem.h" 24 25 #define DRIVER_NAME "tegra" 26 #define DRIVER_DESC "NVIDIA Tegra graphics" 27 #define DRIVER_DATE "20120330" 28 #define DRIVER_MAJOR 0 29 #define DRIVER_MINOR 0 30 #define DRIVER_PATCHLEVEL 0 31 32 #define CARVEOUT_SZ SZ_64M 33 #define CDMA_GATHER_FETCHES_MAX_NB 16383 34 35 struct tegra_drm_file { 36 struct idr contexts; 37 struct mutex lock; 38 }; 39 40 static int tegra_atomic_check(struct drm_device *drm, 41 struct drm_atomic_state *state) 42 { 43 int err; 44 45 err = drm_atomic_helper_check(drm, state); 46 if (err < 0) 47 return err; 48 49 return tegra_display_hub_atomic_check(drm, state); 50 } 51 52 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = { 53 .fb_create = tegra_fb_create, 54 #ifdef CONFIG_DRM_FBDEV_EMULATION 55 .output_poll_changed = drm_fb_helper_output_poll_changed, 56 #endif 57 .atomic_check = tegra_atomic_check, 58 .atomic_commit = drm_atomic_helper_commit, 59 }; 60 61 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state) 62 { 63 struct drm_device *drm = old_state->dev; 64 struct tegra_drm *tegra = drm->dev_private; 65 66 if (tegra->hub) { 67 drm_atomic_helper_commit_modeset_disables(drm, old_state); 68 tegra_display_hub_atomic_commit(drm, old_state); 69 drm_atomic_helper_commit_planes(drm, old_state, 0); 70 drm_atomic_helper_commit_modeset_enables(drm, old_state); 71 drm_atomic_helper_commit_hw_done(old_state); 72 drm_atomic_helper_wait_for_vblanks(drm, old_state); 73 drm_atomic_helper_cleanup_planes(drm, old_state); 74 } else { 75 drm_atomic_helper_commit_tail_rpm(old_state); 76 } 77 } 78 79 static const struct drm_mode_config_helper_funcs 80 tegra_drm_mode_config_helpers = { 81 .atomic_commit_tail = tegra_atomic_commit_tail, 82 }; 83 84 static int tegra_drm_load(struct drm_device *drm, unsigned long flags) 85 { 86 struct host1x_device *device = to_host1x_device(drm->dev); 87 struct tegra_drm *tegra; 88 int err; 89 90 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); 91 if (!tegra) 92 return -ENOMEM; 93 94 if (iommu_present(&platform_bus_type)) { 95 u64 carveout_start, carveout_end, gem_start, gem_end; 96 struct iommu_domain_geometry *geometry; 97 unsigned long order; 98 99 tegra->domain = iommu_domain_alloc(&platform_bus_type); 100 if (!tegra->domain) { 101 err = -ENOMEM; 102 goto free; 103 } 104 105 err = iova_cache_get(); 106 if (err < 0) 107 goto domain; 108 109 geometry = &tegra->domain->geometry; 110 gem_start = geometry->aperture_start; 111 gem_end = geometry->aperture_end - CARVEOUT_SZ; 112 carveout_start = gem_end + 1; 113 carveout_end = geometry->aperture_end; 114 115 order = __ffs(tegra->domain->pgsize_bitmap); 116 init_iova_domain(&tegra->carveout.domain, 1UL << order, 117 carveout_start >> order); 118 119 tegra->carveout.shift = iova_shift(&tegra->carveout.domain); 120 tegra->carveout.limit = carveout_end >> tegra->carveout.shift; 121 122 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1); 123 mutex_init(&tegra->mm_lock); 124 125 DRM_DEBUG("IOMMU apertures:\n"); 126 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end); 127 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start, 128 carveout_end); 129 } 130 131 mutex_init(&tegra->clients_lock); 132 INIT_LIST_HEAD(&tegra->clients); 133 134 drm->dev_private = tegra; 135 tegra->drm = drm; 136 137 drm_mode_config_init(drm); 138 139 drm->mode_config.min_width = 0; 140 drm->mode_config.min_height = 0; 141 142 drm->mode_config.max_width = 4096; 143 drm->mode_config.max_height = 4096; 144 145 drm->mode_config.allow_fb_modifiers = true; 146 147 drm->mode_config.normalize_zpos = true; 148 149 drm->mode_config.funcs = &tegra_drm_mode_config_funcs; 150 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers; 151 152 err = tegra_drm_fb_prepare(drm); 153 if (err < 0) 154 goto config; 155 156 drm_kms_helper_poll_init(drm); 157 158 err = host1x_device_init(device); 159 if (err < 0) 160 goto fbdev; 161 162 if (tegra->hub) { 163 err = tegra_display_hub_prepare(tegra->hub); 164 if (err < 0) 165 goto device; 166 } 167 168 /* 169 * We don't use the drm_irq_install() helpers provided by the DRM 170 * core, so we need to set this manually in order to allow the 171 * DRM_IOCTL_WAIT_VBLANK to operate correctly. 172 */ 173 drm->irq_enabled = true; 174 175 /* syncpoints are used for full 32-bit hardware VBLANK counters */ 176 drm->max_vblank_count = 0xffffffff; 177 178 err = drm_vblank_init(drm, drm->mode_config.num_crtc); 179 if (err < 0) 180 goto hub; 181 182 drm_mode_config_reset(drm); 183 184 err = tegra_drm_fb_init(drm); 185 if (err < 0) 186 goto hub; 187 188 return 0; 189 190 hub: 191 if (tegra->hub) 192 tegra_display_hub_cleanup(tegra->hub); 193 device: 194 host1x_device_exit(device); 195 fbdev: 196 drm_kms_helper_poll_fini(drm); 197 tegra_drm_fb_free(drm); 198 config: 199 drm_mode_config_cleanup(drm); 200 201 if (tegra->domain) { 202 mutex_destroy(&tegra->mm_lock); 203 drm_mm_takedown(&tegra->mm); 204 put_iova_domain(&tegra->carveout.domain); 205 iova_cache_put(); 206 } 207 domain: 208 if (tegra->domain) 209 iommu_domain_free(tegra->domain); 210 free: 211 kfree(tegra); 212 return err; 213 } 214 215 static void tegra_drm_unload(struct drm_device *drm) 216 { 217 struct host1x_device *device = to_host1x_device(drm->dev); 218 struct tegra_drm *tegra = drm->dev_private; 219 int err; 220 221 drm_kms_helper_poll_fini(drm); 222 tegra_drm_fb_exit(drm); 223 drm_atomic_helper_shutdown(drm); 224 drm_mode_config_cleanup(drm); 225 226 err = host1x_device_exit(device); 227 if (err < 0) 228 return; 229 230 if (tegra->domain) { 231 mutex_destroy(&tegra->mm_lock); 232 drm_mm_takedown(&tegra->mm); 233 put_iova_domain(&tegra->carveout.domain); 234 iova_cache_put(); 235 iommu_domain_free(tegra->domain); 236 } 237 238 kfree(tegra); 239 } 240 241 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) 242 { 243 struct tegra_drm_file *fpriv; 244 245 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); 246 if (!fpriv) 247 return -ENOMEM; 248 249 idr_init(&fpriv->contexts); 250 mutex_init(&fpriv->lock); 251 filp->driver_priv = fpriv; 252 253 return 0; 254 } 255 256 static void tegra_drm_context_free(struct tegra_drm_context *context) 257 { 258 context->client->ops->close_channel(context); 259 kfree(context); 260 } 261 262 static struct host1x_bo * 263 host1x_bo_lookup(struct drm_file *file, u32 handle) 264 { 265 struct drm_gem_object *gem; 266 struct tegra_bo *bo; 267 268 gem = drm_gem_object_lookup(file, handle); 269 if (!gem) 270 return NULL; 271 272 bo = to_tegra_bo(gem); 273 return &bo->base; 274 } 275 276 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest, 277 struct drm_tegra_reloc __user *src, 278 struct drm_device *drm, 279 struct drm_file *file) 280 { 281 u32 cmdbuf, target; 282 int err; 283 284 err = get_user(cmdbuf, &src->cmdbuf.handle); 285 if (err < 0) 286 return err; 287 288 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset); 289 if (err < 0) 290 return err; 291 292 err = get_user(target, &src->target.handle); 293 if (err < 0) 294 return err; 295 296 err = get_user(dest->target.offset, &src->target.offset); 297 if (err < 0) 298 return err; 299 300 err = get_user(dest->shift, &src->shift); 301 if (err < 0) 302 return err; 303 304 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf); 305 if (!dest->cmdbuf.bo) 306 return -ENOENT; 307 308 dest->target.bo = host1x_bo_lookup(file, target); 309 if (!dest->target.bo) 310 return -ENOENT; 311 312 return 0; 313 } 314 315 int tegra_drm_submit(struct tegra_drm_context *context, 316 struct drm_tegra_submit *args, struct drm_device *drm, 317 struct drm_file *file) 318 { 319 struct host1x_client *client = &context->client->base; 320 unsigned int num_cmdbufs = args->num_cmdbufs; 321 unsigned int num_relocs = args->num_relocs; 322 struct drm_tegra_cmdbuf __user *user_cmdbufs; 323 struct drm_tegra_reloc __user *user_relocs; 324 struct drm_tegra_syncpt __user *user_syncpt; 325 struct drm_tegra_syncpt syncpt; 326 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); 327 struct drm_gem_object **refs; 328 struct host1x_syncpt *sp; 329 struct host1x_job *job; 330 unsigned int num_refs; 331 int err; 332 333 user_cmdbufs = u64_to_user_ptr(args->cmdbufs); 334 user_relocs = u64_to_user_ptr(args->relocs); 335 user_syncpt = u64_to_user_ptr(args->syncpts); 336 337 /* We don't yet support other than one syncpt_incr struct per submit */ 338 if (args->num_syncpts != 1) 339 return -EINVAL; 340 341 /* We don't yet support waitchks */ 342 if (args->num_waitchks != 0) 343 return -EINVAL; 344 345 job = host1x_job_alloc(context->channel, args->num_cmdbufs, 346 args->num_relocs); 347 if (!job) 348 return -ENOMEM; 349 350 job->num_relocs = args->num_relocs; 351 job->client = client; 352 job->class = client->class; 353 job->serialize = true; 354 355 /* 356 * Track referenced BOs so that they can be unreferenced after the 357 * submission is complete. 358 */ 359 num_refs = num_cmdbufs + num_relocs * 2; 360 361 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL); 362 if (!refs) { 363 err = -ENOMEM; 364 goto put; 365 } 366 367 /* reuse as an iterator later */ 368 num_refs = 0; 369 370 while (num_cmdbufs) { 371 struct drm_tegra_cmdbuf cmdbuf; 372 struct host1x_bo *bo; 373 struct tegra_bo *obj; 374 u64 offset; 375 376 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) { 377 err = -EFAULT; 378 goto fail; 379 } 380 381 /* 382 * The maximum number of CDMA gather fetches is 16383, a higher 383 * value means the words count is malformed. 384 */ 385 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) { 386 err = -EINVAL; 387 goto fail; 388 } 389 390 bo = host1x_bo_lookup(file, cmdbuf.handle); 391 if (!bo) { 392 err = -ENOENT; 393 goto fail; 394 } 395 396 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32); 397 obj = host1x_to_tegra_bo(bo); 398 refs[num_refs++] = &obj->gem; 399 400 /* 401 * Gather buffer base address must be 4-bytes aligned, 402 * unaligned offset is malformed and cause commands stream 403 * corruption on the buffer address relocation. 404 */ 405 if (offset & 3 || offset > obj->gem.size) { 406 err = -EINVAL; 407 goto fail; 408 } 409 410 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset); 411 num_cmdbufs--; 412 user_cmdbufs++; 413 } 414 415 /* copy and resolve relocations from submit */ 416 while (num_relocs--) { 417 struct host1x_reloc *reloc; 418 struct tegra_bo *obj; 419 420 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs], 421 &user_relocs[num_relocs], drm, 422 file); 423 if (err < 0) 424 goto fail; 425 426 reloc = &job->relocs[num_relocs]; 427 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo); 428 refs[num_refs++] = &obj->gem; 429 430 /* 431 * The unaligned cmdbuf offset will cause an unaligned write 432 * during of the relocations patching, corrupting the commands 433 * stream. 434 */ 435 if (reloc->cmdbuf.offset & 3 || 436 reloc->cmdbuf.offset >= obj->gem.size) { 437 err = -EINVAL; 438 goto fail; 439 } 440 441 obj = host1x_to_tegra_bo(reloc->target.bo); 442 refs[num_refs++] = &obj->gem; 443 444 if (reloc->target.offset >= obj->gem.size) { 445 err = -EINVAL; 446 goto fail; 447 } 448 } 449 450 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) { 451 err = -EFAULT; 452 goto fail; 453 } 454 455 /* check whether syncpoint ID is valid */ 456 sp = host1x_syncpt_get(host1x, syncpt.id); 457 if (!sp) { 458 err = -ENOENT; 459 goto fail; 460 } 461 462 job->is_addr_reg = context->client->ops->is_addr_reg; 463 job->is_valid_class = context->client->ops->is_valid_class; 464 job->syncpt_incrs = syncpt.incrs; 465 job->syncpt_id = syncpt.id; 466 job->timeout = 10000; 467 468 if (args->timeout && args->timeout < 10000) 469 job->timeout = args->timeout; 470 471 err = host1x_job_pin(job, context->client->base.dev); 472 if (err) 473 goto fail; 474 475 err = host1x_job_submit(job); 476 if (err) { 477 host1x_job_unpin(job); 478 goto fail; 479 } 480 481 args->fence = job->syncpt_end; 482 483 fail: 484 while (num_refs--) 485 drm_gem_object_put_unlocked(refs[num_refs]); 486 487 kfree(refs); 488 489 put: 490 host1x_job_put(job); 491 return err; 492 } 493 494 495 #ifdef CONFIG_DRM_TEGRA_STAGING 496 static int tegra_gem_create(struct drm_device *drm, void *data, 497 struct drm_file *file) 498 { 499 struct drm_tegra_gem_create *args = data; 500 struct tegra_bo *bo; 501 502 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, 503 &args->handle); 504 if (IS_ERR(bo)) 505 return PTR_ERR(bo); 506 507 return 0; 508 } 509 510 static int tegra_gem_mmap(struct drm_device *drm, void *data, 511 struct drm_file *file) 512 { 513 struct drm_tegra_gem_mmap *args = data; 514 struct drm_gem_object *gem; 515 struct tegra_bo *bo; 516 517 gem = drm_gem_object_lookup(file, args->handle); 518 if (!gem) 519 return -EINVAL; 520 521 bo = to_tegra_bo(gem); 522 523 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); 524 525 drm_gem_object_put_unlocked(gem); 526 527 return 0; 528 } 529 530 static int tegra_syncpt_read(struct drm_device *drm, void *data, 531 struct drm_file *file) 532 { 533 struct host1x *host = dev_get_drvdata(drm->dev->parent); 534 struct drm_tegra_syncpt_read *args = data; 535 struct host1x_syncpt *sp; 536 537 sp = host1x_syncpt_get(host, args->id); 538 if (!sp) 539 return -EINVAL; 540 541 args->value = host1x_syncpt_read_min(sp); 542 return 0; 543 } 544 545 static int tegra_syncpt_incr(struct drm_device *drm, void *data, 546 struct drm_file *file) 547 { 548 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); 549 struct drm_tegra_syncpt_incr *args = data; 550 struct host1x_syncpt *sp; 551 552 sp = host1x_syncpt_get(host1x, args->id); 553 if (!sp) 554 return -EINVAL; 555 556 return host1x_syncpt_incr(sp); 557 } 558 559 static int tegra_syncpt_wait(struct drm_device *drm, void *data, 560 struct drm_file *file) 561 { 562 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); 563 struct drm_tegra_syncpt_wait *args = data; 564 struct host1x_syncpt *sp; 565 566 sp = host1x_syncpt_get(host1x, args->id); 567 if (!sp) 568 return -EINVAL; 569 570 return host1x_syncpt_wait(sp, args->thresh, 571 msecs_to_jiffies(args->timeout), 572 &args->value); 573 } 574 575 static int tegra_client_open(struct tegra_drm_file *fpriv, 576 struct tegra_drm_client *client, 577 struct tegra_drm_context *context) 578 { 579 int err; 580 581 err = client->ops->open_channel(client, context); 582 if (err < 0) 583 return err; 584 585 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL); 586 if (err < 0) { 587 client->ops->close_channel(context); 588 return err; 589 } 590 591 context->client = client; 592 context->id = err; 593 594 return 0; 595 } 596 597 static int tegra_open_channel(struct drm_device *drm, void *data, 598 struct drm_file *file) 599 { 600 struct tegra_drm_file *fpriv = file->driver_priv; 601 struct tegra_drm *tegra = drm->dev_private; 602 struct drm_tegra_open_channel *args = data; 603 struct tegra_drm_context *context; 604 struct tegra_drm_client *client; 605 int err = -ENODEV; 606 607 context = kzalloc(sizeof(*context), GFP_KERNEL); 608 if (!context) 609 return -ENOMEM; 610 611 mutex_lock(&fpriv->lock); 612 613 list_for_each_entry(client, &tegra->clients, list) 614 if (client->base.class == args->client) { 615 err = tegra_client_open(fpriv, client, context); 616 if (err < 0) 617 break; 618 619 args->context = context->id; 620 break; 621 } 622 623 if (err < 0) 624 kfree(context); 625 626 mutex_unlock(&fpriv->lock); 627 return err; 628 } 629 630 static int tegra_close_channel(struct drm_device *drm, void *data, 631 struct drm_file *file) 632 { 633 struct tegra_drm_file *fpriv = file->driver_priv; 634 struct drm_tegra_close_channel *args = data; 635 struct tegra_drm_context *context; 636 int err = 0; 637 638 mutex_lock(&fpriv->lock); 639 640 context = idr_find(&fpriv->contexts, args->context); 641 if (!context) { 642 err = -EINVAL; 643 goto unlock; 644 } 645 646 idr_remove(&fpriv->contexts, context->id); 647 tegra_drm_context_free(context); 648 649 unlock: 650 mutex_unlock(&fpriv->lock); 651 return err; 652 } 653 654 static int tegra_get_syncpt(struct drm_device *drm, void *data, 655 struct drm_file *file) 656 { 657 struct tegra_drm_file *fpriv = file->driver_priv; 658 struct drm_tegra_get_syncpt *args = data; 659 struct tegra_drm_context *context; 660 struct host1x_syncpt *syncpt; 661 int err = 0; 662 663 mutex_lock(&fpriv->lock); 664 665 context = idr_find(&fpriv->contexts, args->context); 666 if (!context) { 667 err = -ENODEV; 668 goto unlock; 669 } 670 671 if (args->index >= context->client->base.num_syncpts) { 672 err = -EINVAL; 673 goto unlock; 674 } 675 676 syncpt = context->client->base.syncpts[args->index]; 677 args->id = host1x_syncpt_id(syncpt); 678 679 unlock: 680 mutex_unlock(&fpriv->lock); 681 return err; 682 } 683 684 static int tegra_submit(struct drm_device *drm, void *data, 685 struct drm_file *file) 686 { 687 struct tegra_drm_file *fpriv = file->driver_priv; 688 struct drm_tegra_submit *args = data; 689 struct tegra_drm_context *context; 690 int err; 691 692 mutex_lock(&fpriv->lock); 693 694 context = idr_find(&fpriv->contexts, args->context); 695 if (!context) { 696 err = -ENODEV; 697 goto unlock; 698 } 699 700 err = context->client->ops->submit(context, args, drm, file); 701 702 unlock: 703 mutex_unlock(&fpriv->lock); 704 return err; 705 } 706 707 static int tegra_get_syncpt_base(struct drm_device *drm, void *data, 708 struct drm_file *file) 709 { 710 struct tegra_drm_file *fpriv = file->driver_priv; 711 struct drm_tegra_get_syncpt_base *args = data; 712 struct tegra_drm_context *context; 713 struct host1x_syncpt_base *base; 714 struct host1x_syncpt *syncpt; 715 int err = 0; 716 717 mutex_lock(&fpriv->lock); 718 719 context = idr_find(&fpriv->contexts, args->context); 720 if (!context) { 721 err = -ENODEV; 722 goto unlock; 723 } 724 725 if (args->syncpt >= context->client->base.num_syncpts) { 726 err = -EINVAL; 727 goto unlock; 728 } 729 730 syncpt = context->client->base.syncpts[args->syncpt]; 731 732 base = host1x_syncpt_get_base(syncpt); 733 if (!base) { 734 err = -ENXIO; 735 goto unlock; 736 } 737 738 args->id = host1x_syncpt_base_id(base); 739 740 unlock: 741 mutex_unlock(&fpriv->lock); 742 return err; 743 } 744 745 static int tegra_gem_set_tiling(struct drm_device *drm, void *data, 746 struct drm_file *file) 747 { 748 struct drm_tegra_gem_set_tiling *args = data; 749 enum tegra_bo_tiling_mode mode; 750 struct drm_gem_object *gem; 751 unsigned long value = 0; 752 struct tegra_bo *bo; 753 754 switch (args->mode) { 755 case DRM_TEGRA_GEM_TILING_MODE_PITCH: 756 mode = TEGRA_BO_TILING_MODE_PITCH; 757 758 if (args->value != 0) 759 return -EINVAL; 760 761 break; 762 763 case DRM_TEGRA_GEM_TILING_MODE_TILED: 764 mode = TEGRA_BO_TILING_MODE_TILED; 765 766 if (args->value != 0) 767 return -EINVAL; 768 769 break; 770 771 case DRM_TEGRA_GEM_TILING_MODE_BLOCK: 772 mode = TEGRA_BO_TILING_MODE_BLOCK; 773 774 if (args->value > 5) 775 return -EINVAL; 776 777 value = args->value; 778 break; 779 780 default: 781 return -EINVAL; 782 } 783 784 gem = drm_gem_object_lookup(file, args->handle); 785 if (!gem) 786 return -ENOENT; 787 788 bo = to_tegra_bo(gem); 789 790 bo->tiling.mode = mode; 791 bo->tiling.value = value; 792 793 drm_gem_object_put_unlocked(gem); 794 795 return 0; 796 } 797 798 static int tegra_gem_get_tiling(struct drm_device *drm, void *data, 799 struct drm_file *file) 800 { 801 struct drm_tegra_gem_get_tiling *args = data; 802 struct drm_gem_object *gem; 803 struct tegra_bo *bo; 804 int err = 0; 805 806 gem = drm_gem_object_lookup(file, args->handle); 807 if (!gem) 808 return -ENOENT; 809 810 bo = to_tegra_bo(gem); 811 812 switch (bo->tiling.mode) { 813 case TEGRA_BO_TILING_MODE_PITCH: 814 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; 815 args->value = 0; 816 break; 817 818 case TEGRA_BO_TILING_MODE_TILED: 819 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; 820 args->value = 0; 821 break; 822 823 case TEGRA_BO_TILING_MODE_BLOCK: 824 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; 825 args->value = bo->tiling.value; 826 break; 827 828 default: 829 err = -EINVAL; 830 break; 831 } 832 833 drm_gem_object_put_unlocked(gem); 834 835 return err; 836 } 837 838 static int tegra_gem_set_flags(struct drm_device *drm, void *data, 839 struct drm_file *file) 840 { 841 struct drm_tegra_gem_set_flags *args = data; 842 struct drm_gem_object *gem; 843 struct tegra_bo *bo; 844 845 if (args->flags & ~DRM_TEGRA_GEM_FLAGS) 846 return -EINVAL; 847 848 gem = drm_gem_object_lookup(file, args->handle); 849 if (!gem) 850 return -ENOENT; 851 852 bo = to_tegra_bo(gem); 853 bo->flags = 0; 854 855 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) 856 bo->flags |= TEGRA_BO_BOTTOM_UP; 857 858 drm_gem_object_put_unlocked(gem); 859 860 return 0; 861 } 862 863 static int tegra_gem_get_flags(struct drm_device *drm, void *data, 864 struct drm_file *file) 865 { 866 struct drm_tegra_gem_get_flags *args = data; 867 struct drm_gem_object *gem; 868 struct tegra_bo *bo; 869 870 gem = drm_gem_object_lookup(file, args->handle); 871 if (!gem) 872 return -ENOENT; 873 874 bo = to_tegra_bo(gem); 875 args->flags = 0; 876 877 if (bo->flags & TEGRA_BO_BOTTOM_UP) 878 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; 879 880 drm_gem_object_put_unlocked(gem); 881 882 return 0; 883 } 884 #endif 885 886 static const struct drm_ioctl_desc tegra_drm_ioctls[] = { 887 #ifdef CONFIG_DRM_TEGRA_STAGING 888 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 889 DRM_UNLOCKED | DRM_RENDER_ALLOW), 890 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 891 DRM_UNLOCKED | DRM_RENDER_ALLOW), 892 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 893 DRM_UNLOCKED | DRM_RENDER_ALLOW), 894 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 895 DRM_UNLOCKED | DRM_RENDER_ALLOW), 896 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 897 DRM_UNLOCKED | DRM_RENDER_ALLOW), 898 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 899 DRM_UNLOCKED | DRM_RENDER_ALLOW), 900 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 901 DRM_UNLOCKED | DRM_RENDER_ALLOW), 902 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 903 DRM_UNLOCKED | DRM_RENDER_ALLOW), 904 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 905 DRM_UNLOCKED | DRM_RENDER_ALLOW), 906 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 907 DRM_UNLOCKED | DRM_RENDER_ALLOW), 908 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 909 DRM_UNLOCKED | DRM_RENDER_ALLOW), 910 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 911 DRM_UNLOCKED | DRM_RENDER_ALLOW), 912 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 913 DRM_UNLOCKED | DRM_RENDER_ALLOW), 914 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 915 DRM_UNLOCKED | DRM_RENDER_ALLOW), 916 #endif 917 }; 918 919 static const struct file_operations tegra_drm_fops = { 920 .owner = THIS_MODULE, 921 .open = drm_open, 922 .release = drm_release, 923 .unlocked_ioctl = drm_ioctl, 924 .mmap = tegra_drm_mmap, 925 .poll = drm_poll, 926 .read = drm_read, 927 .compat_ioctl = drm_compat_ioctl, 928 .llseek = noop_llseek, 929 }; 930 931 static int tegra_drm_context_cleanup(int id, void *p, void *data) 932 { 933 struct tegra_drm_context *context = p; 934 935 tegra_drm_context_free(context); 936 937 return 0; 938 } 939 940 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file) 941 { 942 struct tegra_drm_file *fpriv = file->driver_priv; 943 944 mutex_lock(&fpriv->lock); 945 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL); 946 mutex_unlock(&fpriv->lock); 947 948 idr_destroy(&fpriv->contexts); 949 mutex_destroy(&fpriv->lock); 950 kfree(fpriv); 951 } 952 953 #ifdef CONFIG_DEBUG_FS 954 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) 955 { 956 struct drm_info_node *node = (struct drm_info_node *)s->private; 957 struct drm_device *drm = node->minor->dev; 958 struct drm_framebuffer *fb; 959 960 mutex_lock(&drm->mode_config.fb_lock); 961 962 list_for_each_entry(fb, &drm->mode_config.fb_list, head) { 963 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", 964 fb->base.id, fb->width, fb->height, 965 fb->format->depth, 966 fb->format->cpp[0] * 8, 967 drm_framebuffer_read_refcount(fb)); 968 } 969 970 mutex_unlock(&drm->mode_config.fb_lock); 971 972 return 0; 973 } 974 975 static int tegra_debugfs_iova(struct seq_file *s, void *data) 976 { 977 struct drm_info_node *node = (struct drm_info_node *)s->private; 978 struct drm_device *drm = node->minor->dev; 979 struct tegra_drm *tegra = drm->dev_private; 980 struct drm_printer p = drm_seq_file_printer(s); 981 982 if (tegra->domain) { 983 mutex_lock(&tegra->mm_lock); 984 drm_mm_print(&tegra->mm, &p); 985 mutex_unlock(&tegra->mm_lock); 986 } 987 988 return 0; 989 } 990 991 static struct drm_info_list tegra_debugfs_list[] = { 992 { "framebuffers", tegra_debugfs_framebuffers, 0 }, 993 { "iova", tegra_debugfs_iova, 0 }, 994 }; 995 996 static int tegra_debugfs_init(struct drm_minor *minor) 997 { 998 return drm_debugfs_create_files(tegra_debugfs_list, 999 ARRAY_SIZE(tegra_debugfs_list), 1000 minor->debugfs_root, minor); 1001 } 1002 #endif 1003 1004 static struct drm_driver tegra_drm_driver = { 1005 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | 1006 DRIVER_ATOMIC | DRIVER_RENDER, 1007 .load = tegra_drm_load, 1008 .unload = tegra_drm_unload, 1009 .open = tegra_drm_open, 1010 .postclose = tegra_drm_postclose, 1011 .lastclose = drm_fb_helper_lastclose, 1012 1013 #if defined(CONFIG_DEBUG_FS) 1014 .debugfs_init = tegra_debugfs_init, 1015 #endif 1016 1017 .gem_free_object_unlocked = tegra_bo_free_object, 1018 .gem_vm_ops = &tegra_bo_vm_ops, 1019 1020 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1021 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1022 .gem_prime_export = tegra_gem_prime_export, 1023 .gem_prime_import = tegra_gem_prime_import, 1024 1025 .dumb_create = tegra_bo_dumb_create, 1026 1027 .ioctls = tegra_drm_ioctls, 1028 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), 1029 .fops = &tegra_drm_fops, 1030 1031 .name = DRIVER_NAME, 1032 .desc = DRIVER_DESC, 1033 .date = DRIVER_DATE, 1034 .major = DRIVER_MAJOR, 1035 .minor = DRIVER_MINOR, 1036 .patchlevel = DRIVER_PATCHLEVEL, 1037 }; 1038 1039 int tegra_drm_register_client(struct tegra_drm *tegra, 1040 struct tegra_drm_client *client) 1041 { 1042 mutex_lock(&tegra->clients_lock); 1043 list_add_tail(&client->list, &tegra->clients); 1044 mutex_unlock(&tegra->clients_lock); 1045 1046 return 0; 1047 } 1048 1049 int tegra_drm_unregister_client(struct tegra_drm *tegra, 1050 struct tegra_drm_client *client) 1051 { 1052 mutex_lock(&tegra->clients_lock); 1053 list_del_init(&client->list); 1054 mutex_unlock(&tegra->clients_lock); 1055 1056 return 0; 1057 } 1058 1059 struct iommu_group *host1x_client_iommu_attach(struct host1x_client *client, 1060 bool shared) 1061 { 1062 struct drm_device *drm = dev_get_drvdata(client->parent); 1063 struct tegra_drm *tegra = drm->dev_private; 1064 struct iommu_group *group = NULL; 1065 int err; 1066 1067 if (tegra->domain) { 1068 group = iommu_group_get(client->dev); 1069 if (!group) { 1070 dev_err(client->dev, "failed to get IOMMU group\n"); 1071 return ERR_PTR(-ENODEV); 1072 } 1073 1074 if (!shared || (shared && (group != tegra->group))) { 1075 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) 1076 if (client->dev->archdata.mapping) { 1077 struct dma_iommu_mapping *mapping = 1078 to_dma_iommu_mapping(client->dev); 1079 arm_iommu_detach_device(client->dev); 1080 arm_iommu_release_mapping(mapping); 1081 } 1082 #endif 1083 err = iommu_attach_group(tegra->domain, group); 1084 if (err < 0) { 1085 iommu_group_put(group); 1086 return ERR_PTR(err); 1087 } 1088 1089 if (shared && !tegra->group) 1090 tegra->group = group; 1091 } 1092 } 1093 1094 return group; 1095 } 1096 1097 void host1x_client_iommu_detach(struct host1x_client *client, 1098 struct iommu_group *group) 1099 { 1100 struct drm_device *drm = dev_get_drvdata(client->parent); 1101 struct tegra_drm *tegra = drm->dev_private; 1102 1103 if (group) { 1104 if (group == tegra->group) { 1105 iommu_detach_group(tegra->domain, group); 1106 tegra->group = NULL; 1107 } 1108 1109 iommu_group_put(group); 1110 } 1111 } 1112 1113 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma) 1114 { 1115 struct iova *alloc; 1116 void *virt; 1117 gfp_t gfp; 1118 int err; 1119 1120 if (tegra->domain) 1121 size = iova_align(&tegra->carveout.domain, size); 1122 else 1123 size = PAGE_ALIGN(size); 1124 1125 gfp = GFP_KERNEL | __GFP_ZERO; 1126 if (!tegra->domain) { 1127 /* 1128 * Many units only support 32-bit addresses, even on 64-bit 1129 * SoCs. If there is no IOMMU to translate into a 32-bit IO 1130 * virtual address space, force allocations to be in the 1131 * lower 32-bit range. 1132 */ 1133 gfp |= GFP_DMA; 1134 } 1135 1136 virt = (void *)__get_free_pages(gfp, get_order(size)); 1137 if (!virt) 1138 return ERR_PTR(-ENOMEM); 1139 1140 if (!tegra->domain) { 1141 /* 1142 * If IOMMU is disabled, devices address physical memory 1143 * directly. 1144 */ 1145 *dma = virt_to_phys(virt); 1146 return virt; 1147 } 1148 1149 alloc = alloc_iova(&tegra->carveout.domain, 1150 size >> tegra->carveout.shift, 1151 tegra->carveout.limit, true); 1152 if (!alloc) { 1153 err = -EBUSY; 1154 goto free_pages; 1155 } 1156 1157 *dma = iova_dma_addr(&tegra->carveout.domain, alloc); 1158 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt), 1159 size, IOMMU_READ | IOMMU_WRITE); 1160 if (err < 0) 1161 goto free_iova; 1162 1163 return virt; 1164 1165 free_iova: 1166 __free_iova(&tegra->carveout.domain, alloc); 1167 free_pages: 1168 free_pages((unsigned long)virt, get_order(size)); 1169 1170 return ERR_PTR(err); 1171 } 1172 1173 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt, 1174 dma_addr_t dma) 1175 { 1176 if (tegra->domain) 1177 size = iova_align(&tegra->carveout.domain, size); 1178 else 1179 size = PAGE_ALIGN(size); 1180 1181 if (tegra->domain) { 1182 iommu_unmap(tegra->domain, dma, size); 1183 free_iova(&tegra->carveout.domain, 1184 iova_pfn(&tegra->carveout.domain, dma)); 1185 } 1186 1187 free_pages((unsigned long)virt, get_order(size)); 1188 } 1189 1190 static int host1x_drm_probe(struct host1x_device *dev) 1191 { 1192 struct drm_driver *driver = &tegra_drm_driver; 1193 struct drm_device *drm; 1194 int err; 1195 1196 drm = drm_dev_alloc(driver, &dev->dev); 1197 if (IS_ERR(drm)) 1198 return PTR_ERR(drm); 1199 1200 dev_set_drvdata(&dev->dev, drm); 1201 1202 err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false); 1203 if (err < 0) 1204 goto put; 1205 1206 err = drm_dev_register(drm, 0); 1207 if (err < 0) 1208 goto put; 1209 1210 return 0; 1211 1212 put: 1213 drm_dev_put(drm); 1214 return err; 1215 } 1216 1217 static int host1x_drm_remove(struct host1x_device *dev) 1218 { 1219 struct drm_device *drm = dev_get_drvdata(&dev->dev); 1220 1221 drm_dev_unregister(drm); 1222 drm_dev_put(drm); 1223 1224 return 0; 1225 } 1226 1227 #ifdef CONFIG_PM_SLEEP 1228 static int host1x_drm_suspend(struct device *dev) 1229 { 1230 struct drm_device *drm = dev_get_drvdata(dev); 1231 1232 return drm_mode_config_helper_suspend(drm); 1233 } 1234 1235 static int host1x_drm_resume(struct device *dev) 1236 { 1237 struct drm_device *drm = dev_get_drvdata(dev); 1238 1239 return drm_mode_config_helper_resume(drm); 1240 } 1241 #endif 1242 1243 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend, 1244 host1x_drm_resume); 1245 1246 static const struct of_device_id host1x_drm_subdevs[] = { 1247 { .compatible = "nvidia,tegra20-dc", }, 1248 { .compatible = "nvidia,tegra20-hdmi", }, 1249 { .compatible = "nvidia,tegra20-gr2d", }, 1250 { .compatible = "nvidia,tegra20-gr3d", }, 1251 { .compatible = "nvidia,tegra30-dc", }, 1252 { .compatible = "nvidia,tegra30-hdmi", }, 1253 { .compatible = "nvidia,tegra30-gr2d", }, 1254 { .compatible = "nvidia,tegra30-gr3d", }, 1255 { .compatible = "nvidia,tegra114-dsi", }, 1256 { .compatible = "nvidia,tegra114-hdmi", }, 1257 { .compatible = "nvidia,tegra114-gr3d", }, 1258 { .compatible = "nvidia,tegra124-dc", }, 1259 { .compatible = "nvidia,tegra124-sor", }, 1260 { .compatible = "nvidia,tegra124-hdmi", }, 1261 { .compatible = "nvidia,tegra124-dsi", }, 1262 { .compatible = "nvidia,tegra124-vic", }, 1263 { .compatible = "nvidia,tegra132-dsi", }, 1264 { .compatible = "nvidia,tegra210-dc", }, 1265 { .compatible = "nvidia,tegra210-dsi", }, 1266 { .compatible = "nvidia,tegra210-sor", }, 1267 { .compatible = "nvidia,tegra210-sor1", }, 1268 { .compatible = "nvidia,tegra210-vic", }, 1269 { .compatible = "nvidia,tegra186-display", }, 1270 { .compatible = "nvidia,tegra186-dc", }, 1271 { .compatible = "nvidia,tegra186-sor", }, 1272 { .compatible = "nvidia,tegra186-sor1", }, 1273 { .compatible = "nvidia,tegra186-vic", }, 1274 { .compatible = "nvidia,tegra194-display", }, 1275 { .compatible = "nvidia,tegra194-dc", }, 1276 { .compatible = "nvidia,tegra194-sor", }, 1277 { /* sentinel */ } 1278 }; 1279 1280 static struct host1x_driver host1x_drm_driver = { 1281 .driver = { 1282 .name = "drm", 1283 .pm = &host1x_drm_pm_ops, 1284 }, 1285 .probe = host1x_drm_probe, 1286 .remove = host1x_drm_remove, 1287 .subdevs = host1x_drm_subdevs, 1288 }; 1289 1290 static struct platform_driver * const drivers[] = { 1291 &tegra_display_hub_driver, 1292 &tegra_dc_driver, 1293 &tegra_hdmi_driver, 1294 &tegra_dsi_driver, 1295 &tegra_dpaux_driver, 1296 &tegra_sor_driver, 1297 &tegra_gr2d_driver, 1298 &tegra_gr3d_driver, 1299 &tegra_vic_driver, 1300 }; 1301 1302 static int __init host1x_drm_init(void) 1303 { 1304 int err; 1305 1306 err = host1x_driver_register(&host1x_drm_driver); 1307 if (err < 0) 1308 return err; 1309 1310 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers)); 1311 if (err < 0) 1312 goto unregister_host1x; 1313 1314 return 0; 1315 1316 unregister_host1x: 1317 host1x_driver_unregister(&host1x_drm_driver); 1318 return err; 1319 } 1320 module_init(host1x_drm_init); 1321 1322 static void __exit host1x_drm_exit(void) 1323 { 1324 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); 1325 host1x_driver_unregister(&host1x_drm_driver); 1326 } 1327 module_exit(host1x_drm_exit); 1328 1329 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); 1330 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); 1331 MODULE_LICENSE("GPL v2"); 1332