12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 27480ba4dSJernej Skrabec /* 37480ba4dSJernej Skrabec * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net> 47480ba4dSJernej Skrabec */ 57480ba4dSJernej Skrabec 67480ba4dSJernej Skrabec #include <drm/drm_atomic.h> 77480ba4dSJernej Skrabec #include <drm/drm_atomic_helper.h> 87480ba4dSJernej Skrabec #include <drm/drm_crtc.h> 97480ba4dSJernej Skrabec #include <drm/drm_fb_cma_helper.h> 107480ba4dSJernej Skrabec #include <drm/drm_gem_cma_helper.h> 117b24eec7SQiang Yu #include <drm/drm_gem_framebuffer_helper.h> 127480ba4dSJernej Skrabec #include <drm/drm_plane_helper.h> 13fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 147480ba4dSJernej Skrabec 15daab3d0eSJernej Skrabec #include "sun8i_csc.h" 167480ba4dSJernej Skrabec #include "sun8i_vi_layer.h" 177480ba4dSJernej Skrabec #include "sun8i_mixer.h" 18b862a648SJernej Skrabec #include "sun8i_vi_scaler.h" 197480ba4dSJernej Skrabec 207480ba4dSJernej Skrabec static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, 21d8b3f454SPaul Kocialkowski int overlay, bool enable, unsigned int zpos, 22d8b3f454SPaul Kocialkowski unsigned int old_zpos) 237480ba4dSJernej Skrabec { 244b09c073SJernej Skrabec u32 val, bld_base, ch_base; 254b09c073SJernej Skrabec 264b09c073SJernej Skrabec bld_base = sun8i_blender_base(mixer); 274b09c073SJernej Skrabec ch_base = sun8i_channel_base(mixer, channel); 287480ba4dSJernej Skrabec 297480ba4dSJernej Skrabec DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", 307480ba4dSJernej Skrabec enable ? "En" : "Dis", channel, overlay); 317480ba4dSJernej Skrabec 327480ba4dSJernej Skrabec if (enable) 337480ba4dSJernej Skrabec val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; 347480ba4dSJernej Skrabec else 357480ba4dSJernej Skrabec val = 0; 367480ba4dSJernej Skrabec 377480ba4dSJernej Skrabec regmap_update_bits(mixer->engine.regs, 384b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), 397480ba4dSJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); 407480ba4dSJernej Skrabec 41d8b3f454SPaul Kocialkowski if (!enable || zpos != old_zpos) { 42d8b3f454SPaul Kocialkowski regmap_update_bits(mixer->engine.regs, 434b09c073SJernej Skrabec SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), 44d8b3f454SPaul Kocialkowski SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), 45d8b3f454SPaul Kocialkowski 0); 46d8b3f454SPaul Kocialkowski 47d8b3f454SPaul Kocialkowski regmap_update_bits(mixer->engine.regs, 484b09c073SJernej Skrabec SUN8I_MIXER_BLEND_ROUTE(bld_base), 49d8b3f454SPaul Kocialkowski SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), 50d8b3f454SPaul Kocialkowski 0); 51d8b3f454SPaul Kocialkowski } 52d8b3f454SPaul Kocialkowski 53f88c5ee7SJernej Skrabec if (enable) { 54f88c5ee7SJernej Skrabec val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); 557480ba4dSJernej Skrabec 567480ba4dSJernej Skrabec regmap_update_bits(mixer->engine.regs, 574b09c073SJernej Skrabec SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), 584b09c073SJernej Skrabec val, val); 59f88c5ee7SJernej Skrabec 60f88c5ee7SJernej Skrabec val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); 61f88c5ee7SJernej Skrabec 62f88c5ee7SJernej Skrabec regmap_update_bits(mixer->engine.regs, 634b09c073SJernej Skrabec SUN8I_MIXER_BLEND_ROUTE(bld_base), 64f88c5ee7SJernej Skrabec SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), 65f88c5ee7SJernej Skrabec val); 66f88c5ee7SJernej Skrabec } 677480ba4dSJernej Skrabec } 687480ba4dSJernej Skrabec 697480ba4dSJernej Skrabec static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, 70f88c5ee7SJernej Skrabec int overlay, struct drm_plane *plane, 71f88c5ee7SJernej Skrabec unsigned int zpos) 727480ba4dSJernej Skrabec { 737480ba4dSJernej Skrabec struct drm_plane_state *state = plane->state; 741343bd6cSJernej Skrabec const struct drm_format_info *format = state->fb->format; 75b862a648SJernej Skrabec u32 src_w, src_h, dst_w, dst_h; 764b09c073SJernej Skrabec u32 bld_base, ch_base; 77b862a648SJernej Skrabec u32 outsize, insize; 78b862a648SJernej Skrabec u32 hphase, vphase; 79a7db690cSJernej Skrabec u32 hn = 0, hm = 0; 80a7db690cSJernej Skrabec u32 vn = 0, vm = 0; 81e1ef9006SJernej Skrabec bool subsampled; 827480ba4dSJernej Skrabec 837480ba4dSJernej Skrabec DRM_DEBUG_DRIVER("Updating VI channel %d overlay %d\n", 847480ba4dSJernej Skrabec channel, overlay); 85b862a648SJernej Skrabec 864b09c073SJernej Skrabec bld_base = sun8i_blender_base(mixer); 874b09c073SJernej Skrabec ch_base = sun8i_channel_base(mixer, channel); 884b09c073SJernej Skrabec 89b862a648SJernej Skrabec src_w = drm_rect_width(&state->src) >> 16; 90b862a648SJernej Skrabec src_h = drm_rect_height(&state->src) >> 16; 91b862a648SJernej Skrabec dst_w = drm_rect_width(&state->dst); 92b862a648SJernej Skrabec dst_h = drm_rect_height(&state->dst); 93b862a648SJernej Skrabec 94b862a648SJernej Skrabec hphase = state->src.x1 & 0xffff; 95b862a648SJernej Skrabec vphase = state->src.y1 & 0xffff; 96b862a648SJernej Skrabec 97e1ef9006SJernej Skrabec /* make coordinates dividable by subsampling factor */ 98e1ef9006SJernej Skrabec if (format->hsub > 1) { 99e1ef9006SJernej Skrabec int mask, remainder; 100e1ef9006SJernej Skrabec 101e1ef9006SJernej Skrabec mask = format->hsub - 1; 102e1ef9006SJernej Skrabec remainder = (state->src.x1 >> 16) & mask; 103e1ef9006SJernej Skrabec src_w = (src_w + remainder) & ~mask; 104e1ef9006SJernej Skrabec hphase += remainder << 16; 105e1ef9006SJernej Skrabec } 106e1ef9006SJernej Skrabec 107e1ef9006SJernej Skrabec if (format->vsub > 1) { 108e1ef9006SJernej Skrabec int mask, remainder; 109e1ef9006SJernej Skrabec 110e1ef9006SJernej Skrabec mask = format->vsub - 1; 111e1ef9006SJernej Skrabec remainder = (state->src.y1 >> 16) & mask; 112e1ef9006SJernej Skrabec src_h = (src_h + remainder) & ~mask; 113e1ef9006SJernej Skrabec vphase += remainder << 16; 114e1ef9006SJernej Skrabec } 115e1ef9006SJernej Skrabec 116b862a648SJernej Skrabec insize = SUN8I_MIXER_SIZE(src_w, src_h); 117b862a648SJernej Skrabec outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); 1187480ba4dSJernej Skrabec 1197480ba4dSJernej Skrabec /* Set height and width */ 120b862a648SJernej Skrabec DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", 121e1ef9006SJernej Skrabec (state->src.x1 >> 16) & ~(format->hsub - 1), 122e1ef9006SJernej Skrabec (state->src.y1 >> 16) & ~(format->vsub - 1)); 123b862a648SJernej Skrabec DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); 1247480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 1254b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_SIZE(ch_base, overlay), 126b862a648SJernej Skrabec insize); 1277480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 1284b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_OVL_SIZE(ch_base), 129b862a648SJernej Skrabec insize); 130b862a648SJernej Skrabec 131e1ef9006SJernej Skrabec /* 132e1ef9006SJernej Skrabec * Scaler must be enabled for subsampled formats, so it scales 133e1ef9006SJernej Skrabec * chroma to same size as luma. 134e1ef9006SJernej Skrabec */ 135e1ef9006SJernej Skrabec subsampled = format->hsub > 1 || format->vsub > 1; 136e1ef9006SJernej Skrabec 137e1ef9006SJernej Skrabec if (insize != outsize || subsampled || hphase || vphase) { 138a7db690cSJernej Skrabec unsigned int scanline, required; 139a7db690cSJernej Skrabec struct drm_display_mode *mode; 140a7db690cSJernej Skrabec u32 hscale, vscale, fps; 141a7db690cSJernej Skrabec u64 ability; 142b862a648SJernej Skrabec 143b862a648SJernej Skrabec DRM_DEBUG_DRIVER("HW scaling is enabled\n"); 144b862a648SJernej Skrabec 145a7db690cSJernej Skrabec mode = &plane->state->crtc->state->mode; 146a7db690cSJernej Skrabec fps = (mode->clock * 1000) / (mode->vtotal * mode->htotal); 147a7db690cSJernej Skrabec ability = clk_get_rate(mixer->mod_clk); 148a7db690cSJernej Skrabec /* BSP algorithm assumes 80% efficiency of VI scaler unit */ 149a7db690cSJernej Skrabec ability *= 80; 150a7db690cSJernej Skrabec do_div(ability, mode->vdisplay * fps * max(src_w, dst_w)); 151a7db690cSJernej Skrabec 152a7db690cSJernej Skrabec required = src_h * 100 / dst_h; 153a7db690cSJernej Skrabec 154a7db690cSJernej Skrabec if (ability < required) { 155a7db690cSJernej Skrabec DRM_DEBUG_DRIVER("Using vertical coarse scaling\n"); 156a7db690cSJernej Skrabec vm = src_h; 157a7db690cSJernej Skrabec vn = (u32)ability * dst_h / 100; 158a7db690cSJernej Skrabec src_h = vn; 159a7db690cSJernej Skrabec } 160a7db690cSJernej Skrabec 161a7db690cSJernej Skrabec /* it seems that every RGB scaler has buffer for 2048 pixels */ 162a7db690cSJernej Skrabec scanline = subsampled ? mixer->cfg->scanline_yuv : 2048; 163a7db690cSJernej Skrabec 164a7db690cSJernej Skrabec if (src_w > scanline) { 165a7db690cSJernej Skrabec DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n"); 166a7db690cSJernej Skrabec hm = src_w; 167a7db690cSJernej Skrabec hn = scanline; 168a7db690cSJernej Skrabec src_w = hn; 169a7db690cSJernej Skrabec } 170a7db690cSJernej Skrabec 171a7db690cSJernej Skrabec hscale = (src_w << 16) / dst_w; 172a7db690cSJernej Skrabec vscale = (src_h << 16) / dst_h; 173b862a648SJernej Skrabec 174b862a648SJernej Skrabec sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, 1751343bd6cSJernej Skrabec dst_h, hscale, vscale, hphase, vphase, 1761343bd6cSJernej Skrabec format); 177b862a648SJernej Skrabec sun8i_vi_scaler_enable(mixer, channel, true); 178b862a648SJernej Skrabec } else { 179b862a648SJernej Skrabec DRM_DEBUG_DRIVER("HW scaling is not needed\n"); 180b862a648SJernej Skrabec sun8i_vi_scaler_enable(mixer, channel, false); 181b862a648SJernej Skrabec } 1827480ba4dSJernej Skrabec 183a7db690cSJernej Skrabec regmap_write(mixer->engine.regs, 184a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_HDS_Y(ch_base), 185a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_N(hn) | 186a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_M(hm)); 187a7db690cSJernej Skrabec regmap_write(mixer->engine.regs, 188a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_HDS_UV(ch_base), 189a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_N(hn) | 190a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_M(hm)); 191a7db690cSJernej Skrabec regmap_write(mixer->engine.regs, 192a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_VDS_Y(ch_base), 193a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_N(vn) | 194a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_M(vm)); 195a7db690cSJernej Skrabec regmap_write(mixer->engine.regs, 196a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_VDS_UV(ch_base), 197a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_N(vn) | 198a7db690cSJernej Skrabec SUN8I_MIXER_CHAN_VI_DS_M(vm)); 199a7db690cSJernej Skrabec 2007480ba4dSJernej Skrabec /* Set base coordinates */ 201b862a648SJernej Skrabec DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", 2027480ba4dSJernej Skrabec state->dst.x1, state->dst.y1); 203b862a648SJernej Skrabec DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); 2047480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 2054b09c073SJernej Skrabec SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), 2067480ba4dSJernej Skrabec SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); 2077480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 2084b09c073SJernej Skrabec SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), 209b862a648SJernej Skrabec outsize); 2107480ba4dSJernej Skrabec 2117480ba4dSJernej Skrabec return 0; 2127480ba4dSJernej Skrabec } 2137480ba4dSJernej Skrabec 214daab3d0eSJernej Skrabec static bool sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format) 215daab3d0eSJernej Skrabec { 216daab3d0eSJernej Skrabec if (!format->is_yuv) 217daab3d0eSJernej Skrabec return SUN8I_CSC_MODE_OFF; 218daab3d0eSJernej Skrabec 219daab3d0eSJernej Skrabec switch (format->format) { 220daab3d0eSJernej Skrabec case DRM_FORMAT_YVU411: 221daab3d0eSJernej Skrabec case DRM_FORMAT_YVU420: 222daab3d0eSJernej Skrabec case DRM_FORMAT_YVU422: 223daab3d0eSJernej Skrabec case DRM_FORMAT_YVU444: 224daab3d0eSJernej Skrabec return SUN8I_CSC_MODE_YVU2RGB; 225daab3d0eSJernej Skrabec default: 226daab3d0eSJernej Skrabec return SUN8I_CSC_MODE_YUV2RGB; 227daab3d0eSJernej Skrabec } 228daab3d0eSJernej Skrabec } 229daab3d0eSJernej Skrabec 2307480ba4dSJernej Skrabec static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, 2317480ba4dSJernej Skrabec int overlay, struct drm_plane *plane) 2327480ba4dSJernej Skrabec { 2337480ba4dSJernej Skrabec struct drm_plane_state *state = plane->state; 2347480ba4dSJernej Skrabec const struct de2_fmt_info *fmt_info; 235a9a75359SJernej Skrabec const struct drm_format_info *fmt; 236daab3d0eSJernej Skrabec u32 val, ch_base, csc_mode; 2374b09c073SJernej Skrabec 2384b09c073SJernej Skrabec ch_base = sun8i_channel_base(mixer, channel); 2397480ba4dSJernej Skrabec 240a9a75359SJernej Skrabec fmt = state->fb->format; 241a9a75359SJernej Skrabec fmt_info = sun8i_mixer_format_info(fmt->format); 242e1ef9006SJernej Skrabec if (!fmt_info) { 2437480ba4dSJernej Skrabec DRM_DEBUG_DRIVER("Invalid format\n"); 2447480ba4dSJernej Skrabec return -EINVAL; 2457480ba4dSJernej Skrabec } 2467480ba4dSJernej Skrabec 2477480ba4dSJernej Skrabec val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET; 2487480ba4dSJernej Skrabec regmap_update_bits(mixer->engine.regs, 2494b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), 250e1ef9006SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); 251e1ef9006SJernej Skrabec 252daab3d0eSJernej Skrabec csc_mode = sun8i_vi_layer_get_csc_mode(fmt); 253daab3d0eSJernej Skrabec if (csc_mode != SUN8I_CSC_MODE_OFF) { 254daab3d0eSJernej Skrabec sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode, 255b72cb0dcSJernej Skrabec state->color_encoding, 256b72cb0dcSJernej Skrabec state->color_range); 257e1ef9006SJernej Skrabec sun8i_csc_enable_ccsc(mixer, channel, true); 258e1ef9006SJernej Skrabec } else { 259e1ef9006SJernej Skrabec sun8i_csc_enable_ccsc(mixer, channel, false); 260e1ef9006SJernej Skrabec } 261e1ef9006SJernej Skrabec 262a9a75359SJernej Skrabec if (!fmt->is_yuv) 263e1ef9006SJernej Skrabec val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE; 264e1ef9006SJernej Skrabec else 265e1ef9006SJernej Skrabec val = 0; 266e1ef9006SJernej Skrabec 267e1ef9006SJernej Skrabec regmap_update_bits(mixer->engine.regs, 2684b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), 269e1ef9006SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val); 2707480ba4dSJernej Skrabec 271c50519e6SJernej Skrabec /* It seems that YUV formats use global alpha setting. */ 272c50519e6SJernej Skrabec if (mixer->cfg->is_de3) 273c50519e6SJernej Skrabec regmap_update_bits(mixer->engine.regs, 274c50519e6SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, 275c50519e6SJernej Skrabec overlay), 276c50519e6SJernej Skrabec SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK, 277c50519e6SJernej Skrabec SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(0xff)); 278c50519e6SJernej Skrabec 2797480ba4dSJernej Skrabec return 0; 2807480ba4dSJernej Skrabec } 2817480ba4dSJernej Skrabec 2827480ba4dSJernej Skrabec static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, 2837480ba4dSJernej Skrabec int overlay, struct drm_plane *plane) 2847480ba4dSJernej Skrabec { 2857480ba4dSJernej Skrabec struct drm_plane_state *state = plane->state; 2867480ba4dSJernej Skrabec struct drm_framebuffer *fb = state->fb; 287e1ef9006SJernej Skrabec const struct drm_format_info *format = fb->format; 2887480ba4dSJernej Skrabec struct drm_gem_cma_object *gem; 289e1ef9006SJernej Skrabec u32 dx, dy, src_x, src_y; 2907480ba4dSJernej Skrabec dma_addr_t paddr; 2914b09c073SJernej Skrabec u32 ch_base; 292e1ef9006SJernej Skrabec int i; 2937480ba4dSJernej Skrabec 2944b09c073SJernej Skrabec ch_base = sun8i_channel_base(mixer, channel); 2954b09c073SJernej Skrabec 296e1ef9006SJernej Skrabec /* Adjust x and y to be dividable by subsampling factor */ 297e1ef9006SJernej Skrabec src_x = (state->src.x1 >> 16) & ~(format->hsub - 1); 298e1ef9006SJernej Skrabec src_y = (state->src.y1 >> 16) & ~(format->vsub - 1); 299e1ef9006SJernej Skrabec 300e1ef9006SJernej Skrabec for (i = 0; i < format->num_planes; i++) { 3017480ba4dSJernej Skrabec /* Get the physical address of the buffer in memory */ 302e1ef9006SJernej Skrabec gem = drm_fb_cma_get_gem_obj(fb, i); 3037480ba4dSJernej Skrabec 3047480ba4dSJernej Skrabec DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); 3057480ba4dSJernej Skrabec 3067480ba4dSJernej Skrabec /* Compute the start of the displayed memory */ 307e1ef9006SJernej Skrabec paddr = gem->paddr + fb->offsets[i]; 308e1ef9006SJernej Skrabec 309e1ef9006SJernej Skrabec dx = src_x; 310e1ef9006SJernej Skrabec dy = src_y; 311e1ef9006SJernej Skrabec 312e1ef9006SJernej Skrabec if (i > 0) { 313e1ef9006SJernej Skrabec dx /= format->hsub; 314e1ef9006SJernej Skrabec dy /= format->vsub; 315e1ef9006SJernej Skrabec } 3167480ba4dSJernej Skrabec 3177480ba4dSJernej Skrabec /* Fixup framebuffer address for src coordinates */ 318e1ef9006SJernej Skrabec paddr += dx * format->cpp[i]; 319e1ef9006SJernej Skrabec paddr += dy * fb->pitches[i]; 3207480ba4dSJernej Skrabec 3217480ba4dSJernej Skrabec /* Set the line width */ 322e1ef9006SJernej Skrabec DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n", 323e1ef9006SJernej Skrabec i + 1, fb->pitches[i]); 3247480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 3254b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_PITCH(ch_base, 326e1ef9006SJernej Skrabec overlay, i), 327e1ef9006SJernej Skrabec fb->pitches[i]); 3287480ba4dSJernej Skrabec 329e1ef9006SJernej Skrabec DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n", 330e1ef9006SJernej Skrabec i + 1, &paddr); 3317480ba4dSJernej Skrabec 3327480ba4dSJernej Skrabec regmap_write(mixer->engine.regs, 3334b09c073SJernej Skrabec SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base, 334e1ef9006SJernej Skrabec overlay, i), 3357480ba4dSJernej Skrabec lower_32_bits(paddr)); 336e1ef9006SJernej Skrabec } 3377480ba4dSJernej Skrabec 3387480ba4dSJernej Skrabec return 0; 3397480ba4dSJernej Skrabec } 3407480ba4dSJernej Skrabec 3417480ba4dSJernej Skrabec static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, 3427480ba4dSJernej Skrabec struct drm_plane_state *state) 3437480ba4dSJernej Skrabec { 344b862a648SJernej Skrabec struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); 3457480ba4dSJernej Skrabec struct drm_crtc *crtc = state->crtc; 3467480ba4dSJernej Skrabec struct drm_crtc_state *crtc_state; 347b862a648SJernej Skrabec int min_scale, max_scale; 3487480ba4dSJernej Skrabec 3497480ba4dSJernej Skrabec if (!crtc) 3507480ba4dSJernej Skrabec return 0; 3517480ba4dSJernej Skrabec 3527480ba4dSJernej Skrabec crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); 3537480ba4dSJernej Skrabec if (WARN_ON(!crtc_state)) 3547480ba4dSJernej Skrabec return -EINVAL; 3557480ba4dSJernej Skrabec 356bc29489fSJernej Skrabec min_scale = DRM_PLANE_HELPER_NO_SCALING; 357bc29489fSJernej Skrabec max_scale = DRM_PLANE_HELPER_NO_SCALING; 358bc29489fSJernej Skrabec 359b862a648SJernej Skrabec if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { 360b862a648SJernej Skrabec min_scale = SUN8I_VI_SCALER_SCALE_MIN; 361b862a648SJernej Skrabec max_scale = SUN8I_VI_SCALER_SCALE_MAX; 362b862a648SJernej Skrabec } 363b862a648SJernej Skrabec 36481af63a4SVille Syrjälä return drm_atomic_helper_check_plane_state(state, crtc_state, 365b862a648SJernej Skrabec min_scale, max_scale, 3667480ba4dSJernej Skrabec true, true); 3677480ba4dSJernej Skrabec } 3687480ba4dSJernej Skrabec 3697480ba4dSJernej Skrabec static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, 3707480ba4dSJernej Skrabec struct drm_plane_state *old_state) 3717480ba4dSJernej Skrabec { 3727480ba4dSJernej Skrabec struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); 373d8b3f454SPaul Kocialkowski unsigned int old_zpos = old_state->normalized_zpos; 3747480ba4dSJernej Skrabec struct sun8i_mixer *mixer = layer->mixer; 3757480ba4dSJernej Skrabec 376d8b3f454SPaul Kocialkowski sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, 377d8b3f454SPaul Kocialkowski old_zpos); 3787480ba4dSJernej Skrabec } 3797480ba4dSJernej Skrabec 3807480ba4dSJernej Skrabec static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, 3817480ba4dSJernej Skrabec struct drm_plane_state *old_state) 3827480ba4dSJernej Skrabec { 3837480ba4dSJernej Skrabec struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); 384f88c5ee7SJernej Skrabec unsigned int zpos = plane->state->normalized_zpos; 385d8b3f454SPaul Kocialkowski unsigned int old_zpos = old_state->normalized_zpos; 3867480ba4dSJernej Skrabec struct sun8i_mixer *mixer = layer->mixer; 3877480ba4dSJernej Skrabec 3887480ba4dSJernej Skrabec if (!plane->state->visible) { 3897480ba4dSJernej Skrabec sun8i_vi_layer_enable(mixer, layer->channel, 390d8b3f454SPaul Kocialkowski layer->overlay, false, 0, old_zpos); 3917480ba4dSJernej Skrabec return; 3927480ba4dSJernej Skrabec } 3937480ba4dSJernej Skrabec 3947480ba4dSJernej Skrabec sun8i_vi_layer_update_coord(mixer, layer->channel, 395f88c5ee7SJernej Skrabec layer->overlay, plane, zpos); 3967480ba4dSJernej Skrabec sun8i_vi_layer_update_formats(mixer, layer->channel, 3977480ba4dSJernej Skrabec layer->overlay, plane); 3987480ba4dSJernej Skrabec sun8i_vi_layer_update_buffer(mixer, layer->channel, 3997480ba4dSJernej Skrabec layer->overlay, plane); 400f88c5ee7SJernej Skrabec sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, 401d8b3f454SPaul Kocialkowski true, zpos, old_zpos); 4027480ba4dSJernej Skrabec } 4037480ba4dSJernej Skrabec 4047480ba4dSJernej Skrabec static struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { 4057b24eec7SQiang Yu .prepare_fb = drm_gem_fb_prepare_fb, 4067480ba4dSJernej Skrabec .atomic_check = sun8i_vi_layer_atomic_check, 4077480ba4dSJernej Skrabec .atomic_disable = sun8i_vi_layer_atomic_disable, 4087480ba4dSJernej Skrabec .atomic_update = sun8i_vi_layer_atomic_update, 4097480ba4dSJernej Skrabec }; 4107480ba4dSJernej Skrabec 4117480ba4dSJernej Skrabec static const struct drm_plane_funcs sun8i_vi_layer_funcs = { 4127480ba4dSJernej Skrabec .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 4137480ba4dSJernej Skrabec .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 4147480ba4dSJernej Skrabec .destroy = drm_plane_cleanup, 4157480ba4dSJernej Skrabec .disable_plane = drm_atomic_helper_disable_plane, 4167480ba4dSJernej Skrabec .reset = drm_atomic_helper_plane_reset, 4177480ba4dSJernej Skrabec .update_plane = drm_atomic_helper_update_plane, 4187480ba4dSJernej Skrabec }; 4197480ba4dSJernej Skrabec 4207480ba4dSJernej Skrabec /* 42120896ef1SJernej Skrabec * While DE2 VI layer supports same RGB formats as UI layer, alpha 42220896ef1SJernej Skrabec * channel is ignored. This structure lists all unique variants 42320896ef1SJernej Skrabec * where alpha channel is replaced with "don't care" (X) channel. 4247480ba4dSJernej Skrabec */ 4257480ba4dSJernej Skrabec static const u32 sun8i_vi_layer_formats[] = { 4267480ba4dSJernej Skrabec DRM_FORMAT_BGR565, 4277480ba4dSJernej Skrabec DRM_FORMAT_BGR888, 42820896ef1SJernej Skrabec DRM_FORMAT_BGRX4444, 42920896ef1SJernej Skrabec DRM_FORMAT_BGRX5551, 4307480ba4dSJernej Skrabec DRM_FORMAT_BGRX8888, 4317480ba4dSJernej Skrabec DRM_FORMAT_RGB565, 4327480ba4dSJernej Skrabec DRM_FORMAT_RGB888, 43320896ef1SJernej Skrabec DRM_FORMAT_RGBX4444, 43420896ef1SJernej Skrabec DRM_FORMAT_RGBX5551, 4357480ba4dSJernej Skrabec DRM_FORMAT_RGBX8888, 43620896ef1SJernej Skrabec DRM_FORMAT_XBGR1555, 43720896ef1SJernej Skrabec DRM_FORMAT_XBGR4444, 4387480ba4dSJernej Skrabec DRM_FORMAT_XBGR8888, 43920896ef1SJernej Skrabec DRM_FORMAT_XRGB1555, 44020896ef1SJernej Skrabec DRM_FORMAT_XRGB4444, 4417480ba4dSJernej Skrabec DRM_FORMAT_XRGB8888, 442e1ef9006SJernej Skrabec 443e1ef9006SJernej Skrabec DRM_FORMAT_NV16, 444e1ef9006SJernej Skrabec DRM_FORMAT_NV12, 445e1ef9006SJernej Skrabec DRM_FORMAT_NV21, 446e1ef9006SJernej Skrabec DRM_FORMAT_NV61, 447e1ef9006SJernej Skrabec DRM_FORMAT_UYVY, 448e1ef9006SJernej Skrabec DRM_FORMAT_VYUY, 449e1ef9006SJernej Skrabec DRM_FORMAT_YUYV, 450e1ef9006SJernej Skrabec DRM_FORMAT_YVYU, 451e1ef9006SJernej Skrabec DRM_FORMAT_YUV411, 452e1ef9006SJernej Skrabec DRM_FORMAT_YUV420, 453e1ef9006SJernej Skrabec DRM_FORMAT_YUV422, 454e1ef9006SJernej Skrabec DRM_FORMAT_YVU411, 455e1ef9006SJernej Skrabec DRM_FORMAT_YVU420, 456e1ef9006SJernej Skrabec DRM_FORMAT_YVU422, 4577480ba4dSJernej Skrabec }; 4587480ba4dSJernej Skrabec 459169ca4b3SJernej Skrabec static const u32 sun8i_vi_layer_de3_formats[] = { 460169ca4b3SJernej Skrabec DRM_FORMAT_ABGR1555, 461169ca4b3SJernej Skrabec DRM_FORMAT_ABGR2101010, 462169ca4b3SJernej Skrabec DRM_FORMAT_ABGR4444, 463169ca4b3SJernej Skrabec DRM_FORMAT_ABGR8888, 464169ca4b3SJernej Skrabec DRM_FORMAT_ARGB1555, 465169ca4b3SJernej Skrabec DRM_FORMAT_ARGB2101010, 466169ca4b3SJernej Skrabec DRM_FORMAT_ARGB4444, 467169ca4b3SJernej Skrabec DRM_FORMAT_ARGB8888, 468169ca4b3SJernej Skrabec DRM_FORMAT_BGR565, 469169ca4b3SJernej Skrabec DRM_FORMAT_BGR888, 470169ca4b3SJernej Skrabec DRM_FORMAT_BGRA1010102, 471169ca4b3SJernej Skrabec DRM_FORMAT_BGRA5551, 472169ca4b3SJernej Skrabec DRM_FORMAT_BGRA4444, 473169ca4b3SJernej Skrabec DRM_FORMAT_BGRA8888, 474169ca4b3SJernej Skrabec DRM_FORMAT_BGRX8888, 475169ca4b3SJernej Skrabec DRM_FORMAT_RGB565, 476169ca4b3SJernej Skrabec DRM_FORMAT_RGB888, 477169ca4b3SJernej Skrabec DRM_FORMAT_RGBA1010102, 478169ca4b3SJernej Skrabec DRM_FORMAT_RGBA4444, 479169ca4b3SJernej Skrabec DRM_FORMAT_RGBA5551, 480169ca4b3SJernej Skrabec DRM_FORMAT_RGBA8888, 481169ca4b3SJernej Skrabec DRM_FORMAT_RGBX8888, 482169ca4b3SJernej Skrabec DRM_FORMAT_XBGR8888, 483169ca4b3SJernej Skrabec DRM_FORMAT_XRGB8888, 484169ca4b3SJernej Skrabec 485169ca4b3SJernej Skrabec DRM_FORMAT_NV16, 486169ca4b3SJernej Skrabec DRM_FORMAT_NV12, 487169ca4b3SJernej Skrabec DRM_FORMAT_NV21, 488169ca4b3SJernej Skrabec DRM_FORMAT_NV61, 489169ca4b3SJernej Skrabec DRM_FORMAT_P010, 490169ca4b3SJernej Skrabec DRM_FORMAT_P210, 491169ca4b3SJernej Skrabec DRM_FORMAT_UYVY, 492169ca4b3SJernej Skrabec DRM_FORMAT_VYUY, 493169ca4b3SJernej Skrabec DRM_FORMAT_YUYV, 494169ca4b3SJernej Skrabec DRM_FORMAT_YVYU, 495169ca4b3SJernej Skrabec DRM_FORMAT_YUV411, 496169ca4b3SJernej Skrabec DRM_FORMAT_YUV420, 497169ca4b3SJernej Skrabec DRM_FORMAT_YUV422, 498169ca4b3SJernej Skrabec DRM_FORMAT_YVU411, 499169ca4b3SJernej Skrabec DRM_FORMAT_YVU420, 500169ca4b3SJernej Skrabec DRM_FORMAT_YVU422, 501169ca4b3SJernej Skrabec }; 502169ca4b3SJernej Skrabec 5037480ba4dSJernej Skrabec struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, 5047480ba4dSJernej Skrabec struct sun8i_mixer *mixer, 5057480ba4dSJernej Skrabec int index) 5067480ba4dSJernej Skrabec { 5075917e0bdSJernej Skrabec u32 supported_encodings, supported_ranges; 508169ca4b3SJernej Skrabec unsigned int plane_cnt, format_count; 5097480ba4dSJernej Skrabec struct sun8i_vi_layer *layer; 510169ca4b3SJernej Skrabec const u32 *formats; 5117480ba4dSJernej Skrabec int ret; 5127480ba4dSJernej Skrabec 5137480ba4dSJernej Skrabec layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); 5147480ba4dSJernej Skrabec if (!layer) 5157480ba4dSJernej Skrabec return ERR_PTR(-ENOMEM); 5167480ba4dSJernej Skrabec 517169ca4b3SJernej Skrabec if (mixer->cfg->is_de3) { 518169ca4b3SJernej Skrabec formats = sun8i_vi_layer_de3_formats; 519169ca4b3SJernej Skrabec format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); 520169ca4b3SJernej Skrabec } else { 521169ca4b3SJernej Skrabec formats = sun8i_vi_layer_formats; 522169ca4b3SJernej Skrabec format_count = ARRAY_SIZE(sun8i_vi_layer_formats); 523169ca4b3SJernej Skrabec } 524169ca4b3SJernej Skrabec 5257480ba4dSJernej Skrabec /* possible crtcs are set later */ 5267480ba4dSJernej Skrabec ret = drm_universal_plane_init(drm, &layer->plane, 0, 5277480ba4dSJernej Skrabec &sun8i_vi_layer_funcs, 528169ca4b3SJernej Skrabec formats, format_count, 5297480ba4dSJernej Skrabec NULL, DRM_PLANE_TYPE_OVERLAY, NULL); 5307480ba4dSJernej Skrabec if (ret) { 5317480ba4dSJernej Skrabec dev_err(drm->dev, "Couldn't initialize layer\n"); 5327480ba4dSJernej Skrabec return ERR_PTR(ret); 5337480ba4dSJernej Skrabec } 5347480ba4dSJernej Skrabec 535f88c5ee7SJernej Skrabec plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; 536f88c5ee7SJernej Skrabec 537f88c5ee7SJernej Skrabec ret = drm_plane_create_zpos_property(&layer->plane, index, 538f88c5ee7SJernej Skrabec 0, plane_cnt - 1); 5397480ba4dSJernej Skrabec if (ret) { 5407480ba4dSJernej Skrabec dev_err(drm->dev, "Couldn't add zpos property\n"); 5417480ba4dSJernej Skrabec return ERR_PTR(ret); 5427480ba4dSJernej Skrabec } 5437480ba4dSJernej Skrabec 5445917e0bdSJernej Skrabec supported_encodings = BIT(DRM_COLOR_YCBCR_BT601) | 5455917e0bdSJernej Skrabec BIT(DRM_COLOR_YCBCR_BT709); 5465917e0bdSJernej Skrabec 5475917e0bdSJernej Skrabec supported_ranges = BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | 5485917e0bdSJernej Skrabec BIT(DRM_COLOR_YCBCR_FULL_RANGE); 5495917e0bdSJernej Skrabec 5505917e0bdSJernej Skrabec ret = drm_plane_create_color_properties(&layer->plane, 5515917e0bdSJernej Skrabec supported_encodings, 5525917e0bdSJernej Skrabec supported_ranges, 5535917e0bdSJernej Skrabec DRM_COLOR_YCBCR_BT709, 5545917e0bdSJernej Skrabec DRM_COLOR_YCBCR_LIMITED_RANGE); 5555917e0bdSJernej Skrabec if (ret) { 5565917e0bdSJernej Skrabec dev_err(drm->dev, "Couldn't add encoding and range properties!\n"); 5575917e0bdSJernej Skrabec return ERR_PTR(ret); 5585917e0bdSJernej Skrabec } 5595917e0bdSJernej Skrabec 5607480ba4dSJernej Skrabec drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); 5617480ba4dSJernej Skrabec layer->mixer = mixer; 5627480ba4dSJernej Skrabec layer->channel = index; 5637480ba4dSJernej Skrabec layer->overlay = 0; 5647480ba4dSJernej Skrabec 5657480ba4dSJernej Skrabec return layer; 5667480ba4dSJernej Skrabec } 567