1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> */
3 
4 #ifndef _SUN8I_TCON_TOP_H_
5 #define _SUN8I_TCON_TOP_H_
6 
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/reset.h>
10 #include <linux/spinlock.h>
11 
12 #define TCON_TOP_TCON_TV_SETUP_REG	0x00
13 
14 #define TCON_TOP_PORT_SEL_REG		0x1C
15 #define TCON_TOP_PORT_DE0_MSK			GENMASK(1, 0)
16 #define TCON_TOP_PORT_DE1_MSK			GENMASK(5, 4)
17 
18 #define TCON_TOP_GATE_SRC_REG		0x20
19 #define TCON_TOP_HDMI_SRC_MSK			GENMASK(29, 28)
20 #define TCON_TOP_TCON_TV1_GATE			24
21 #define TCON_TOP_TCON_TV0_GATE			20
22 #define TCON_TOP_TCON_DSI_GATE			16
23 
24 #define CLK_NUM					3
25 
26 struct sun8i_tcon_top {
27 	struct clk			*bus;
28 	struct clk_hw_onecell_data	*clk_data;
29 	void __iomem			*regs;
30 	struct reset_control		*rst;
31 
32 	/*
33 	 * spinlock is used to synchronize access to same
34 	 * register where multiple clock gates can be set.
35 	 */
36 	spinlock_t			reg_lock;
37 };
38 
39 extern const struct of_device_id sun8i_tcon_top_of_table[];
40 
41 int sun8i_tcon_top_set_hdmi_src(struct device *dev, int tcon);
42 int sun8i_tcon_top_de_config(struct device *dev, int mixer, int tcon);
43 
44 #endif /* _SUN8I_TCON_TOP_H_ */
45