1 /* 2 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 */ 9 10 #ifndef _SUN8I_MIXER_H_ 11 #define _SUN8I_MIXER_H_ 12 13 #include <linux/clk.h> 14 #include <linux/regmap.h> 15 #include <linux/reset.h> 16 17 #include "sun8i_csc.h" 18 #include "sunxi_engine.h" 19 20 #define SUN8I_MIXER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) 21 #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) 22 23 #define SUN8I_MIXER_GLOBAL_CTL 0x0 24 #define SUN8I_MIXER_GLOBAL_STATUS 0x4 25 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8 26 #define SUN8I_MIXER_GLOBAL_SIZE 0xc 27 28 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0) 29 30 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0) 31 32 #define DE2_MIXER_UNIT_SIZE 0x6000 33 34 #define DE2_BLD_BASE 0x1000 35 #define DE2_CH_BASE 0x2000 36 #define DE2_CH_SIZE 0x1000 37 38 #define SUN8I_MIXER_BLEND_PIPE_CTL(base) ((base) + 0) 39 #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x) ((base) + 0x4 + 0x10 * (x)) 40 #define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x) ((base) + 0x8 + 0x10 * (x)) 41 #define SUN8I_MIXER_BLEND_ATTR_COORD(base, x) ((base) + 0xc + 0x10 * (x)) 42 #define SUN8I_MIXER_BLEND_ROUTE(base) ((base) + 0x80) 43 #define SUN8I_MIXER_BLEND_PREMULTIPLY(base) ((base) + 0x84) 44 #define SUN8I_MIXER_BLEND_BKCOLOR(base) ((base) + 0x88) 45 #define SUN8I_MIXER_BLEND_OUTSIZE(base) ((base) + 0x8c) 46 #define SUN8I_MIXER_BLEND_MODE(base, x) ((base) + 0x90 + 0x04 * (x)) 47 #define SUN8I_MIXER_BLEND_CK_CTL(base) ((base) + 0xb0) 48 #define SUN8I_MIXER_BLEND_CK_CFG(base) ((base) + 0xb4) 49 #define SUN8I_MIXER_BLEND_CK_MAX(base, x) ((base) + 0xc0 + 0x04 * (x)) 50 #define SUN8I_MIXER_BLEND_CK_MIN(base, x) ((base) + 0xe0 + 0x04 * (x)) 51 #define SUN8I_MIXER_BLEND_OUTCTL(base) ((base) + 0xfc) 52 53 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK GENMASK(12, 8) 54 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe) BIT(8 + pipe) 55 #define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe) BIT(pipe) 56 /* colors are always in AARRGGBB format */ 57 #define SUN8I_MIXER_BLEND_COLOR_BLACK 0xff000000 58 /* The following numbers are some still unknown magic numbers */ 59 #define SUN8I_MIXER_BLEND_MODE_DEF 0x03010301 60 61 #define SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(n) (0xf << ((n) << 2)) 62 #define SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(n) ((n) << 2) 63 64 #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) 65 66 #define SUN8I_MIXER_FBFMT_ARGB8888 0 67 #define SUN8I_MIXER_FBFMT_ABGR8888 1 68 #define SUN8I_MIXER_FBFMT_RGBA8888 2 69 #define SUN8I_MIXER_FBFMT_BGRA8888 3 70 #define SUN8I_MIXER_FBFMT_XRGB8888 4 71 #define SUN8I_MIXER_FBFMT_XBGR8888 5 72 #define SUN8I_MIXER_FBFMT_RGBX8888 6 73 #define SUN8I_MIXER_FBFMT_BGRX8888 7 74 #define SUN8I_MIXER_FBFMT_RGB888 8 75 #define SUN8I_MIXER_FBFMT_BGR888 9 76 #define SUN8I_MIXER_FBFMT_RGB565 10 77 #define SUN8I_MIXER_FBFMT_BGR565 11 78 #define SUN8I_MIXER_FBFMT_ARGB4444 12 79 #define SUN8I_MIXER_FBFMT_ABGR4444 13 80 #define SUN8I_MIXER_FBFMT_RGBA4444 14 81 #define SUN8I_MIXER_FBFMT_BGRA4444 15 82 #define SUN8I_MIXER_FBFMT_ARGB1555 16 83 #define SUN8I_MIXER_FBFMT_ABGR1555 17 84 #define SUN8I_MIXER_FBFMT_RGBA5551 18 85 #define SUN8I_MIXER_FBFMT_BGRA5551 19 86 87 #define SUN8I_MIXER_FBFMT_YUYV 0 88 #define SUN8I_MIXER_FBFMT_UYVY 1 89 #define SUN8I_MIXER_FBFMT_YVYU 2 90 #define SUN8I_MIXER_FBFMT_VYUY 3 91 #define SUN8I_MIXER_FBFMT_NV16 4 92 #define SUN8I_MIXER_FBFMT_NV61 5 93 #define SUN8I_MIXER_FBFMT_YUV422 6 94 /* format 7 doesn't exist */ 95 #define SUN8I_MIXER_FBFMT_NV12 8 96 #define SUN8I_MIXER_FBFMT_NV21 9 97 #define SUN8I_MIXER_FBFMT_YUV420 10 98 /* format 11 doesn't exist */ 99 /* format 12 is semi-planar YUV411 UVUV */ 100 /* format 13 is semi-planar YUV411 VUVU */ 101 #define SUN8I_MIXER_FBFMT_YUV411 14 102 103 /* 104 * Sub-engines listed bellow are unused for now. The EN registers are here only 105 * to be used to disable these sub-engines. 106 */ 107 #define SUN8I_MIXER_FCE_EN 0xa0000 108 #define SUN8I_MIXER_BWS_EN 0xa2000 109 #define SUN8I_MIXER_LTI_EN 0xa4000 110 #define SUN8I_MIXER_PEAK_EN 0xa6000 111 #define SUN8I_MIXER_ASE_EN 0xa8000 112 #define SUN8I_MIXER_FCC_EN 0xaa000 113 #define SUN8I_MIXER_DCSC_EN 0xb0000 114 115 struct de2_fmt_info { 116 u32 drm_fmt; 117 u32 de2_fmt; 118 bool rgb; 119 enum sun8i_csc_mode csc; 120 }; 121 122 /** 123 * struct sun8i_mixer_cfg - mixer HW configuration 124 * @vi_num: number of VI channels 125 * @ui_num: number of UI channels 126 * @scaler_mask: bitmask which tells which channel supports scaling 127 * First, scaler supports for VI channels is defined and after that, scaler 128 * support for UI channels. For example, if mixer has 2 VI channels without 129 * scaler and 2 UI channels with scaler, bitmask would be 0xC. 130 * @ccsc: select set of CCSC base addresses 131 * Set value to 0 if this is first mixer or second mixer with VEP support. 132 * Set value to 1 if this is second mixer without VEP support. Other values 133 * are invalid. 134 * @mod_rate: module clock rate that needs to be set in order to have 135 * a functional block. 136 */ 137 struct sun8i_mixer_cfg { 138 int vi_num; 139 int ui_num; 140 int scaler_mask; 141 int ccsc; 142 unsigned long mod_rate; 143 }; 144 145 struct sun8i_mixer { 146 struct sunxi_engine engine; 147 148 const struct sun8i_mixer_cfg *cfg; 149 150 struct reset_control *reset; 151 152 struct clk *bus_clk; 153 struct clk *mod_clk; 154 }; 155 156 static inline struct sun8i_mixer * 157 engine_to_sun8i_mixer(struct sunxi_engine *engine) 158 { 159 return container_of(engine, struct sun8i_mixer, engine); 160 } 161 162 static inline u32 163 sun8i_blender_base(struct sun8i_mixer *mixer) 164 { 165 return DE2_BLD_BASE; 166 } 167 168 static inline u32 169 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) 170 { 171 return DE2_CH_BASE + channel * DE2_CH_SIZE; 172 } 173 174 const struct de2_fmt_info *sun8i_mixer_format_info(u32 format); 175 #endif /* _SUN8I_MIXER_H_ */ 176