1 /*
2  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  */
9 
10 #ifndef _SUN8I_MIXER_H_
11 #define _SUN8I_MIXER_H_
12 
13 #include <linux/clk.h>
14 #include <linux/regmap.h>
15 #include <linux/reset.h>
16 
17 #include "sun8i_csc.h"
18 #include "sunxi_engine.h"
19 
20 #define SUN8I_MIXER_SIZE(w, h)			(((h) - 1) << 16 | ((w) - 1))
21 #define SUN8I_MIXER_COORD(x, y)			((y) << 16 | (x))
22 
23 #define SUN8I_MIXER_GLOBAL_CTL			0x0
24 #define SUN8I_MIXER_GLOBAL_STATUS		0x4
25 #define SUN8I_MIXER_GLOBAL_DBUFF		0x8
26 #define SUN8I_MIXER_GLOBAL_SIZE			0xc
27 
28 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN		BIT(0)
29 
30 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE		BIT(0)
31 
32 #define DE2_MIXER_UNIT_SIZE			0x6000
33 #define DE3_MIXER_UNIT_SIZE			0x3000
34 
35 #define DE2_BLD_BASE				0x1000
36 #define DE2_CH_BASE				0x2000
37 #define DE2_CH_SIZE				0x1000
38 
39 #define DE3_BLD_BASE				0x0800
40 #define DE3_CH_BASE				0x1000
41 #define DE3_CH_SIZE				0x0800
42 
43 #define SUN8I_MIXER_BLEND_PIPE_CTL(base)	((base) + 0)
44 #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x)	((base) + 0x4 + 0x10 * (x))
45 #define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x)	((base) + 0x8 + 0x10 * (x))
46 #define SUN8I_MIXER_BLEND_ATTR_COORD(base, x)	((base) + 0xc + 0x10 * (x))
47 #define SUN8I_MIXER_BLEND_ROUTE(base)		((base) + 0x80)
48 #define SUN8I_MIXER_BLEND_PREMULTIPLY(base)	((base) + 0x84)
49 #define SUN8I_MIXER_BLEND_BKCOLOR(base)		((base) + 0x88)
50 #define SUN8I_MIXER_BLEND_OUTSIZE(base)		((base) + 0x8c)
51 #define SUN8I_MIXER_BLEND_MODE(base, x)		((base) + 0x90 + 0x04 * (x))
52 #define SUN8I_MIXER_BLEND_CK_CTL(base)		((base) + 0xb0)
53 #define SUN8I_MIXER_BLEND_CK_CFG(base)		((base) + 0xb4)
54 #define SUN8I_MIXER_BLEND_CK_MAX(base, x)	((base) + 0xc0 + 0x04 * (x))
55 #define SUN8I_MIXER_BLEND_CK_MIN(base, x)	((base) + 0xe0 + 0x04 * (x))
56 #define SUN8I_MIXER_BLEND_OUTCTL(base)		((base) + 0xfc)
57 #define SUN50I_MIXER_BLEND_CSC_CTL(base)	((base) + 0x100)
58 #define SUN50I_MIXER_BLEND_CSC_COEFF(base, layer, x, y) \
59 	((base) + 0x110 + (layer) * 0x30 +  (x) * 0x10 + 4 * (y))
60 #define SUN50I_MIXER_BLEND_CSC_CONST(base, layer, i) \
61 	((base) + 0x110 + (layer) * 0x30 +  (i) * 0x10 + 0x0c)
62 
63 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK	GENMASK(12, 8)
64 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe)	BIT(8 + pipe)
65 #define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe)	BIT(pipe)
66 
67 /* colors are always in AARRGGBB format */
68 #define SUN8I_MIXER_BLEND_COLOR_BLACK		0xff000000
69 /* The following numbers are some still unknown magic numbers */
70 #define SUN8I_MIXER_BLEND_MODE_DEF		0x03010301
71 
72 #define SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(n)	(0xf << ((n) << 2))
73 #define SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(n)	((n) << 2)
74 
75 #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED	BIT(1)
76 
77 #define SUN50I_MIXER_BLEND_CSC_CTL_EN(ch)	BIT(ch)
78 #define SUN50I_MIXER_BLEND_CSC_CONST_VAL(d, c)	(((d) << 16) | ((c) & 0xffff))
79 
80 #define SUN8I_MIXER_FBFMT_ARGB8888	0
81 #define SUN8I_MIXER_FBFMT_ABGR8888	1
82 #define SUN8I_MIXER_FBFMT_RGBA8888	2
83 #define SUN8I_MIXER_FBFMT_BGRA8888	3
84 #define SUN8I_MIXER_FBFMT_XRGB8888	4
85 #define SUN8I_MIXER_FBFMT_XBGR8888	5
86 #define SUN8I_MIXER_FBFMT_RGBX8888	6
87 #define SUN8I_MIXER_FBFMT_BGRX8888	7
88 #define SUN8I_MIXER_FBFMT_RGB888	8
89 #define SUN8I_MIXER_FBFMT_BGR888	9
90 #define SUN8I_MIXER_FBFMT_RGB565	10
91 #define SUN8I_MIXER_FBFMT_BGR565	11
92 #define SUN8I_MIXER_FBFMT_ARGB4444	12
93 #define SUN8I_MIXER_FBFMT_ABGR4444	13
94 #define SUN8I_MIXER_FBFMT_RGBA4444	14
95 #define SUN8I_MIXER_FBFMT_BGRA4444	15
96 #define SUN8I_MIXER_FBFMT_ARGB1555	16
97 #define SUN8I_MIXER_FBFMT_ABGR1555	17
98 #define SUN8I_MIXER_FBFMT_RGBA5551	18
99 #define SUN8I_MIXER_FBFMT_BGRA5551	19
100 
101 #define SUN8I_MIXER_FBFMT_YUYV		0
102 #define SUN8I_MIXER_FBFMT_UYVY		1
103 #define SUN8I_MIXER_FBFMT_YVYU		2
104 #define SUN8I_MIXER_FBFMT_VYUY		3
105 #define SUN8I_MIXER_FBFMT_NV16		4
106 #define SUN8I_MIXER_FBFMT_NV61		5
107 #define SUN8I_MIXER_FBFMT_YUV422	6
108 /* format 7 doesn't exist */
109 #define SUN8I_MIXER_FBFMT_NV12		8
110 #define SUN8I_MIXER_FBFMT_NV21		9
111 #define SUN8I_MIXER_FBFMT_YUV420	10
112 /* format 11 doesn't exist */
113 /* format 12 is semi-planar YUV411 UVUV */
114 /* format 13 is semi-planar YUV411 VUVU */
115 #define SUN8I_MIXER_FBFMT_YUV411	14
116 
117 /*
118  * Sub-engines listed bellow are unused for now. The EN registers are here only
119  * to be used to disable these sub-engines.
120  */
121 #define SUN8I_MIXER_FCE_EN			0xa0000
122 #define SUN8I_MIXER_BWS_EN			0xa2000
123 #define SUN8I_MIXER_LTI_EN			0xa4000
124 #define SUN8I_MIXER_PEAK_EN			0xa6000
125 #define SUN8I_MIXER_ASE_EN			0xa8000
126 #define SUN8I_MIXER_FCC_EN			0xaa000
127 #define SUN8I_MIXER_DCSC_EN			0xb0000
128 
129 #define SUN50I_MIXER_FCE_EN			0x70000
130 #define SUN50I_MIXER_PEAK_EN			0x70800
131 #define SUN50I_MIXER_LCTI_EN			0x71000
132 #define SUN50I_MIXER_BLS_EN			0x71800
133 #define SUN50I_MIXER_FCC_EN			0x72000
134 #define SUN50I_MIXER_DNS_EN			0x80000
135 #define SUN50I_MIXER_DRC_EN			0xa0000
136 #define SUN50I_MIXER_FMT_EN			0xa8000
137 #define SUN50I_MIXER_CDC0_EN			0xd0000
138 #define SUN50I_MIXER_CDC1_EN			0xd8000
139 
140 struct de2_fmt_info {
141 	u32			drm_fmt;
142 	u32			de2_fmt;
143 	bool			rgb;
144 	enum sun8i_csc_mode	csc;
145 };
146 
147 /**
148  * struct sun8i_mixer_cfg - mixer HW configuration
149  * @vi_num: number of VI channels
150  * @ui_num: number of UI channels
151  * @scaler_mask: bitmask which tells which channel supports scaling
152  *	First, scaler supports for VI channels is defined and after that, scaler
153  *	support for UI channels. For example, if mixer has 2 VI channels without
154  *	scaler and 2 UI channels with scaler, bitmask would be 0xC.
155  * @ccsc: select set of CCSC base addresses
156  *	Set value to 0 if this is first mixer or second mixer with VEP support.
157  *	Set value to 1 if this is second mixer without VEP support. Other values
158  *	are invalid.
159  * @mod_rate: module clock rate that needs to be set in order to have
160  *	a functional block.
161  * @is_de3: true, if this is next gen display engine 3.0, false otherwise.
162  * @scaline_yuv: size of a scanline for VI scaler for YUV formats.
163  */
164 struct sun8i_mixer_cfg {
165 	int		vi_num;
166 	int		ui_num;
167 	int		scaler_mask;
168 	int		ccsc;
169 	unsigned long	mod_rate;
170 	unsigned int	is_de3 : 1;
171 	unsigned int	scanline_yuv;
172 };
173 
174 struct sun8i_mixer {
175 	struct sunxi_engine		engine;
176 
177 	const struct sun8i_mixer_cfg	*cfg;
178 
179 	struct reset_control		*reset;
180 
181 	struct clk			*bus_clk;
182 	struct clk			*mod_clk;
183 };
184 
185 static inline struct sun8i_mixer *
186 engine_to_sun8i_mixer(struct sunxi_engine *engine)
187 {
188 	return container_of(engine, struct sun8i_mixer, engine);
189 }
190 
191 static inline u32
192 sun8i_blender_base(struct sun8i_mixer *mixer)
193 {
194 	return mixer->cfg->is_de3 ? DE3_BLD_BASE : DE2_BLD_BASE;
195 }
196 
197 static inline u32
198 sun8i_channel_base(struct sun8i_mixer *mixer, int channel)
199 {
200 	if (mixer->cfg->is_de3)
201 		return DE3_CH_BASE + channel * DE3_CH_SIZE;
202 	else
203 		return DE2_CH_BASE + channel * DE2_CH_SIZE;
204 }
205 
206 const struct de2_fmt_info *sun8i_mixer_format_info(u32 format);
207 #endif /* _SUN8I_MIXER_H_ */
208