1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> 4 */ 5 6 #include <linux/component.h> 7 #include <linux/module.h> 8 #include <linux/of_device.h> 9 #include <linux/platform_device.h> 10 11 #include <drm/drm_of.h> 12 #include <drm/drmP.h> 13 #include <drm/drm_crtc_helper.h> 14 15 #include "sun8i_dw_hdmi.h" 16 #include "sun8i_tcon_top.h" 17 18 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder, 19 struct drm_display_mode *mode, 20 struct drm_display_mode *adj_mode) 21 { 22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); 23 24 if (hdmi->quirks->set_rate) 25 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); 26 } 27 28 static const struct drm_encoder_helper_funcs 29 sun8i_dw_hdmi_encoder_helper_funcs = { 30 .mode_set = sun8i_dw_hdmi_encoder_mode_set, 31 }; 32 33 static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = { 34 .destroy = drm_encoder_cleanup, 35 }; 36 37 static enum drm_mode_status 38 sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector, 39 const struct drm_display_mode *mode) 40 { 41 if (mode->clock > 297000) 42 return MODE_CLOCK_HIGH; 43 44 return MODE_OK; 45 } 46 47 static enum drm_mode_status 48 sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector, 49 const struct drm_display_mode *mode) 50 { 51 /* 52 * Controller support maximum of 594 MHz, which correlates to 53 * 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than 54 * 340 MHz scrambling has to be enabled. Because scrambling is 55 * not yet implemented, just limit to 340 MHz for now. 56 */ 57 if (mode->clock > 340000) 58 return MODE_CLOCK_HIGH; 59 60 return MODE_OK; 61 } 62 63 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node) 64 { 65 return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) && 66 !!of_match_node(sun8i_tcon_top_of_table, node); 67 } 68 69 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm, 70 struct device_node *node) 71 { 72 struct device_node *port, *ep, *remote, *remote_port; 73 u32 crtcs = 0; 74 75 remote = of_graph_get_remote_node(node, 0, -1); 76 if (!remote) 77 return 0; 78 79 if (sun8i_dw_hdmi_node_is_tcon_top(remote)) { 80 port = of_graph_get_port_by_id(remote, 4); 81 if (!port) 82 goto crtcs_exit; 83 84 for_each_child_of_node(port, ep) { 85 remote_port = of_graph_get_remote_port(ep); 86 if (remote_port) { 87 crtcs |= drm_of_crtc_port_mask(drm, remote_port); 88 of_node_put(remote_port); 89 } 90 } 91 } else { 92 crtcs = drm_of_find_possible_crtcs(drm, node); 93 } 94 95 crtcs_exit: 96 of_node_put(remote); 97 98 return crtcs; 99 } 100 101 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, 102 void *data) 103 { 104 struct platform_device *pdev = to_platform_device(dev); 105 struct dw_hdmi_plat_data *plat_data; 106 struct drm_device *drm = data; 107 struct device_node *phy_node; 108 struct drm_encoder *encoder; 109 struct sun8i_dw_hdmi *hdmi; 110 int ret; 111 112 if (!pdev->dev.of_node) 113 return -ENODEV; 114 115 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); 116 if (!hdmi) 117 return -ENOMEM; 118 119 plat_data = &hdmi->plat_data; 120 hdmi->dev = &pdev->dev; 121 encoder = &hdmi->encoder; 122 123 hdmi->quirks = of_device_get_match_data(dev); 124 125 encoder->possible_crtcs = 126 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node); 127 /* 128 * If we failed to find the CRTC(s) which this encoder is 129 * supposed to be connected to, it's because the CRTC has 130 * not been registered yet. Defer probing, and hope that 131 * the required CRTC is added later. 132 */ 133 if (encoder->possible_crtcs == 0) 134 return -EPROBE_DEFER; 135 136 hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl"); 137 if (IS_ERR(hdmi->rst_ctrl)) { 138 dev_err(dev, "Could not get ctrl reset control\n"); 139 return PTR_ERR(hdmi->rst_ctrl); 140 } 141 142 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 143 if (IS_ERR(hdmi->clk_tmds)) { 144 dev_err(dev, "Couldn't get the tmds clock\n"); 145 return PTR_ERR(hdmi->clk_tmds); 146 } 147 148 hdmi->regulator = devm_regulator_get(dev, "hvcc"); 149 if (IS_ERR(hdmi->regulator)) { 150 dev_err(dev, "Couldn't get regulator\n"); 151 return PTR_ERR(hdmi->regulator); 152 } 153 154 ret = regulator_enable(hdmi->regulator); 155 if (ret) { 156 dev_err(dev, "Failed to enable regulator\n"); 157 return ret; 158 } 159 160 ret = reset_control_deassert(hdmi->rst_ctrl); 161 if (ret) { 162 dev_err(dev, "Could not deassert ctrl reset control\n"); 163 goto err_disable_regulator; 164 } 165 166 ret = clk_prepare_enable(hdmi->clk_tmds); 167 if (ret) { 168 dev_err(dev, "Could not enable tmds clock\n"); 169 goto err_assert_ctrl_reset; 170 } 171 172 phy_node = of_parse_phandle(dev->of_node, "phys", 0); 173 if (!phy_node) { 174 dev_err(dev, "Can't found PHY phandle\n"); 175 goto err_disable_clk_tmds; 176 } 177 178 ret = sun8i_hdmi_phy_probe(hdmi, phy_node); 179 of_node_put(phy_node); 180 if (ret) { 181 dev_err(dev, "Couldn't get the HDMI PHY\n"); 182 goto err_disable_clk_tmds; 183 } 184 185 drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs); 186 drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs, 187 DRM_MODE_ENCODER_TMDS, NULL); 188 189 sun8i_hdmi_phy_init(hdmi->phy); 190 191 plat_data->mode_valid = hdmi->quirks->mode_valid; 192 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); 193 194 platform_set_drvdata(pdev, hdmi); 195 196 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); 197 198 /* 199 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(), 200 * which would have called the encoder cleanup. Do it manually. 201 */ 202 if (IS_ERR(hdmi->hdmi)) { 203 ret = PTR_ERR(hdmi->hdmi); 204 goto cleanup_encoder; 205 } 206 207 return 0; 208 209 cleanup_encoder: 210 drm_encoder_cleanup(encoder); 211 sun8i_hdmi_phy_remove(hdmi); 212 err_disable_clk_tmds: 213 clk_disable_unprepare(hdmi->clk_tmds); 214 err_assert_ctrl_reset: 215 reset_control_assert(hdmi->rst_ctrl); 216 err_disable_regulator: 217 regulator_disable(hdmi->regulator); 218 219 return ret; 220 } 221 222 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, 223 void *data) 224 { 225 struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev); 226 227 dw_hdmi_unbind(hdmi->hdmi); 228 sun8i_hdmi_phy_remove(hdmi); 229 clk_disable_unprepare(hdmi->clk_tmds); 230 reset_control_assert(hdmi->rst_ctrl); 231 regulator_disable(hdmi->regulator); 232 } 233 234 static const struct component_ops sun8i_dw_hdmi_ops = { 235 .bind = sun8i_dw_hdmi_bind, 236 .unbind = sun8i_dw_hdmi_unbind, 237 }; 238 239 static int sun8i_dw_hdmi_probe(struct platform_device *pdev) 240 { 241 return component_add(&pdev->dev, &sun8i_dw_hdmi_ops); 242 } 243 244 static int sun8i_dw_hdmi_remove(struct platform_device *pdev) 245 { 246 component_del(&pdev->dev, &sun8i_dw_hdmi_ops); 247 248 return 0; 249 } 250 251 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = { 252 .mode_valid = sun8i_dw_hdmi_mode_valid_a83t, 253 .set_rate = true, 254 }; 255 256 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = { 257 .mode_valid = sun8i_dw_hdmi_mode_valid_h6, 258 }; 259 260 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = { 261 { 262 .compatible = "allwinner,sun8i-a83t-dw-hdmi", 263 .data = &sun8i_a83t_quirks, 264 }, 265 { 266 .compatible = "allwinner,sun50i-h6-dw-hdmi", 267 .data = &sun50i_h6_quirks, 268 }, 269 { /* sentinel */ }, 270 }; 271 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids); 272 273 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = { 274 .probe = sun8i_dw_hdmi_probe, 275 .remove = sun8i_dw_hdmi_remove, 276 .driver = { 277 .name = "sun8i-dw-hdmi", 278 .of_match_table = sun8i_dw_hdmi_dt_ids, 279 }, 280 }; 281 module_platform_driver(sun8i_dw_hdmi_pltfm_driver); 282 283 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>"); 284 MODULE_DESCRIPTION("Allwinner DW HDMI bridge"); 285 MODULE_LICENSE("GPL"); 286